coreboot March 2009

coreboot@coreboot.org

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r1159 - coreboot-v3/lib
by svn＠coreboot.org 19 Mar '09

19 Mar '09

Author: stuge Date: 2009-03-19 14:34:53 +0100 (Thu, 19 Mar 2009) New Revision: 1159 Modified: coreboot-v3/lib/vtxprintf.c Log: v3 vtxprintf(): Stop looking for non-ASCII characters after one has been found. And update the string length. Many thanks to Mathias Krause for spotting this! Signed-off-by: Peter Stuge <peter(a)stuge.se> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: coreboot-v3/lib/vtxprintf.c =================================================================== --- coreboot-v3/lib/vtxprintf.c 2009-03-19 12:53:57 UTC (rev 1158) +++ coreboot-v3/lib/vtxprintf.c 2009-03-19 13:34:53 UTC (rev 1159) @@ -202,8 +202,11 @@ len = strnlen(s, precision); for (i = 0; i < len; ++i) - if (!isprint(*s[i])) + if (!isprint(*s[i])) { s = "<non-ASCII characters>"; + len = strlen(s); + break; + } if (!(flags & LEFT)) while (len < field_width--) tx_byte(' ', arg), count++;

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[PATCH]es 7 assorted fixes
by Jens Rottmann 19 Mar '09

19 Mar '09

route_irq15.diff (changes pirq_routing.c): Fixes a off-by-one error when routing the IRQs. This led to IRQ15 not getting assigned. autoboot_delay.diff (changes filo.c): Fixes compile error when AUTOBOOT_DELAY=0. dword_copy.diff (changes crt0.S.lb, cache_as_ram.inc (Geode LX)): Speed up copying coreboot to ram by using "movsl" instead of "movsb". Also use different console messages for copying and uncompressing, like it's already done in similar code in other places. speed_calc.diff (changes raminit.c (Geode LX)): Changed RAM speed calculation to fix RAM modules getting rejected only due to integer rounding errors. Previously, the formula was: speed = 2 * (10000/spd_value) For spd_value=60 this means speed = 2 * 166 = 332, which is less than 333 and coreboot died saying RAM was incompatible. The new formula is: speed = 20000 / spd_value For spd_value=60, speed=333, which is fine. await_ide.diff (changes ide.c): Made await_ide(), which polls for an ide status change, check the status reg much more often. In my case this reduced the time spent in coreboot by 1.5 sec! The timeout values of course aren't changed, only the granularity. Also, I didn't see any udelay() implementation that looked like it couldn't cope with 10 us delays. (Most are written as for (...) inb(0x80) loops.) fs_arch.diff (changes ext2fs.c, fat.c): #if ARCH == 'i386' results in a compile error: character constant too long (or something alike). Changed it to #ifdef __i386 I'm unsure if this is correct, though! Why didn't anyone hit this problem before? Is this some ROMCC-special? it8712_gpio.diff (changes superio.c (IT8712F)): Added the missing I/O resources for IT8712F GPIOs. Our boards need these e.g. to switch the com ports between RS232 and RS485. Signed-off-by: Jens Rottmann <JRottmann(a)LiPPERTEmbedded.de> --- Above are fixes for some issues I tripped over while working on coreboot support for some of our boards. The patches can be applied in any order. (Should I have sent 7 seperate mails? I deemed it easier this way ...) I'll contribute the actual mainboard files as soon as I'm done. Regards, Jens Rottmann Index: src/stream/fs/ext2fs.c =================================================================== --- src/stream/fs/ext2fs.c (revision 3677) +++ src/stream/fs/ext2fs.c (working copy) @@ -239,7 +239,7 @@ * ffz = Find First Zero in word. Undefined if no zero exists, * so code should check against ~0UL first.. */ -#if ARCH == 'i386' +#ifdef __i386 static __inline__ unsigned long ffz (unsigned long word) { Index: src/stream/fs/fat.c =================================================================== --- src/stream/fs/fat.c (revision 3677) +++ src/stream/fs/fat.c (working copy) @@ -54,7 +54,7 @@ #define FAT_CACHE_SIZE 2048 -#if ARCH == 'i386' +#ifdef __i386 static __inline__ unsigned long log2 (unsigned long word) { Index: src/superio/ite/it8712f/superio.c =================================================================== --- src/superio/ite/it8712f/superio.c (revision 3677) +++ src/superio/ite/it8712f/superio.c (working copy) @@ -129,7 +129,7 @@ {&ops, IT8712F_EC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0xff8, 0}, {0xff8, 4},}, {&ops, IT8712F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0xfff, 0}, {0xfff, 4},}, {&ops, IT8712F_KBCM, PNP_IRQ0,}, - {&ops, IT8712F_GPIO,}, + {&ops, IT8712F_GPIO, PNP_IO0 | PNP_IO1 | PNP_IO2 | PNP_IRQ0, {0xfff, 0}, {0xff8, 0}, {0xff8, 0},}, {&ops, IT8712F_MIDI, PNP_IO0 | PNP_IRQ0, {0xff8, 0},}, {&ops, IT8712F_GAME, PNP_IO0, {0xfff, 0},}, {&ops, IT8712F_IR, PNP_IO0 | PNP_IRQ0, {0xff8, 0},}, Index: src/arch/i386/boot/pirq_routing.c =================================================================== --- src/arch/i386/boot/pirq_routing.c (revision 3677) +++ src/arch/i386/boot/pirq_routing.c (working copy) @@ -137,7 +137,7 @@ /* yet not routed */ if (!pirq[link - 1]) { - for (k = 2; k < 15; k++) { + for (k = 2; k <= 15; k++) { if (!((bitmap >> k) & 1)) continue; Index: src/northbridge/amd/lx/raminit.c =================================================================== --- src/northbridge/amd/lx/raminit.c (revision 3677) +++ src/northbridge/amd/lx/raminit.c (working copy) @@ -194,7 +194,7 @@ } /* Turn SPD ns time into MHZ. Check what the asm does to this math. */ - speed = 2 * ((10000 / (((spd_byte0 >> 4) * 10) + (spd_byte0 & 0x0F)))); + speed = 20000 / (((spd_byte0 >> 4) * 10) + (spd_byte0 & 0x0F)); /* current speed > max speed? */ if (GeodeLinkSpeed() > speed) { @@ -274,15 +274,14 @@ spd_byte = spd_read_byte(DIMM0, SPD_SDRAM_CYCLE_TIME_2ND); if (spd_byte != 0) { /* Turn SPD ns time into MHZ. Check what the asm does to this math. */ - dimm_speed = 2 * (10000 / (((spd_byte >> 4) * 10) + - (spd_byte & 0x0F))); + dimm_speed = 20000 / (((spd_byte >> 4) * 10) + (spd_byte & 0x0F)); if (dimm_speed >= glspeed) { casmap_shift = 1; /* -.5 is a shift of 1 */ /* IF -1 timing is supported, check -1 timing > GeodeLink */ spd_byte = spd_read_byte(DIMM0, SPD_SDRAM_CYCLE_TIME_3RD); if (spd_byte != 0) { /* Turn SPD ns time into MHZ. Check what the asm does to this math. */ - dimm_speed = 2 * (10000 / (((spd_byte >> 4) * 10) + (spd_byte & 0x0F))); + dimm_speed = 20000 / (((spd_byte >> 4) * 10) + (spd_byte & 0x0F)); if (dimm_speed >= glspeed) { casmap_shift = 2; /* -1 is a shift of 2 */ } @@ -306,14 +305,14 @@ spd_byte = spd_read_byte(DIMM1, SPD_SDRAM_CYCLE_TIME_2ND); if (spd_byte != 0) { /* Turn SPD ns time into MHZ. Check what the asm does to this math. */ - dimm_speed = 2 * (10000 / (((spd_byte >> 4) * 10) + (spd_byte & 0x0F))); + dimm_speed = 20000 / (((spd_byte >> 4) * 10) + (spd_byte & 0x0F)); if (dimm_speed >= glspeed) { casmap_shift = 1; /* -.5 is a shift of 1 */ /* IF -1 timing is supported, check -1 timing > GeodeLink */ spd_byte = spd_read_byte(DIMM1, SPD_SDRAM_CYCLE_TIME_3RD); if (spd_byte != 0) { /* Turn SPD ns time into MHZ. Check what the asm does to this math. */ - dimm_speed = 2 * (10000 / (((spd_byte >> 4) * 10) + (spd_byte & 0x0F))); + dimm_speed = 20000 / (((spd_byte >> 4) * 10) + (spd_byte & 0x0F)); if (dimm_speed >= glspeed) { casmap_shift = 2; /* -1 is a shift of 2 */ } Index: src/boot/filo.c =================================================================== --- src/boot/filo.c (revision 3677) +++ src/boot/filo.c (working copy) @@ -18,7 +18,7 @@ #define autoboot(mem) #endif -#ifndef AUTOBOOT_DELAY +#if !AUTOBOOT_DELAY #define autoboot_delay() 0 /* success */ #endif Index: src/pc80/ide/ide.c =================================================================== --- src/pc80/ide/ide.c (revision 3677) +++ src/pc80/ide/ide.c (working copy) @@ -29,6 +29,7 @@ struct controller *ctrl, unsigned long timeout) { int result; + timeout *= 100; /* timeout was ms; finer granularity => reacts faster */ for(;;) { result = done(ctrl); if (result) { @@ -38,7 +39,7 @@ if (timeout-- <= 0) { break; } - udelay(1000); /* Added to avoid spinning GRW */ + udelay(10); /* Added to avoid spinning GRW */ } printk_info("IDE time out\n"); return -1; Index: src/arch/i386/init/crt0.S.lb =================================================================== --- src/arch/i386/init/crt0.S.lb (revision 3677) +++ src/arch/i386/init/crt0.S.lb (working copy) @@ -74,6 +74,11 @@ movl $_iseg, %edi movl $_eiseg, %ecx subl %edi, %ecx + movb %cl, %al + shrl $2, %ecx + andb $3, %al + rep movsl + movb %al, %cl rep movsb #else leal 4+_liseg, %esi @@ -215,7 +220,11 @@ #if defined(CONSOLE_DEBUG_TX_STRING) && (ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG) .section ".rom.data" +#if CONFIG_COMPRESS +str_copying_to_ram: .string "Uncompressing coreboot to RAM.\r\n" +#else str_copying_to_ram: .string "Copying coreboot to RAM.\r\n" +#endif str_pre_main: .string "Jumping to coreboot.\r\n" .previous Index: src/cpu/amd/model_lx/cache_as_ram.inc =================================================================== --- src/cpu/amd/model_lx/cache_as_ram.inc (revision 3677) +++ src/cpu/amd/model_lx/cache_as_ram.inc (working copy) @@ -222,6 +222,11 @@ movl $_iseg, %edi movl $_eiseg, %ecx subl %edi, %ecx + movb %cl, %al + shrl $2, %ecx + andb $3, %al + rep movsl + movb %al, %cl rep movsb #else leal 4+_liseg, %esi @@ -363,7 +368,11 @@ #if defined(CONSOLE_DEBUG_TX_STRING) && (ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG) .section ".rom.data" +#if CONFIG_COMPRESS +str_copying_to_ram: .string "Uncompressing coreboot to ram.\r\n" +#else str_copying_to_ram: .string "Copying coreboot to ram.\r\n" +#endif str_pre_main: .string "Jumping to coreboot.\r\n" .previous

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r1158 - coreboot-v3/lib
by svn＠coreboot.org 19 Mar '09

19 Mar '09

Author: hailfinger Date: 2009-03-19 13:53:57 +0100 (Thu, 19 Mar 2009) New Revision: 1158 Modified: coreboot-v3/lib/vtxprintf.c Log: This patch tries to make printk more readable and reliable. Base 16 number printing used digits[33] instead of the more readable 'x' for the "0x" prefix. That means you have to look up an array just to find out what the code does. Change it. We already write "<NULL>" if printk gets a NULL pointer as string argument. Introduce "<near NULL>" for string arguments with addresses below 0x400. This error happened in the past when dereferencing a struct member with a string and the struct had the address NULL. Check if all to-be-printed characters in the string are indeed printable. The idea is to catch garbage strings from stray pointers and print "<non-ASCII characters>" instead. If a string contains characters outside classic ASCII printable stuff, this will trigger. An example would be characters with diacritic marks like ?\195?\164?\195?\182?\195?\188?\195?\169?\196?\131?\195?\167?\197?\145?\196?\141. Then again, I don't see localized versions of coreboot on the horizon. Maybe for payloads, but not for coreboot itself. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: coreboot-v3/lib/vtxprintf.c =================================================================== --- coreboot-v3/lib/vtxprintf.c 2009-03-19 11:33:16 UTC (rev 1157) +++ coreboot-v3/lib/vtxprintf.c 2009-03-19 12:53:57 UTC (rev 1158) @@ -16,6 +16,7 @@ #define isdigit(c) ((c) >= '0' && (c) <= '9') #define is_digit isdigit #define isxdigit(c) (((c) >= '0' && (c) <= '9') || ((c) >= 'a' && (c) <= 'f') || ((c) >= 'A' && (c) <= 'F')) +#define isprint(c) ((c) == '\n' || ((c) >= ' ' && (c) <= '~')) static int skip_atoi(const char **s) { @@ -87,7 +88,7 @@ tx_byte('0', arg), count++; else if (base==16) { tx_byte('0', arg), count++; - tx_byte(digits[33], arg), count++; + tx_byte('x', arg), count++; } } if (!(type & LEFT)) @@ -194,9 +195,15 @@ s = va_arg(args, char *); if (!s) s = "<NULL>"; + /* Catch almost-NULL pointers as well */ + if ((size_t)s < 0x400) + s = "<near NULL>"; len = strnlen(s, precision); + for (i = 0; i < len; ++i) + if (!isprint(*s[i])) + s = "<non-ASCII characters>"; if (!(flags & LEFT)) while (len < field_width--) tx_byte(' ', arg), count++;

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[PATCH] flashrom: Move AT45 comments
by Carl-Daniel Hailfinger 19 Mar '09

19 Mar '09

Move the Atmel AT45 comments about block and page sizes from the end of the struct to the individual struct members to improve readability. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-moveat45comments/flashchips.c =================================================================== --- flashrom-moveat45comments/flashchips.c (Revision 4019) +++ flashrom-moveat45comments/flashchips.c (Arbeitskopie) @@ -4,6 +4,7 @@ * Copyright (C) 2000 Silicon Integrated System Corporation * Copyright (C) 2004 Tyan Corp * Copyright (C) 2005-2008 coresystems GmbH <stepan(a)openbios.org> + * Copyright (C) 2006-2009 Carl-Daniel Hailfinger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -396,126 +397,126 @@ .name = "AT45CS1282", .manufacture_id = ATMEL_ID, .model_id = AT_45CS1282, - .total_size = 16896/*!*/, - .page_size = 1056/*!*/, + .total_size = 16896 /* No power of two sizes */, + .page_size = 1056 /* No power of two sizes */, .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .erase = NULL, .write = NULL /* Incompatible Page write */, .read = NULL /* Incompatible read */, - }, /* No power of two sizes */ + }, { .vendor = "Atmel", .name = "AT45DB011D", .manufacture_id = ATMEL_ID, .model_id = AT_45DB011D, - .total_size = 128/*!*/, - .page_size = 256/*!*/, + .total_size = 128 /* Size can only be determined from status register */, + .page_size = 256 /* Size can only be determined from status register */, .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .erase = NULL, .write = NULL, .read = NULL, - }, /* Size can only be determined from status register */ + }, { .vendor = "Atmel", .name = "AT45DB021D", .manufacture_id = ATMEL_ID, .model_id = AT_45DB021D, - .total_size = 256/*!*/, - .page_size = 256/*!*/, + .total_size = 256 /* Size can only be determined from status register */, + .page_size = 256 /* Size can only be determined from status register */, .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .erase = NULL, .write = NULL, .read = NULL, - }, /* Size can only be determined from status register */ + }, { .vendor = "Atmel", .name = "AT45DB041D", .manufacture_id = ATMEL_ID, .model_id = AT_45DB041D, - .total_size = 512/*!*/, - .page_size = 256/*!*/, + .total_size = 512 /* Size can only be determined from status register */, + .page_size = 256 /* Size can only be determined from status register */, .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .erase = NULL, .write = NULL, .read = NULL, - }, /* Size can only be determined from status register */ + }, { .vendor = "Atmel", .name = "AT45DB081D", .manufacture_id = ATMEL_ID, .model_id = AT_45DB081D, - .total_size = 1024/*!*/, - .page_size = 256/*!*/, + .total_size = 1024 /* Size can only be determined from status register */, + .page_size = 256 /* Size can only be determined from status register */, .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .erase = NULL, .write = NULL, .read = NULL, - }, /* Size can only be determined from status register */ + }, { .vendor = "Atmel", .name = "AT45DB161D", .manufacture_id = ATMEL_ID, .model_id = AT_45DB161D, - .total_size = 2048/*!*/, - .page_size = 512/*!*/, + .total_size = 2048 /* Size can only be determined from status register */, + .page_size = 512 /* Size can only be determined from status register */, .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .erase = NULL, .write = NULL, .read = NULL, - }, /* Size can only be determined from status register */ + }, { .vendor = "Atmel", .name = "AT45DB321C", .manufacture_id = ATMEL_ID, .model_id = AT_45DB321C, - .total_size = 4224/*!*/, - .page_size = 528/*!*/, + .total_size = 4224 /* No power of two sizes */, + .page_size = 528 /* No power of two sizes */, .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .erase = NULL, .write = NULL, .read = NULL /* Incompatible read */, - }, /* No power of two sizes */ + }, { .vendor = "Atmel", .name = "AT45DB321D", .manufacture_id = ATMEL_ID, .model_id = AT_45DB321D, - .total_size = 4096/*!*/, - .page_size = 512/*!*/, + .total_size = 4096 /* Size can only be determined from status register */, + .page_size = 512 /* Size can only be determined from status register */, .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .erase = NULL, .write = NULL, .read = NULL, - }, /* Size can only be determined from status register */ + }, { .vendor = "Atmel", .name = "AT45DB642D", .manufacture_id = ATMEL_ID, .model_id = AT_45DB642D, - .total_size = 8192/*!*/, - .page_size = 1024/*!*/, + .total_size = 8192 /* Size can only be determined from status register */, + .page_size = 1024 /* Size can only be determined from status register */, .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .erase = NULL, .write = NULL, .read = NULL, - }, /* Size can only be determined from status register */ + }, { .vendor = "Atmel", -- http://www.hailfinger.org/ Index: flashrom-moveat45comments/flashchips.c =================================================================== --- flashrom-moveat45comments/flashchips.c (Revision 4019) +++ flashrom-moveat45comments/flashchips.c (Arbeitskopie) @@ -4,6 +4,7 @@ * Copyright (C) 2000 Silicon Integrated System Corporation * Copyright (C) 2004 Tyan Corp * Copyright (C) 2005-2008 coresystems GmbH <stepan(a)openbios.org> + * Copyright (C) 2006-2009 Carl-Daniel Hailfinger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -396,126 +397,126 @@ .name = "AT45CS1282", .manufacture_id = ATMEL_ID, .model_id = AT_45CS1282, - .total_size = 16896/*!*/, - .page_size = 1056/*!*/, + .total_size = 16896 /* No power of two sizes */, + .page_size = 1056 /* No power of two sizes */, .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .erase = NULL, .write = NULL /* Incompatible Page write */, .read = NULL /* Incompatible read */, - }, /* No power of two sizes */ + }, { .vendor = "Atmel", .name = "AT45DB011D", .manufacture_id = ATMEL_ID, .model_id = AT_45DB011D, - .total_size = 128/*!*/, - .page_size = 256/*!*/, + .total_size = 128 /* Size can only be determined from status register */, + .page_size = 256 /* Size can only be determined from status register */, .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .erase = NULL, .write = NULL, .read = NULL, - }, /* Size can only be determined from status register */ + }, { .vendor = "Atmel", .name = "AT45DB021D", .manufacture_id = ATMEL_ID, .model_id = AT_45DB021D, - .total_size = 256/*!*/, - .page_size = 256/*!*/, + .total_size = 256 /* Size can only be determined from status register */, + .page_size = 256 /* Size can only be determined from status register */, .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .erase = NULL, .write = NULL, .read = NULL, - }, /* Size can only be determined from status register */ + }, { .vendor = "Atmel", .name = "AT45DB041D", .manufacture_id = ATMEL_ID, .model_id = AT_45DB041D, - .total_size = 512/*!*/, - .page_size = 256/*!*/, + .total_size = 512 /* Size can only be determined from status register */, + .page_size = 256 /* Size can only be determined from status register */, .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .erase = NULL, .write = NULL, .read = NULL, - }, /* Size can only be determined from status register */ + }, { .vendor = "Atmel", .name = "AT45DB081D", .manufacture_id = ATMEL_ID, .model_id = AT_45DB081D, - .total_size = 1024/*!*/, - .page_size = 256/*!*/, + .total_size = 1024 /* Size can only be determined from status register */, + .page_size = 256 /* Size can only be determined from status register */, .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .erase = NULL, .write = NULL, .read = NULL, - }, /* Size can only be determined from status register */ + }, { .vendor = "Atmel", .name = "AT45DB161D", .manufacture_id = ATMEL_ID, .model_id = AT_45DB161D, - .total_size = 2048/*!*/, - .page_size = 512/*!*/, + .total_size = 2048 /* Size can only be determined from status register */, + .page_size = 512 /* Size can only be determined from status register */, .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .erase = NULL, .write = NULL, .read = NULL, - }, /* Size can only be determined from status register */ + }, { .vendor = "Atmel", .name = "AT45DB321C", .manufacture_id = ATMEL_ID, .model_id = AT_45DB321C, - .total_size = 4224/*!*/, - .page_size = 528/*!*/, + .total_size = 4224 /* No power of two sizes */, + .page_size = 528 /* No power of two sizes */, .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .erase = NULL, .write = NULL, .read = NULL /* Incompatible read */, - }, /* No power of two sizes */ + }, { .vendor = "Atmel", .name = "AT45DB321D", .manufacture_id = ATMEL_ID, .model_id = AT_45DB321D, - .total_size = 4096/*!*/, - .page_size = 512/*!*/, + .total_size = 4096 /* Size can only be determined from status register */, + .page_size = 512 /* Size can only be determined from status register */, .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .erase = NULL, .write = NULL, .read = NULL, - }, /* Size can only be determined from status register */ + }, { .vendor = "Atmel", .name = "AT45DB642D", .manufacture_id = ATMEL_ID, .model_id = AT_45DB642D, - .total_size = 8192/*!*/, - .page_size = 1024/*!*/, + .total_size = 8192 /* Size can only be determined from status register */, + .page_size = 1024 /* Size can only be determined from status register */, .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .erase = NULL, .write = NULL, .read = NULL, - }, /* Size can only be determined from status register */ + }, { .vendor = "Atmel",

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r4020 - trunk/util/flashrom
by svn＠coreboot.org 19 Mar '09

19 Mar '09

Author: hailfinger Date: 2009-03-19 13:18:13 +0100 (Thu, 19 Mar 2009) New Revision: 4020 Modified: trunk/util/flashrom/flashchips.c Log: Move the Atmel AT45 comments about block and page sizes from the end of the struct to the individual struct members to improve readability. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: trunk/util/flashrom/flashchips.c =================================================================== --- trunk/util/flashrom/flashchips.c 2009-03-19 01:30:16 UTC (rev 4019) +++ trunk/util/flashrom/flashchips.c 2009-03-19 12:18:13 UTC (rev 4020) @@ -4,6 +4,7 @@ * Copyright (C) 2000 Silicon Integrated System Corporation * Copyright (C) 2004 Tyan Corp * Copyright (C) 2005-2008 coresystems GmbH <stepan(a)openbios.org> + * Copyright (C) 2006-2009 Carl-Daniel Hailfinger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -396,126 +397,126 @@ .name = "AT45CS1282", .manufacture_id = ATMEL_ID, .model_id = AT_45CS1282, - .total_size = 16896/*!*/, - .page_size = 1056/*!*/, + .total_size = 16896 /* No power of two sizes */, + .page_size = 1056 /* No power of two sizes */, .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .erase = NULL, .write = NULL /* Incompatible Page write */, .read = NULL /* Incompatible read */, - }, /* No power of two sizes */ + }, { .vendor = "Atmel", .name = "AT45DB011D", .manufacture_id = ATMEL_ID, .model_id = AT_45DB011D, - .total_size = 128/*!*/, - .page_size = 256/*!*/, + .total_size = 128 /* Size can only be determined from status register */, + .page_size = 256 /* Size can only be determined from status register */, .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .erase = NULL, .write = NULL, .read = NULL, - }, /* Size can only be determined from status register */ + }, { .vendor = "Atmel", .name = "AT45DB021D", .manufacture_id = ATMEL_ID, .model_id = AT_45DB021D, - .total_size = 256/*!*/, - .page_size = 256/*!*/, + .total_size = 256 /* Size can only be determined from status register */, + .page_size = 256 /* Size can only be determined from status register */, .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .erase = NULL, .write = NULL, .read = NULL, - }, /* Size can only be determined from status register */ + }, { .vendor = "Atmel", .name = "AT45DB041D", .manufacture_id = ATMEL_ID, .model_id = AT_45DB041D, - .total_size = 512/*!*/, - .page_size = 256/*!*/, + .total_size = 512 /* Size can only be determined from status register */, + .page_size = 256 /* Size can only be determined from status register */, .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .erase = NULL, .write = NULL, .read = NULL, - }, /* Size can only be determined from status register */ + }, { .vendor = "Atmel", .name = "AT45DB081D", .manufacture_id = ATMEL_ID, .model_id = AT_45DB081D, - .total_size = 1024/*!*/, - .page_size = 256/*!*/, + .total_size = 1024 /* Size can only be determined from status register */, + .page_size = 256 /* Size can only be determined from status register */, .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .erase = NULL, .write = NULL, .read = NULL, - }, /* Size can only be determined from status register */ + }, { .vendor = "Atmel", .name = "AT45DB161D", .manufacture_id = ATMEL_ID, .model_id = AT_45DB161D, - .total_size = 2048/*!*/, - .page_size = 512/*!*/, + .total_size = 2048 /* Size can only be determined from status register */, + .page_size = 512 /* Size can only be determined from status register */, .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .erase = NULL, .write = NULL, .read = NULL, - }, /* Size can only be determined from status register */ + }, { .vendor = "Atmel", .name = "AT45DB321C", .manufacture_id = ATMEL_ID, .model_id = AT_45DB321C, - .total_size = 4224/*!*/, - .page_size = 528/*!*/, + .total_size = 4224 /* No power of two sizes */, + .page_size = 528 /* No power of two sizes */, .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .erase = NULL, .write = NULL, .read = NULL /* Incompatible read */, - }, /* No power of two sizes */ + }, { .vendor = "Atmel", .name = "AT45DB321D", .manufacture_id = ATMEL_ID, .model_id = AT_45DB321D, - .total_size = 4096/*!*/, - .page_size = 512/*!*/, + .total_size = 4096 /* Size can only be determined from status register */, + .page_size = 512 /* Size can only be determined from status register */, .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .erase = NULL, .write = NULL, .read = NULL, - }, /* Size can only be determined from status register */ + }, { .vendor = "Atmel", .name = "AT45DB642D", .manufacture_id = ATMEL_ID, .model_id = AT_45DB642D, - .total_size = 8192/*!*/, - .page_size = 1024/*!*/, + .total_size = 8192 /* Size can only be determined from status register */, + .page_size = 1024 /* Size can only be determined from status register */, .tested = TEST_BAD_READ, .probe = probe_spi_rdid, .erase = NULL, .write = NULL, .read = NULL, - }, /* Size can only be determined from status register */ + }, { .vendor = "Atmel",

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GSoC 2009 deadlines
by Carl-Daniel Hailfinger 19 Mar '09

19 Mar '09

Hi all, GSoC 2009 is approaching and although the number of total slots has been reduced, there is a chance we might get some slots for coreboot and/or flashrom. We might want to apply separately for coreboot and flashrom, maybe also for buildrom or libpayload because they are essentially separate projects. I don't know if SeaBIOS would benefit from GSoC because it seems rather complete to me. Deadline for organizational applications: March 13, 2009 noon. No application possible before March 9, 2009 noon. http://code.google.com/intl/de/opensource/gsoc/2009/faqs.html#0_1_org_apply… Full timeline: http://code.google.com/intl/de/opensource/gsoc/2009/faqs.html#0_1_timeline_… Regards, Carl-Daniel -- http://www.hailfinger.org/

8 14

r1157 - coreboot-v3/northbridge/amd/geodelx
by svn＠coreboot.org 19 Mar '09

19 Mar '09

Author: hailfinger Date: 2009-03-19 12:33:16 +0100 (Thu, 19 Mar 2009) New Revision: 1157 Modified: coreboot-v3/northbridge/amd/geodelx/raminit.c Log: Changed RAM speed calculation to fix RAM modules getting rejected only due to integer rounding errors. Previously, the formula was: speed = 2 * (10000/spd_value) For spd_value=60 this means speed = 2 * 166 = 332, which is less than 333 and coreboot died saying RAM was incompatible. The new formula is: speed = 20000 / spd_value For spd_value=60, speed=333, which is fine. Signed-off-by: Jens Rottmann <JRottmann(a)LiPPERTEmbedded.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Mart writes: Tested on ThinCan DBE63 to fix the issue of 333 > 332 comparison for RAM modules I had problems with before due to bailing out in the overclocking check. Acked-by: Mart Raudsepp <mart.raudsepp(a)artecdesign.ee> Modified: coreboot-v3/northbridge/amd/geodelx/raminit.c =================================================================== --- coreboot-v3/northbridge/amd/geodelx/raminit.c 2009-03-19 10:10:24 UTC (rev 1156) +++ coreboot-v3/northbridge/amd/geodelx/raminit.c 2009-03-19 11:33:16 UTC (rev 1157) @@ -187,11 +187,11 @@ * * ma 12 11 10 09 08 07 06 05 04 03 02 01 00 * ------------------------------------------- - * pa 09 08 07 06 05 04 03 (7 col addr bits = 1K page size) - * pa 10 09 08 07 06 05 04 03 (8 col addr bits = 2K page size) - * pa 11 10 09 08 07 06 05 04 03 (9 col addr bits = 4K page size) - * pa 12 11 10 09 08 07 06 05 04 03 (10 col addr bits = 8K page size) - * pa 13 AP 12 11 10 09 08 07 06 05 04 03 (11 col addr bits = 16K page size) + * pa 09 08 07 06 05 04 03 (7 col addr bits = 1K page size) + * pa 10 09 08 07 06 05 04 03 (8 col addr bits = 2K page size) + * pa 11 10 09 08 07 06 05 04 03 (9 col addr bits = 4K page size) + * pa 12 11 10 09 08 07 06 05 04 03 (10 col addr bits = 8K page size) + * pa 13 AP 12 11 10 09 08 07 06 05 04 03 (11 col addr bits = 16K page size) * pa 14 13 AP 12 11 10 09 08 07 06 05 04 03 (12 col addr bits = 32K page size) * * (AP = autoprecharge bit) @@ -260,7 +260,7 @@ spd_byte0 = spd_byte1; /* Turn SPD ns time into MHz. Check what the asm does to this math. */ - speed = 2 * ((10000 / (((spd_byte0 >> 4) * 10) + (spd_byte0 & 0x0F)))); + speed = 20000 / (((spd_byte0 >> 4) * 10) + (spd_byte0 & 0x0F)); printk(BIOS_DEBUG, "ddr max speed is %d\n", speed); /* Current speed > max speed? */ @@ -353,15 +353,14 @@ /* Turn SPD ns time into MHz. Check what the asm does * to this math. */ - dimm_speed = 2 * (10000 / (((spd_byte >> 4) * 10) + - (spd_byte & 0x0F))); + dimm_speed = 20000 / (((spd_byte >> 4) * 10) + (spd_byte & 0x0F)); if (dimm_speed >= glspeed) { /* If -1 timing is supported, check -1 timing > GeodeLink. */ /* EEPROM byte usage: (25) SDRAM Minimum Clock Cycle Time @ CLX -1 */ spd_byte = spd_read_byte(dimm0, SPD_SDRAM_CYCLE_TIME_3RD); if (spd_byte != 0) { /* Turn SPD ns time into MHz. Check what the asm does to this math. */ - dimm_speed = 2 * (10000 / (((spd_byte >> 4) * 10) + (spd_byte & 0x0F))); + dimm_speed = 20000 / (((spd_byte >> 4) * 10) + (spd_byte & 0x0F)); if (dimm_speed <= glspeed) { /* Set we can use -.5 timing but not -1. */ spd_byte = 31 - __builtin_clz((u32) casmap0); @@ -388,14 +387,14 @@ spd_byte = spd_read_byte(dimm1, SPD_SDRAM_CYCLE_TIME_2ND); if (spd_byte != 0) { /* Turn SPD ns time into MHz. Check what the asm does to this math. */ - dimm_speed = 2 * (10000 / (((spd_byte >> 4) * 10) + (spd_byte & 0x0F))); + dimm_speed = 20000 / (((spd_byte >> 4) * 10) + (spd_byte & 0x0F)); if (dimm_speed >= glspeed) { /* If -1 timing is supported, check -1 timing > GeodeLink. */ /* EEPROM byte usage: (25) SDRAM Minimum Clock Cycle Time @ CLX -1 */ spd_byte = spd_read_byte(dimm1, SPD_SDRAM_CYCLE_TIME_3RD); if (spd_byte != 0) { /* Turn SPD ns time into MHz. Check what the asm does to this math. */ - dimm_speed = 2 * (10000 / (((spd_byte >> 4) * 10) + (spd_byte & 0x0F))); + dimm_speed = 20000 / (((spd_byte >> 4) * 10) + (spd_byte & 0x0F)); if (dimm_speed <= glspeed) { /* Set we can use -.5 timing but not -1. */ spd_byte = 31 - __builtin_clz((u32) casmap1);

1 0

[PATCH] Output GeodeLink and RAM speed in case of overclock error to make things more clear.
by Mart Raudsepp 19 Mar '09

19 Mar '09

Output GeodeLink and RAM speed in case of overclock error to make things more clear. Signed-off-by: Mart Raudsepp <mart.raudsepp(a)artecdesign.ee> --- northbridge/amd/geodelx/raminit.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/northbridge/amd/geodelx/raminit.c b/northbridge/amd/geodelx/raminit.c index 5b6893b..611cbd8 100644 --- a/northbridge/amd/geodelx/raminit.c +++ b/northbridge/amd/geodelx/raminit.c @@ -267,6 +267,7 @@ static void check_ddr_max(u8 dimm0, u8 dimm1) if (geode_link_speed() > speed) { printk(BIOS_EMERG, "DIMM overclocked. Check GeodeLink speed.\n"); post_code(POST_PLL_MEM_FAIL); + printk(BIOS_EMERG, "GeodeLink speed: %u\nIntended RAM speed: %u\n", geode_link_speed(), speed); hlt(); } } -- 1.6.1.2

2 2

r1156 - coreboot-v3/northbridge/amd/geodelx
by svn＠coreboot.org 19 Mar '09

19 Mar '09

Author: mraudsepp Date: 2009-03-19 11:10:24 +0100 (Thu, 19 Mar 2009) New Revision: 1156 Modified: coreboot-v3/northbridge/amd/geodelx/raminit.c Log: Output GeodeLink and RAM speed in case of overclock error to make things more clear. Signed-off-by: Mart Raudsepp <mart.raudsepp(a)artecdesign.ee> Acked-by: Myles Watson <mylesgw(a)gmail.com> Modified: coreboot-v3/northbridge/amd/geodelx/raminit.c =================================================================== --- coreboot-v3/northbridge/amd/geodelx/raminit.c 2009-03-18 16:27:01 UTC (rev 1155) +++ coreboot-v3/northbridge/amd/geodelx/raminit.c 2009-03-19 10:10:24 UTC (rev 1156) @@ -267,6 +267,7 @@ if (geode_link_speed() > speed) { printk(BIOS_EMERG, "DIMM overclocked. Check GeodeLink speed.\n"); post_code(POST_PLL_MEM_FAIL); + printk(BIOS_EMERG, "GeodeLink speed: %u\nIntended RAM speed: %u\n", geode_link_speed(), speed); hlt(); } }

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build service results for r4018
by coreboot information 19 Mar '09

19 Mar '09

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stepan" checked in revision 4018 to the coreboot repository. This caused the following changes: Change Log: fix totalimpact briq compilation. the target had a cpu specific and a mainboard specific clock.c. Since no other target uses the same cpu, I commented out the CPU's clock.c. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of totalimpact:briq has been fixed If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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coreboot March 2009