coreboot February 2009

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Re: [coreboot] [PATCH] __FUNCTION__ -> __func__
by Myles Watson 12 Feb '09

12 Feb '09

On Thu, Feb 12, 2009 at 10:00 AM, ron minnich <rminnich(a)gmail.com> wrote: > On Thu, Feb 12, 2009 at 5:48 AM, Carl-Daniel Hailfinger > <c-d.hailfinger.devel.2006(a)gmx.net> wrote: > >> Hm. Right now, we have a mix of styles in v2. >> __func__ is used 43 times >> __FUNCTION__ is used 153 times. >> I'd rather leave that cleanup for a separate patch. > > it's a sign of the age of the project. When we started, __FUNCTION__ > was common usage. > > We can clean it up later, and cleanup would be good. Patches attached. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Thanks, Myles

2 2

r3943 - in trunk/coreboot-v2/src: arch/i386/boot arch/i386/smp cpu/amd/model_gx2 cpu/amd/sc520 cpu/x86/mtrr cpu/x86/tsc lib mainboard/amd/db800 mainboard/amd/dbm690t mainboard/amd/norwich mainboard/amd/pistachio mainboard/amd/rumba mainboard/artecgroup/dbe61 mainboard/digitallogic/msm586seg mainboard/digitallogic/msm800sev mainboard/lippert/roadrunner-lx mainboard/lippert/spacerunner-lx mainboard/olpc/btest mainboard/olpc/rev_a mainboard/pcengines/alix1c mainboard/technologic/ts5300 northbridge/a
by svn＠coreboot.org 12 Feb '09

12 Feb '09

Author: myles Date: 2009-02-12 22:30:06 +0100 (Thu, 12 Feb 2009) New Revision: 3943 Modified: trunk/coreboot-v2/src/arch/i386/boot/pirq_routing.c trunk/coreboot-v2/src/arch/i386/smp/mpspec.c trunk/coreboot-v2/src/cpu/amd/model_gx2/cpubug.c trunk/coreboot-v2/src/cpu/amd/sc520/sc520.c trunk/coreboot-v2/src/cpu/x86/mtrr/mtrr.c trunk/coreboot-v2/src/cpu/x86/tsc/delay_tsc.c trunk/coreboot-v2/src/lib/malloc.c trunk/coreboot-v2/src/mainboard/amd/db800/mainboard.c trunk/coreboot-v2/src/mainboard/amd/dbm690t/mainboard.c trunk/coreboot-v2/src/mainboard/amd/norwich/mainboard.c trunk/coreboot-v2/src/mainboard/amd/pistachio/mainboard.c trunk/coreboot-v2/src/mainboard/amd/rumba/mainboard.c trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/mainboard.c trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/mainboard.c trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/mainboard.c trunk/coreboot-v2/src/mainboard/lippert/roadrunner-lx/mainboard.c trunk/coreboot-v2/src/mainboard/lippert/spacerunner-lx/mainboard.c trunk/coreboot-v2/src/mainboard/olpc/btest/mainboard.c trunk/coreboot-v2/src/mainboard/olpc/rev_a/mainboard.c trunk/coreboot-v2/src/mainboard/pcengines/alix1c/mainboard.c trunk/coreboot-v2/src/mainboard/technologic/ts5300/mainboard.c trunk/coreboot-v2/src/northbridge/amd/gx1/northbridge.c trunk/coreboot-v2/src/northbridge/amd/gx2/northbridge.c trunk/coreboot-v2/src/northbridge/amd/gx2/northbridgeinit.c trunk/coreboot-v2/src/northbridge/amd/lx/northbridge.c trunk/coreboot-v2/src/northbridge/amd/lx/northbridgeinit.c trunk/coreboot-v2/src/pc80/ide/ide.c trunk/coreboot-v2/src/southbridge/amd/cs5535/cs5535.c trunk/coreboot-v2/src/southbridge/amd/cs5535/cs5535_ide.c trunk/coreboot-v2/src/southbridge/amd/cs5536/cs5536.c trunk/coreboot-v2/src/southbridge/amd/cs5536/cs5536_ide.c trunk/coreboot-v2/src/southbridge/via/vt8231/vt8231_ide.c trunk/coreboot-v2/src/southbridge/via/vt8231/vt8231_lpc.c trunk/coreboot-v2/src/southbridge/via/vt8235/vt8235_ide.c trunk/coreboot-v2/src/southbridge/via/vt8235/vt8235_lpc.c trunk/coreboot-v2/src/stream/rom_stream.c trunk/coreboot-v2/src/stream/serial_stream.c Log: This patch converts __FUNCTION__ to __func__, since __func__ is standard. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/coreboot-v2/src/arch/i386/boot/pirq_routing.c =================================================================== --- trunk/coreboot-v2/src/arch/i386/boot/pirq_routing.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/arch/i386/boot/pirq_routing.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -26,7 +26,7 @@ sum += addr[i]; printk_debug("%s(): Interrupt Routing Table located at %p.\n", - __FUNCTION__, addr); + __func__, addr); sum = rt->checksum - sum; Modified: trunk/coreboot-v2/src/arch/i386/smp/mpspec.c =================================================================== --- trunk/coreboot-v2/src/arch/i386/smp/mpspec.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/arch/i386/smp/mpspec.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -200,7 +200,7 @@ #if CONFIG_DEBUG_MPTABLE == 1 printk_info("add intsrc srcbus 0x%x srcbusirq 0x%x, dstapic 0x%x, dstirq 0x%x\n", srcbus, srcbusirq, dstapic, dstirq); - hexdump(__FUNCTION__, mpc, sizeof(*mpc)); + hexdump(__func__, mpc, sizeof(*mpc)); #endif } Modified: trunk/coreboot-v2/src/cpu/amd/model_gx2/cpubug.c =================================================================== --- trunk/coreboot-v2/src/cpu/amd/model_gx2/cpubug.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/cpu/amd/model_gx2/cpubug.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -169,7 +169,7 @@ { msr_t msr; - printk_debug("CPU_BUG:%s\n", __FUNCTION__); + printk_debug("CPU_BUG:%s\n", __func__); /* Clear bit 43, disables the sysenter/sysexit in CPUID3 */ msr = rdmsr(0x3003); msr.hi &= 0xFFFFF7FF; Modified: trunk/coreboot-v2/src/cpu/amd/sc520/sc520.c =================================================================== --- trunk/coreboot-v2/src/cpu/amd/sc520/sc520.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/cpu/amd/sc520/sc520.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -49,14 +49,14 @@ void sc520_enable_resources(struct device *dev) { unsigned char command; - printk_spew("%s\n", __FUNCTION__); + printk_spew("%s\n", __func__); command = pci_read_config8(dev, PCI_COMMAND); - printk_spew("========>%s, command 0x%x\n", __FUNCTION__, command); + printk_spew("========>%s, command 0x%x\n", __func__, command); command |= PCI_COMMAND_MEMORY | PCI_COMMAND_PARITY | PCI_COMMAND_SERR; - printk_spew("========>%s, command 0x%x\n", __FUNCTION__, command); + printk_spew("========>%s, command 0x%x\n", __func__, command); pci_write_config8(dev, PCI_COMMAND, command); command = pci_read_config8(dev, PCI_COMMAND); - printk_spew("========>%s, command 0x%x\n", __FUNCTION__, command); + printk_spew("========>%s, command 0x%x\n", __func__, command); /* */ @@ -85,7 +85,7 @@ static void pci_domain_read_resources(device_t dev) { struct resource *resource; - printk_spew("%s\n", __FUNCTION__); + printk_spew("%s\n", __func__); /* Initialize the system wide io space constraints */ resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0)); resource->limit = 0xffffUL; @@ -101,7 +101,7 @@ unsigned long basek, unsigned long sizek) { struct resource *resource; - printk_spew("%s sizek 0x%x\n", __FUNCTION__, sizek); + printk_spew("%s sizek 0x%x\n", __func__, sizek); if (!sizek) { return; } @@ -127,14 +127,14 @@ { struct resource *min; uint32_t tolm; - printk_spew("%s\n", __FUNCTION__); + printk_spew("%s\n", __func__); min = 0; search_bus_resources(bus, IORESOURCE_MEM, IORESOURCE_MEM, tolm_test, &min); tolm = 0xffffffffUL; if (min && tolm > min->base) { tolm = min->base; } - printk_spew("%s returns 0x%x\n", __FUNCTION__, tolm); + printk_spew("%s returns 0x%x\n", __func__, tolm); return tolm; } @@ -142,7 +142,7 @@ { device_t mc_dev; uint32_t pci_tolm; - printk_spew("%s\n", __FUNCTION__); + printk_spew("%s\n", __func__); pci_tolm = find_pci_tolm(&dev->link[0]); mc_dev = dev->link[0].children; if (mc_dev) { @@ -186,7 +186,7 @@ static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) { - printk_spew("%s\n", __FUNCTION__); + printk_spew("%s\n", __func__); max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max); return max; } @@ -195,20 +195,20 @@ #if 0 void sc520_enable_resources(device_t dev) { - printk_spew("%s\n", __FUNCTION__); + printk_spew("%s\n", __func__); printk_spew("THIS IS FOR THE SC520 =============================\n"); /* command = pci_read_config8(dev, PCI_COMMAND); - printk_spew("%s, command 0x%x\n", __FUNCTION__, command); + printk_spew("%s, command 0x%x\n", __func__, command); command |= PCI_COMMAND_MEMORY; - printk_spew("%s, command 0x%x\n", __FUNCTION__, command); + printk_spew("%s, command 0x%x\n", __func__, command); pci_write_config8(dev, PCI_COMMAND, command); command = pci_read_config8(dev, PCI_COMMAND); - printk_spew("%s, command 0x%x\n", __FUNCTION__, command); + printk_spew("%s, command 0x%x\n", __func__, command); */ enable_childrens_resources(dev); - printk_spew("%s\n", __FUNCTION__); + printk_spew("%s\n", __func__); } #endif @@ -247,7 +247,7 @@ static void enable_dev(struct device *dev) { - printk_spew("%s\n", __FUNCTION__); + printk_spew("%s\n", __func__); /* Set the operations if it is a special bus type */ if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { dev->ops = &pci_domain_ops; Modified: trunk/coreboot-v2/src/cpu/x86/mtrr/mtrr.c =================================================================== --- trunk/coreboot-v2/src/cpu/x86/mtrr/mtrr.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/cpu/x86/mtrr/mtrr.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -445,7 +445,7 @@ } printk_spew("call enable_var_mtrr()\n"); enable_var_mtrr(); - printk_spew("Leave %s\n", __FUNCTION__); + printk_spew("Leave %s\n", __func__); post_code(0x6A); } Modified: trunk/coreboot-v2/src/cpu/x86/tsc/delay_tsc.c =================================================================== --- trunk/coreboot-v2/src/cpu/x86/tsc/delay_tsc.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/cpu/x86/tsc/delay_tsc.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -131,7 +131,7 @@ printk_spew("32-bit delta %d\n", (unsigned long) delta); printk_spew("%s 32-bit result is %d\n", - __FUNCTION__, + __func__, result); return delta; } Modified: trunk/coreboot-v2/src/lib/malloc.c =================================================================== --- trunk/coreboot-v2/src/lib/malloc.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/lib/malloc.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -27,7 +27,7 @@ { void *p; - MALLOCDBG(("%s Enter, size %d, free_mem_ptr %p\n", __FUNCTION__, size, free_mem_ptr)); + MALLOCDBG(("%s Enter, size %d, free_mem_ptr %p\n", __func__, size, free_mem_ptr)); if (size < 0) die("Error! malloc: Size < 0"); if (free_mem_ptr <= 0) Modified: trunk/coreboot-v2/src/mainboard/amd/db800/mainboard.c =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/db800/mainboard.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/mainboard/amd/db800/mainboard.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -23,8 +23,8 @@ static void init(struct device *dev) { - printk_debug("AMD DB800 ENTER %s\n", __FUNCTION__); - printk_debug("AMD DB800 EXIT %s\n", __FUNCTION__); + printk_debug("AMD DB800 ENTER %s\n", __func__); + printk_debug("AMD DB800 EXIT %s\n", __func__); } static void enable_dev(struct device *dev) Modified: trunk/coreboot-v2/src/mainboard/amd/dbm690t/mainboard.c =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/dbm690t/mainboard.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/mainboard/amd/dbm690t/mainboard.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -210,12 +210,12 @@ /* TOP_MEM: the top of DRAM below 4G */ msr = rdmsr(TOP_MEM); printk_info("%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n", - __FUNCTION__, msr.lo, msr.hi); + __func__, msr.lo, msr.hi); /* TOP_MEM2: the top of DRAM above 4G */ msr2 = rdmsr(TOP_MEM2); printk_info("%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n", - __FUNCTION__, msr2.lo, msr2.hi); + __func__, msr2.lo, msr2.hi); switch (msr.lo) { case 0x10000000: /* 256M system memory */ @@ -237,7 +237,7 @@ uma_memory_start = msr.lo - uma_memory_size; /* TOP_MEM1 */ printk_info("%s: uma size 0x%08x, memory start 0x%08x\n", - __FUNCTION__, uma_memory_size, uma_memory_start); + __func__, uma_memory_size, uma_memory_start); /* TODO: TOP_MEM2 */ #else Modified: trunk/coreboot-v2/src/mainboard/amd/norwich/mainboard.c =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/norwich/mainboard.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/mainboard/amd/norwich/mainboard.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -23,8 +23,8 @@ static void init(struct device *dev) { - printk_debug("Norwich ENTER %s\n", __FUNCTION__); - printk_debug("Norwich EXIT %s\n", __FUNCTION__); + printk_debug("Norwich ENTER %s\n", __func__); + printk_debug("Norwich EXIT %s\n", __func__); } static void enable_dev(struct device *dev) Modified: trunk/coreboot-v2/src/mainboard/amd/pistachio/mainboard.c =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/pistachio/mainboard.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/mainboard/amd/pistachio/mainboard.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -282,12 +282,12 @@ /* TOP_MEM: the top of DRAM below 4G */ msr = rdmsr(TOP_MEM); printk_info("%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n", - __FUNCTION__, msr.lo, msr.hi); + __func__, msr.lo, msr.hi); /* TOP_MEM2: the top of DRAM above 4G */ msr2 = rdmsr(TOP_MEM2); printk_info("%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n", - __FUNCTION__, msr2.lo, msr2.hi); + __func__, msr2.lo, msr2.hi); switch (msr.lo) { case 0x10000000: /* 256M system memory */ @@ -309,7 +309,7 @@ uma_memory_start = msr.lo - uma_memory_size; /* TOP_MEM1 */ printk_info("%s: uma size 0x%08x, memory start 0x%08x\n", - __FUNCTION__, uma_memory_size, uma_memory_start); + __func__, uma_memory_size, uma_memory_start); /* TODO: TOP_MEM2 */ #else Modified: trunk/coreboot-v2/src/mainboard/amd/rumba/mainboard.c =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/rumba/mainboard.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/mainboard/amd/rumba/mainboard.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -16,11 +16,11 @@ if (mainboard->nicirq) nicirq = mainboard->nicirq; - printk_debug("AMD RUMBA ENTER %s\n", __FUNCTION__); + printk_debug("AMD RUMBA ENTER %s\n", __func__); if (nicirq) { printk_debug("%s (%x,%x)SET PCI interrupt line to %d\n", - __FUNCTION__, bus, devfn, nicirq); + __func__, bus, devfn, nicirq); nic = dev_find_slot(bus, devfn); if (! nic){ printk_err("Could not find NIC\n"); @@ -28,7 +28,7 @@ pci_write_config8(nic, PCI_INTERRUPT_LINE, nicirq); } } - printk_debug("AMD RUMBA EXIT %s\n", __FUNCTION__); + printk_debug("AMD RUMBA EXIT %s\n", __func__); } static void enable_dev(struct device *dev) Modified: trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/mainboard.c =================================================================== --- trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/mainboard.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/mainboard.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -40,11 +40,11 @@ static void init(struct device *dev) { // BOARD-SPECIFIC INIT - printk_debug("ARTECGROUP DBE61 ENTER %s\n", __FUNCTION__); + printk_debug("ARTECGROUP DBE61 ENTER %s\n", __func__); init_gpio(); - printk_debug("ARTECGROUP DBE61 EXIT %s\n", __FUNCTION__); + printk_debug("ARTECGROUP DBE61 EXIT %s\n", __func__); } static void enable_dev(struct device *dev) Modified: trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/mainboard.c =================================================================== --- trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/mainboard.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/mainboard.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -44,7 +44,7 @@ */ /* currently, nothing in the device to use, so ignore it. */ - printk_err("digital logic msm586 seg ENTER %s\n", __FUNCTION__); + printk_err("digital logic msm586 seg ENTER %s\n", __func__); /* from fuctory bios */ @@ -93,7 +93,7 @@ mmcr->sysarb.prictl = 0xc0000f0f; /* this is bios setting, depends on sysarb above */ mmcr->hostbridge.ctl = 0x108; - printk_err("digital logic msm586 seg EXIT %s\n", __FUNCTION__); + printk_err("digital logic msm586 seg EXIT %s\n", __func__); /* pio */ mmcr->pio.data31_16 = 0xffbf; Modified: trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/mainboard.c =================================================================== --- trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/mainboard.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/mainboard.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -23,8 +23,8 @@ static void init(struct device *dev) { - printk_debug("MSM800SEV ENTER %s\n", __FUNCTION__); - printk_debug("MSM800SEV EXIT %s\n", __FUNCTION__); + printk_debug("MSM800SEV ENTER %s\n", __func__); + printk_debug("MSM800SEV EXIT %s\n", __func__); } static void enable_dev(struct device *dev) Modified: trunk/coreboot-v2/src/mainboard/lippert/roadrunner-lx/mainboard.c =================================================================== --- trunk/coreboot-v2/src/mainboard/lippert/roadrunner-lx/mainboard.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/mainboard/lippert/roadrunner-lx/mainboard.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -42,7 +42,7 @@ { struct mainboard_lippert_roadrunner_lx_config *mb = dev->chip_info; unsigned int gpio_base, i; - printk_debug("LiPPERT RoadRunner-LX ENTER %s\n", __FUNCTION__); + printk_debug("LiPPERT RoadRunner-LX ENTER %s\n", __func__); /* Init CS5536 GPIOs. */ gpio_base = pci_read_config32(dev_find_device(PCI_VENDOR_ID_AMD, @@ -62,7 +62,7 @@ } outb(mb->sio_gp1x_config, 0x1220); /* Simple-I/O GP17-10 */ - printk_debug("LiPPERT RoadRunner-LX EXIT %s\n", __FUNCTION__); + printk_debug("LiPPERT RoadRunner-LX EXIT %s\n", __func__); } static void enable_dev(struct device *dev) Modified: trunk/coreboot-v2/src/mainboard/lippert/spacerunner-lx/mainboard.c =================================================================== --- trunk/coreboot-v2/src/mainboard/lippert/spacerunner-lx/mainboard.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/mainboard/lippert/spacerunner-lx/mainboard.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -43,7 +43,7 @@ { struct mainboard_lippert_spacerunner_lx_config *mb = dev->chip_info; unsigned int gpio_base, i; - printk_debug("LiPPERT SpaceRunner-LX ENTER %s\n", __FUNCTION__); + printk_debug("LiPPERT SpaceRunner-LX ENTER %s\n", __func__); /* Init CS5536 GPIOs */ gpio_base = pci_read_config32(dev_find_device(PCI_VENDOR_ID_AMD, @@ -66,7 +66,7 @@ } outb(mb->sio_gp1x_config, 0x1220); /* Simple-I/O GP17-10 */ - printk_debug("LiPPERT SpaceRunner-LX EXIT %s\n", __FUNCTION__); + printk_debug("LiPPERT SpaceRunner-LX EXIT %s\n", __func__); } static void enable_dev(struct device *dev) Modified: trunk/coreboot-v2/src/mainboard/olpc/btest/mainboard.c =================================================================== --- trunk/coreboot-v2/src/mainboard/olpc/btest/mainboard.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/mainboard/olpc/btest/mainboard.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -104,7 +104,7 @@ unsigned char usbirq = 0xa; */ - printk_debug("OLPC BTEST ENTER %s\n", __FUNCTION__); + printk_debug("OLPC BTEST ENTER %s\n", __func__); #if 0 /* I can't think of any reason NOT to just set this. If it turns out we want this to be @@ -112,7 +112,7 @@ */ printk_debug("%s (%x,%x)SET USB PCI interrupt line to %d\n", - __FUNCTION__, bus, devfn, usbirq); + __func__, bus, devfn, usbirq); usb = dev_find_slot(bus, devfn); if (! usb){ printk_err("Could not find USB\n"); @@ -123,7 +123,7 @@ init_dcon(); init_cafe_irq(); - printk_debug("OLPC BTEST EXIT %s\n", __FUNCTION__); + printk_debug("OLPC BTEST EXIT %s\n", __func__); } static void enable_dev(struct device *dev) Modified: trunk/coreboot-v2/src/mainboard/olpc/rev_a/mainboard.c =================================================================== --- trunk/coreboot-v2/src/mainboard/olpc/rev_a/mainboard.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/mainboard/olpc/rev_a/mainboard.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -76,7 +76,7 @@ unsigned char usbirq = 0xa; */ - printk_debug("OLPC REVA ENTER %s\n", __FUNCTION__); + printk_debug("OLPC REVA ENTER %s\n", __func__); #if 0 /* I can't think of any reason NOT to just set this. If it turns out we want this to be @@ -84,7 +84,7 @@ */ printk_debug("%s (%x,%x)SET USB PCI interrupt line to %d\n", - __FUNCTION__, bus, devfn, usbirq); + __func__, bus, devfn, usbirq); usb = dev_find_slot(bus, devfn); if (! usb){ printk_err("Could not find USB\n"); @@ -94,7 +94,7 @@ #endif init_dcon(); - printk_debug("OLPC REVA EXIT %s\n", __FUNCTION__); + printk_debug("OLPC REVA EXIT %s\n", __func__); } static void enable_dev(struct device *dev) Modified: trunk/coreboot-v2/src/mainboard/pcengines/alix1c/mainboard.c =================================================================== --- trunk/coreboot-v2/src/mainboard/pcengines/alix1c/mainboard.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/mainboard/pcengines/alix1c/mainboard.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -23,8 +23,8 @@ static void init(struct device *dev) { - printk_debug("ALIX1.C ENTER %s\n", __FUNCTION__); - printk_debug("ALIX1.C EXIT %s\n", __FUNCTION__); + printk_debug("ALIX1.C ENTER %s\n", __func__); + printk_debug("ALIX1.C EXIT %s\n", __func__); } static void enable_dev(struct device *dev) Modified: trunk/coreboot-v2/src/mainboard/technologic/ts5300/mainboard.c =================================================================== --- trunk/coreboot-v2/src/mainboard/technologic/ts5300/mainboard.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/mainboard/technologic/ts5300/mainboard.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -40,7 +40,7 @@ volatile struct mmcr *mmcr = MMCRDEFAULT; /* currently, nothing in the device to use, so ignore it. */ - printk_err("Technologic Systems 5300 ENTER %s\n", __FUNCTION__); + printk_err("Technologic Systems 5300 ENTER %s\n", __func__); /* from fuctory bios */ /* NOTE: the following interrupt settings made interrupts work @@ -144,7 +144,7 @@ rom_start = 0x09400000 + 0xe0000; rom_end = rom_start + PAYLOAD_SIZE - 1; - printk_err("TS5300 EXIT %s\n", __FUNCTION__); + printk_err("TS5300 EXIT %s\n", __func__); } Modified: trunk/coreboot-v2/src/northbridge/amd/gx1/northbridge.c =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/gx1/northbridge.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/northbridge/amd/gx1/northbridge.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -42,7 +42,7 @@ static void northbridge_init(device_t dev) { - printk_debug("northbridge: %s()\n", __FUNCTION__); + printk_debug("northbridge: %s()\n", __func__); optimize_xbus(dev); enable_shadow(dev); @@ -74,7 +74,7 @@ { struct resource *resource; - printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __FUNCTION__); + printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __func__); /* Initialize the system wide io space constraints */ resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0)); @@ -191,7 +191,7 @@ static void cpu_bus_init(device_t dev) { - printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __FUNCTION__); + printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __func__); initialize_cpus(&dev->link[0]); } @@ -209,7 +209,7 @@ static void enable_dev(struct device *dev) { - printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __FUNCTION__); + printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __func__); /* Set the operations if it is a special bus type */ if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { printk_spew("DEVICE_PATH_PCI_DOMAIN\n"); Modified: trunk/coreboot-v2/src/northbridge/amd/gx2/northbridge.c =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/gx2/northbridge.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/northbridge/amd/gx2/northbridge.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -127,7 +127,7 @@ /* Set up IRQ steering */ uint32_t pciAddr = 0x80000000 | (CHIPSET_DEV_NUM << 11) | 0x5C; - printk_debug("%s(%08X [%08X], %04X)\n", __FUNCTION__, dev, pciAddr, irq_map); + printk_debug("%s(%08X [%08X], %04X)\n", __func__, dev, pciAddr, irq_map); /* The IRQ steering values (in hex) are effectively dcba, where: * <a> represents the IRQ for INTA, @@ -281,7 +281,7 @@ unsigned long m; struct northbridge_amd_gx2_config *nb = (struct northbridge_amd_gx2_config *)dev->chip_info; - printk_debug("northbridge: %s()\n", __FUNCTION__); + printk_debug("northbridge: %s()\n", __func__); enable_shadow(dev); irq_init_steering(dev, nb->irqmap); @@ -362,7 +362,7 @@ { struct resource *resource; - printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __FUNCTION__); + printk_spew("%s:%s()\n", NORTHBRIDGE_FILE, __func__); /* Initialize the system wide io space constraints */ resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0)); Modified: trunk/coreboot-v2/src/northbridge/amd/gx2/northbridgeinit.c =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/gx2/northbridgeinit.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/northbridge/amd/gx2/northbridgeinit.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -112,10 +112,10 @@ msr.lo = gl->lo; msr.hi = gl->hi; wrmsr(gl->desc_name, msr); // MSR - see table above - printk_debug("%s: write msr 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__, gl->desc_name, msr.hi, msr.lo); + printk_debug("%s: write msr 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo); /* they do this, so we do this */ msr = rdmsr(gl->desc_name); - printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__, gl->desc_name, msr.hi, msr.lo); + printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo); } static void @@ -147,7 +147,7 @@ * system. We will adjust for SMM and DMM now and Frame Buffer later. */ sizembytes = sizeram(); - printk_debug("%s: enable for %dm bytes\n", __FUNCTION__, sizembytes); + printk_debug("%s: enable for %dm bytes\n", __func__, sizembytes); sizebytes = sizembytes << 20; sizebytes -= SMM_SIZE*1024 +1; @@ -164,7 +164,7 @@ msr.lo = sizebytes; wrmsr(gl->desc_name, msr); // MSR - see table above msr = rdmsr(gl->desc_name); - printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__, + printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo); } @@ -177,11 +177,11 @@ if (! havedmi) return; - printk_debug("%s: %d bytes\n", __FUNCTION__, sizebytes); + printk_debug("%s: %d bytes\n", __func__, sizebytes); sizebytes -= DMM_SIZE*1024; offset = sizebytes - DMM_OFFSET; - printk_debug("%s: offset is 0x%08x\n", __FUNCTION__, offset); + printk_debug("%s: offset is 0x%08x\n", __func__, offset); offset >>= 12; msr.hi = (gl->hi) | (offset << 8); /* I don't think this is needed */ @@ -192,7 +192,7 @@ wrmsr(gl->desc_name, msr); // MSR - See table above msr = rdmsr(gl->desc_name); - printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__, gl->desc_name, msr.hi, msr.lo); + printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo); } static void @@ -202,7 +202,7 @@ if (! havedmi) return; - printk_debug("%s:\n", __FUNCTION__ ); + printk_debug("%s:\n", __func__ ); msr.hi = gl->hi; /* I don't think this is needed */ @@ -210,12 +210,12 @@ msr.hi |= (DMM_OFFSET >> 24); msr.lo = DMM_OFFSET << 8; /* hmm. AMD source has SMM here ... SMM, not DMM? We think DMM */ - printk_err("%s: warning, using DMM_SIZE even though AMD used SMM_SIZE\n", __FUNCTION__); + printk_err("%s: warning, using DMM_SIZE even though AMD used SMM_SIZE\n", __func__); msr.lo |= ((~(DMM_SIZE*1024)+1)>>12)&0xfffff; wrmsr(gl->desc_name, msr); // MSR - See table above msr = rdmsr(gl->desc_name); - printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__, gl->desc_name, msr.hi, msr.lo); + printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo); } static void SMMGL0Init(struct gliutable *gl) { @@ -228,10 +228,10 @@ if (havedmi) sizebytes -= DMM_SIZE * 1024; - printk_debug("%s: %d bytes\n", __FUNCTION__, sizebytes); + printk_debug("%s: %d bytes\n", __func__, sizebytes); offset = sizebytes - SMM_OFFSET; - printk_debug("%s: offset is 0x%08x\n", __FUNCTION__, offset); + printk_debug("%s: offset is 0x%08x\n", __func__, offset); offset >>= 12; msr.hi = offset << 8; @@ -242,12 +242,12 @@ wrmsr(gl->desc_name, msr); // MSR - See table above msr = rdmsr(gl->desc_name); - printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__, gl->desc_name, msr.hi, msr.lo); + printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo); } static void SMMGL1Init(struct gliutable *gl) { msr_t msr; - printk_debug("%s:\n", __FUNCTION__ ); + printk_debug("%s:\n", __func__ ); msr.hi = gl->hi; /* I don't think this is needed */ @@ -258,7 +258,7 @@ wrmsr(gl->desc_name, msr); // MSR - See table above msr = rdmsr(gl->desc_name); - printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__, gl->desc_name, msr.hi, msr.lo); + printk_debug("%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo); } static void @@ -507,10 +507,10 @@ for(i = 0; gating->msrnum != 0xffffffff; i++) { msr = rdmsr(gating->msrnum); - printk_debug("%s: MSR 0x%08x is 0x%08x:0x%08x\n", __FUNCTION__, gating->msrnum, msr.hi, msr.lo); + printk_debug("%s: MSR 0x%08x is 0x%08x:0x%08x\n", __func__, gating->msrnum, msr.hi, msr.lo); msr.hi |= gating->msr.hi; msr.lo |= gating->msr.lo; - printk_debug("%s: MSR 0x%08x will be set to 0x%08x:0x%08x\n", __FUNCTION__, + printk_debug("%s: MSR 0x%08x will be set to 0x%08x:0x%08x\n", __func__, gating->msrnum, msr.hi, msr.lo); wrmsr(gating->msrnum, msr); // MSR - See the table above gating +=1; @@ -526,11 +526,11 @@ for(i = 0; prio->msrnum != 0xffffffff; i++) { msr = rdmsr(prio->msrnum); - printk_debug("%s: MSR 0x%08x is 0x%08x:0x%08x\n", __FUNCTION__, prio->msrnum, msr.hi, msr.lo); + printk_debug("%s: MSR 0x%08x is 0x%08x:0x%08x\n", __func__, prio->msrnum, msr.hi, msr.lo); msr.hi |= prio->msr.hi; msr.lo &= ~0xfff; msr.lo |= prio->msr.lo; - printk_debug("%s: MSR 0x%08x will be set to 0x%08x:0x%08x\n", __FUNCTION__, + printk_debug("%s: MSR 0x%08x will be set to 0x%08x:0x%08x\n", __func__, prio->msrnum, msr.hi, msr.lo); wrmsr(prio->msrnum, msr); // MSR - See the table above prio +=1; @@ -772,7 +772,7 @@ { msr_t msr; int i; - printk_debug("Enter %s\n", __FUNCTION__); + printk_debug("Enter %s\n", __func__); for(i = 0; gliutables[i]; i++) GLIUInit(gliutables[i]); @@ -803,6 +803,6 @@ ClockGatingInit(); __asm__("FINIT\n"); /* CPUBugsFix -- called elsewhere */ - printk_debug("Exit %s\n", __FUNCTION__); + printk_debug("Exit %s\n", __func__); } Modified: trunk/coreboot-v2/src/northbridge/amd/lx/northbridge.c =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/lx/northbridge.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/northbridge/amd/lx/northbridge.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -308,7 +308,7 @@ { //msr_t msr; - printk_spew(">> Entering northbridge.c: %s\n", __FUNCTION__); + printk_spew(">> Entering northbridge.c: %s\n", __func__); enable_shadow(dev); /* @@ -385,7 +385,7 @@ static void pci_domain_read_resources(device_t dev) { struct resource *resource; - printk_spew(">> Entering northbridge.c: %s\n", __FUNCTION__); + printk_spew(">> Entering northbridge.c: %s\n", __func__); /* Initialize the system wide io space constraints */ resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); @@ -420,7 +420,7 @@ int idx; device_t mc_dev; - printk_spew(">> Entering northbridge.c: %s\n", __FUNCTION__); + printk_spew(">> Entering northbridge.c: %s\n", __func__); mc_dev = dev->link[0].children; if (mc_dev) { @@ -436,7 +436,7 @@ static void pci_domain_enable(device_t dev) { - printk_spew(">> Entering northbridge.c: %s\n", __FUNCTION__); + printk_spew(">> Entering northbridge.c: %s\n", __func__); // do this here for now -- this chip really breaks our device model northbridge_init_early(); @@ -459,7 +459,7 @@ static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) { - printk_spew(">> Entering northbridge.c: %s\n", __FUNCTION__); + printk_spew(">> Entering northbridge.c: %s\n", __func__); max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max); return max; @@ -475,7 +475,7 @@ static void cpu_bus_init(device_t dev) { - printk_spew(">> Entering northbridge.c: %s\n", __FUNCTION__); + printk_spew(">> Entering northbridge.c: %s\n", __func__); initialize_cpus(&dev->link[0]); } @@ -495,7 +495,7 @@ static void enable_dev(struct device *dev) { printk_spew(">> Entering northbridge.c: %s with path %d\n", - __FUNCTION__, dev->path.type); + __func__, dev->path.type); /* Set the operations if it is a special bus type */ if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) Modified: trunk/coreboot-v2/src/northbridge/amd/lx/northbridgeinit.c =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/lx/northbridgeinit.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/northbridge/amd/lx/northbridgeinit.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -108,7 +108,7 @@ msr.lo = gl->lo; msr.hi = gl->hi; wrmsr(gl->desc_name, msr); // MSR - see table above - printk_debug("%s: MSR 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__, gl->desc_name, msr.hi, msr.lo); // GX3 + printk_debug("%s: MSR 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo); // GX3 } static void ShadowInit(struct gliutable *gl) @@ -133,7 +133,7 @@ * system. We will adjust for SMM now and Frame Buffer later. */ sizembytes = sizeram(); - printk_debug("%s: enable for %dMBytes\n", __FUNCTION__, sizembytes); + printk_debug("%s: enable for %dMBytes\n", __func__, sizembytes); sizebytes = sizembytes << 20; sizebytes -= ((SMM_SIZE * 1024) + 1); @@ -149,7 +149,7 @@ msr.lo = sizebytes; wrmsr(gl->desc_name, msr); // MSR - see table above - printk_debug("%s: MSR 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__, + printk_debug("%s: MSR 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo); } @@ -161,12 +161,12 @@ sizebytes -= (SMM_SIZE * 1024); - printk_debug("%s: %d bytes\n", __FUNCTION__, sizebytes); + printk_debug("%s: %d bytes\n", __func__, sizebytes); /* calculate the Two's complement offset */ offset = sizebytes - SMM_OFFSET; offset = (offset >> 12) & 0x000fffff; - printk_debug("%s: offset is 0x%08x\n", __FUNCTION__, SMM_OFFSET); + printk_debug("%s: offset is 0x%08x\n", __func__, SMM_OFFSET); msr.hi = offset << 8 | gl->hi; msr.hi |= SMM_OFFSET >> 24; @@ -175,14 +175,14 @@ msr.lo |= ((~(SMM_SIZE * 1024) + 1) >> 12) & 0xfffff; wrmsr(gl->desc_name, msr); // MSR - See table above - printk_debug("%s: MSR 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__, + printk_debug("%s: MSR 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo); } static void SMMGL1Init(struct gliutable *gl) { msr_t msr; - printk_debug("%s:\n", __FUNCTION__); + printk_debug("%s:\n", __func__); msr.hi = gl->hi; /* I don't think this is needed */ @@ -192,7 +192,7 @@ msr.lo |= ((~(SMM_SIZE * 1024) + 1) >> 12) & 0xfffff; wrmsr(gl->desc_name, msr); // MSR - See table above - printk_debug("%s: MSR 0x%08x, val 0x%08x:0x%08x\n", __FUNCTION__, + printk_debug("%s: MSR 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo); } @@ -437,7 +437,7 @@ msr = rdmsr(gating->msrnum); msr.hi |= gating->msr.hi; msr.lo |= gating->msr.lo; - /* printk_debug("%s: MSR 0x%08x will be set to 0x%08x:0x%08x\n", __FUNCTION__, + /* printk_debug("%s: MSR 0x%08x will be set to 0x%08x:0x%08x\n", __func__, gating->msrnum, msr.hi, msr.lo); */// GX3 wrmsr(gating->msrnum, msr); // MSR - See the table above gating += 1; @@ -456,7 +456,7 @@ msr.hi |= prio->msr.hi; msr.lo &= ~0xfff; msr.lo |= prio->msr.lo; - /* printk_debug("%s: MSR 0x%08x will be set to 0x%08x:0x%08x\n", __FUNCTION__, + /* printk_debug("%s: MSR 0x%08x will be set to 0x%08x:0x%08x\n", __func__, prio->msrnum, msr.hi, msr.lo); */// GX3 wrmsr(prio->msrnum, msr); // MSR - See the table above prio += 1; @@ -751,7 +751,7 @@ { msr_t msr; int i; - printk_debug("Enter %s\n", __FUNCTION__); + printk_debug("Enter %s\n", __func__); for (i = 0; gliutables[i]; i++) GLIUInit(gliutables[i]); @@ -771,5 +771,5 @@ ClockGatingInit(); __asm__ __volatile__("FINIT\n"); - printk_debug("Exit %s\n", __FUNCTION__); + printk_debug("Exit %s\n", __func__); } Modified: trunk/coreboot-v2/src/pc80/ide/ide.c =================================================================== --- trunk/coreboot-v2/src/pc80/ide/ide.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/pc80/ide/ide.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -343,7 +343,7 @@ info->slave | IDE_DH_LBA; cmd.command = IDE_CMD_READ_SECTORS; - //printk_debug("%s: sector= %ld, device command= 0x%x.\n",__FUNCTION__,(unsigned long) sector, cmd.device); + //printk_debug("%s: sector= %ld, device command= 0x%x.\n",__func__,(unsigned long) sector, cmd.device); #ifdef __BIG_ENDIAN return pio_data_in_sw(info->ctrl, &cmd, buffer, IDE_SECTOR_SIZE); #else /* __BIG_ENDIAN */ Modified: trunk/coreboot-v2/src/southbridge/amd/cs5535/cs5535.c =================================================================== --- trunk/coreboot-v2/src/southbridge/amd/cs5535/cs5535.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/southbridge/amd/cs5535/cs5535.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -46,7 +46,7 @@ static void southbridge_init(struct device *dev) { - printk_spew("cs5535: %s\n", __FUNCTION__); + printk_spew("cs5535: %s\n", __func__); nvram_on(dev); } @@ -66,12 +66,12 @@ static void southbridge_enable(struct device *dev) { - printk_spew("%s: dev is %p\n", __FUNCTION__, dev); + printk_spew("%s: dev is %p\n", __func__, dev); } static void cs5535_pci_dev_enable_resources(device_t dev) { - printk_spew("cs5535.c: %s()\n", __FUNCTION__); + printk_spew("cs5535.c: %s()\n", __func__); pci_dev_enable_resources(dev); enable_childrens_resources(dev); } Modified: trunk/coreboot-v2/src/southbridge/amd/cs5535/cs5535_ide.c =================================================================== --- trunk/coreboot-v2/src/southbridge/amd/cs5535/cs5535_ide.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/southbridge/amd/cs5535/cs5535_ide.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -7,12 +7,12 @@ static void ide_init(struct device *dev) { - printk_spew("cs5535_ide: %s\n", __FUNCTION__); + printk_spew("cs5535_ide: %s\n", __func__); } static void ide_enable(struct device *dev) { - printk_spew("cs5535_ide: %s\n", __FUNCTION__); + printk_spew("cs5535_ide: %s\n", __func__); } static struct device_operations ide_ops = { Modified: trunk/coreboot-v2/src/southbridge/amd/cs5536/cs5536.c =================================================================== --- trunk/coreboot-v2/src/southbridge/amd/cs5536/cs5536.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/southbridge/amd/cs5536/cs5536.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -579,7 +579,7 @@ * unsigned short gpiobase = MDD_GPIO; */ - printk_err("cs5536: %s\n", __FUNCTION__); + printk_err("cs5536: %s\n", __func__); setup_i8259(); lpc_init(sb); uarts_init(sb); @@ -591,7 +591,7 @@ (sb->enable_gpio_int_route >> 16)); } - printk_err("cs5536: %s: enable_ide_nand_flash is %d\n", __FUNCTION__, + printk_err("cs5536: %s: enable_ide_nand_flash is %d\n", __func__, sb->enable_ide_nand_flash); if (sb->enable_ide_nand_flash == 1) { enable_ide_nand_flash_header(); @@ -610,13 +610,13 @@ static void southbridge_enable(struct device *dev) { - printk_err("cs5536: %s: dev is %p\n", __FUNCTION__, dev); + printk_err("cs5536: %s: dev is %p\n", __func__, dev); } static void cs5536_pci_dev_enable_resources(device_t dev) { - printk_err("cs5536: %s()\n", __FUNCTION__); + printk_err("cs5536: %s()\n", __func__); pci_dev_enable_resources(dev); enable_childrens_resources(dev); } Modified: trunk/coreboot-v2/src/southbridge/amd/cs5536/cs5536_ide.c =================================================================== --- trunk/coreboot-v2/src/southbridge/amd/cs5536/cs5536_ide.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/southbridge/amd/cs5536/cs5536_ide.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -36,7 +36,7 @@ { uint32_t ide_cfg; - printk_spew("cs5536_ide: %s\n", __FUNCTION__); + printk_spew("cs5536_ide: %s\n", __func__); /* GPIO and IRQ setup are handled in the main chipset code. */ // Enable the channel and Post Write Buffer @@ -49,7 +49,7 @@ static void ide_enable(struct device *dev) { - printk_spew("cs5536_ide: %s\n", __FUNCTION__); + printk_spew("cs5536_ide: %s\n", __func__); } Modified: trunk/coreboot-v2/src/southbridge/via/vt8231/vt8231_ide.c =================================================================== --- trunk/coreboot-v2/src/southbridge/via/vt8231/vt8231_ide.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/southbridge/via/vt8231/vt8231_ide.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -20,7 +20,7 @@ */ /* - printk_info("%s: enabling compatibility IDE addresses\n", __FUNCTION__); + printk_info("%s: enabling compatibility IDE addresses\n", __func__); enables = pci_read_config8(dev, 0x42); printk_debug("enables in reg 0x42 0x%x\n", enables); enables &= ~0xc0; // compatability mode Modified: trunk/coreboot-v2/src/southbridge/via/vt8231/vt8231_lpc.c =================================================================== --- trunk/coreboot-v2/src/southbridge/via/vt8231/vt8231_lpc.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/southbridge/via/vt8231/vt8231_lpc.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -24,7 +24,7 @@ static void pci_routing_fixup(struct device *dev) { - printk_info("%s: dev is %p\n", __FUNCTION__, dev); + printk_info("%s: dev is %p\n", __func__, dev); if (dev) { /* initialize PCI interupts - these assignments depend on the PCB routing of PINTA-D @@ -50,7 +50,7 @@ // PCI slot printk_info("setting pci slot\n"); pci_assign_irqs(0, 0x14, slotIrqs); - printk_info("%s: DONE\n", __FUNCTION__); + printk_info("%s: DONE\n", __func__); } static void vt8231_init(struct device *dev) Modified: trunk/coreboot-v2/src/southbridge/via/vt8235/vt8235_ide.c =================================================================== --- trunk/coreboot-v2/src/southbridge/via/vt8235/vt8235_ide.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/southbridge/via/vt8235/vt8235_ide.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -20,7 +20,7 @@ * reason. */ printk_info("%s: enabling compatibility IDE addresses\n", - __FUNCTION__); + __func__); enables = pci_read_config8(dev, 0x42); printk_debug("enables in reg 0x42 0x%x\n", enables); enables &= ~0xc0; // compatability mode Modified: trunk/coreboot-v2/src/southbridge/via/vt8235/vt8235_lpc.c =================================================================== --- trunk/coreboot-v2/src/southbridge/via/vt8235/vt8235_lpc.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/southbridge/via/vt8235/vt8235_lpc.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -57,7 +57,7 @@ static void pci_routing_fixup(struct device *dev) { - printk_info("%s: dev is %p\n", __FUNCTION__, dev); + printk_info("%s: dev is %p\n", __func__, dev); /* set up PCI IRQ routing */ pci_write_config8(dev, 0x55, pciIrqs[0] << 4); @@ -97,7 +97,7 @@ printk_info("setting riser slot\n"); pci_assign_irqs(0, 0x13, pin_to_irq(riserPins)); - printk_spew("%s: DONE\n", __FUNCTION__); + printk_spew("%s: DONE\n", __func__); } /* Modified: trunk/coreboot-v2/src/stream/rom_stream.c =================================================================== --- trunk/coreboot-v2/src/stream/rom_stream.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/stream/rom_stream.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -124,7 +124,7 @@ bytes = count; if ((rom + bytes - 1) > rom_end) { printk_warning("%6d:%s() - overflowed source buffer\n", - __LINE__, __FUNCTION__); + __LINE__, __func__); bytes = 0; if (rom <= rom_end) { bytes = (rom_end - rom) + 1; Modified: trunk/coreboot-v2/src/stream/serial_stream.c =================================================================== --- trunk/coreboot-v2/src/stream/serial_stream.c 2009-02-12 16:02:16 UTC (rev 3942) +++ trunk/coreboot-v2/src/stream/serial_stream.c 2009-02-12 21:30:06 UTC (rev 3943) @@ -73,7 +73,7 @@ { if ((stream_start + count) > stream_end) { printk_warning("%6d:%s() - overflowed source buffer\n", - __LINE__, __FUNCTION__); + __LINE__, __func__); count = 0; if (stream_start <= stream_end) { count = (stream_end - stream_start) + 1;

1 0

r1131 - in coreboot-v3: arch/x86 device lib northbridge/amd/geodelx northbridge/via/cn700 southbridge/amd/cs5536 util/lar util/x86emu/yabel
by svn＠coreboot.org 12 Feb '09

12 Feb '09

Author: myles Date: 2009-02-12 22:15:34 +0100 (Thu, 12 Feb 2009) New Revision: 1131 Modified: coreboot-v3/arch/x86/mtrr.c coreboot-v3/arch/x86/pirq_routing.c coreboot-v3/device/device.c coreboot-v3/device/device_util.c coreboot-v3/device/pci_device.c coreboot-v3/lib/elfboot.c coreboot-v3/northbridge/amd/geodelx/geodelx.c coreboot-v3/northbridge/amd/geodelx/geodelxinit.c coreboot-v3/northbridge/via/cn700/apic.c coreboot-v3/southbridge/amd/cs5536/cs5536.c coreboot-v3/southbridge/amd/cs5536/irq_tables.c coreboot-v3/util/lar/lib.c coreboot-v3/util/lar/stream.c coreboot-v3/util/x86emu/yabel/debug.c coreboot-v3/util/x86emu/yabel/device.c coreboot-v3/util/x86emu/yabel/interrupt.c coreboot-v3/util/x86emu/yabel/io.c coreboot-v3/util/x86emu/yabel/mem.c coreboot-v3/util/x86emu/yabel/pmm.c coreboot-v3/util/x86emu/yabel/vbe.c Log: This patch converts __FUNCTION__ to __func__, since __func__ is standard. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: coreboot-v3/arch/x86/mtrr.c =================================================================== --- coreboot-v3/arch/x86/mtrr.c 2009-02-12 19:41:05 UTC (rev 1130) +++ coreboot-v3/arch/x86/mtrr.c 2009-02-12 21:15:34 UTC (rev 1131) @@ -411,7 +411,7 @@ } printk(BIOS_SPEW, "call enable_var_mtrr()\n"); enable_var_mtrr(); - printk(BIOS_SPEW, "Leave %s\n", __FUNCTION__); + printk(BIOS_SPEW, "Leave %s\n", __func__); post_code(0x6A); } Modified: coreboot-v3/arch/x86/pirq_routing.c =================================================================== --- coreboot-v3/arch/x86/pirq_routing.c 2009-02-12 19:41:05 UTC (rev 1130) +++ coreboot-v3/arch/x86/pirq_routing.c 2009-02-12 21:15:34 UTC (rev 1131) @@ -40,7 +40,7 @@ sum += addr[i]; printk(BIOS_DEBUG, "%s() - irq_routing_table located at: 0x%p\n", - __FUNCTION__, addr); + __func__, addr); sum = rt->checksum - sum; @@ -48,7 +48,7 @@ if (sum != rt->checksum) { printk(BIOS_WARNING, "%s:%6d:%s() - " "checksum is: 0x%02x but should be: 0x%02x\n", - __FILE__, __LINE__, __FUNCTION__, rt->checksum, sum); + __FILE__, __LINE__, __func__, rt->checksum, sum); rt->checksum = sum; } @@ -56,7 +56,7 @@ rt->size % 16 ) { printk(BIOS_WARNING, "%s:%6d:%s() - " "Interrupt Routing Table not valid\n", - __FILE__, __LINE__, __FUNCTION__); + __FILE__, __LINE__, __func__); return; } @@ -67,7 +67,7 @@ if (sum) { printk(BIOS_WARNING, "%s:%6d:%s() - " "checksum error in irq routing table\n", - __FILE__, __LINE__, __FUNCTION__); + __FILE__, __LINE__, __func__); } printk(BIOS_INFO, "done.\n"); Modified: coreboot-v3/device/device.c =================================================================== --- coreboot-v3/device/device.c 2009-02-12 19:41:05 UTC (rev 1130) +++ coreboot-v3/device/device.c 2009-02-12 21:15:34 UTC (rev 1131) @@ -72,7 +72,7 @@ { devcnt++; - printk(BIOS_SPEW, "%s: devcnt %d\n", __FUNCTION__, devcnt); + printk(BIOS_SPEW, "%s: devcnt %d\n", __func__, devcnt); /* Should we really die here? */ if (devcnt >= MAX_DEVICES) { die("Too many devices. Increase MAX_DEVICES\n"); @@ -946,13 +946,13 @@ } if (!dev->ops) { printk(BIOS_WARNING, "%s: %s(%s) missing ops\n", - __FUNCTION__, dev->dtsname, dev_path(dev)); + __func__, dev->dtsname, dev_path(dev)); return; } if (!dev->ops->phase5_enable_resources) { printk(BIOS_WARNING, "%s: %s(%s) ops are missing phase5_enable_resources\n", - __FUNCTION__, dev->dtsname, dev_path(dev)); + __func__, dev->dtsname, dev_path(dev)); return; } @@ -1055,19 +1055,19 @@ if (!busdevice || !busdevice->enabled || !busdevice->ops || !busdevice->ops->phase3_scan) { printk(BIOS_INFO, "%s: busdevice %s: enabled %d ops %s\n", - __FUNCTION__, busdevice ? busdevice->dtsname : "NULL", + __func__, busdevice ? busdevice->dtsname : "NULL", busdevice ? busdevice->enabled : 0, busdevice ? (busdevice->ops? "NOT NULL" : "NULL") : "N/A"); printk(BIOS_INFO, "%s: can not scan from here, returning %d\n", - __FUNCTION__, max); + __func__, max); return max; } do_phase3 = 1; while (do_phase3) { int link; - printk(BIOS_INFO, "%s: scanning %s(%s)\n", __FUNCTION__, + printk(BIOS_INFO, "%s: scanning %s(%s)\n", __func__, busdevice->dtsname, dev_path(busdevice)); #warning do we call phase3_enable here. new_max = busdevice->ops->phase3_scan(busdevice, max); @@ -1084,7 +1084,7 @@ } } post_code(POST_STAGE2_PHASE3_SCAN_EXIT); - printk(BIOS_INFO, "%s: returning %d\n", __FUNCTION__, max); + printk(BIOS_INFO, "%s: returning %d\n", __func__, max); return new_max; } Modified: coreboot-v3/device/device_util.c =================================================================== --- coreboot-v3/device/device_util.c 2009-02-12 19:41:05 UTC (rev 1130) +++ coreboot-v3/device/device_util.c 2009-02-12 21:15:34 UTC (rev 1131) @@ -125,7 +125,7 @@ */ struct device *dev_find_device(struct device_id *devid, struct device *from) { - printk(BIOS_SPEW, "%s: find %s\n", __FUNCTION__, dev_id_string(devid)); + printk(BIOS_SPEW, "%s: find %s\n", __func__, dev_id_string(devid)); if (!from) from = all_devices; Modified: coreboot-v3/device/pci_device.c =================================================================== --- coreboot-v3/device/pci_device.c 2009-02-12 19:41:05 UTC (rev 1130) +++ coreboot-v3/device/pci_device.c 2009-02-12 21:15:34 UTC (rev 1131) @@ -940,7 +940,7 @@ if ((*list)->path.type != DEVICE_PATH_PCI) { printk(BIOS_NOTICE, "%s: child %s(%s) not a pci device: it's type %d\n", - __FUNCTION__, (*list)->dtsname, dev_path(*list), + __func__, (*list)->dtsname, dev_path(*list), (*list)->path.type); continue; } Modified: coreboot-v3/lib/elfboot.c =================================================================== --- coreboot-v3/lib/elfboot.c 2009-02-12 19:41:05 UTC (rev 1130) +++ coreboot-v3/lib/elfboot.c 2009-02-12 21:15:34 UTC (rev 1131) @@ -86,7 +86,7 @@ ehdr = (Elf_ehdr *)header; phdr = (Elf_phdr *)(&header[ehdr->e_phoff]); - printk(BIOS_DEBUG, "%s: header %p #headers %d\n", __FUNCTION__, header, headers); + printk(BIOS_DEBUG, "%s: header %p #headers %d\n", __func__, header, headers); int i; int size; for(i = 0; i < headers; i++) { Modified: coreboot-v3/northbridge/amd/geodelx/geodelx.c =================================================================== --- coreboot-v3/northbridge/amd/geodelx/geodelx.c 2009-02-12 19:41:05 UTC (rev 1130) +++ coreboot-v3/northbridge/amd/geodelx/geodelx.c 2009-02-12 21:15:34 UTC (rev 1131) @@ -81,7 +81,7 @@ */ static void geodelx_northbridge_init(struct device *dev) { - printk(BIOS_SPEW, ">> Entering northbridge.c: %s\n", __FUNCTION__); + printk(BIOS_SPEW, ">> Entering northbridge.c: %s\n", __func__); enable_shadow(dev); } @@ -201,7 +201,7 @@ { void do_vsmbios(void); - printk(BIOS_SPEW, ">> Entering northbridge.c: %s\n", __FUNCTION__); + printk(BIOS_SPEW, ">> Entering northbridge.c: %s\n", __func__); /* northbridge_init_early(); */ chipsetinit(); @@ -237,8 +237,8 @@ */ static void cpu_bus_init(struct device *dev) { - printk(BIOS_SPEW, ">> Entering northbridge.c: %s\n", __FUNCTION__); - printk(BIOS_SPEW, ">> Exiting northbridge.c: %s\n", __FUNCTION__); + printk(BIOS_SPEW, ">> Entering northbridge.c: %s\n", __func__); + printk(BIOS_SPEW, ">> Exiting northbridge.c: %s\n", __func__); } static void cpu_bus_noop(struct device *dev) Modified: coreboot-v3/northbridge/amd/geodelx/geodelxinit.c =================================================================== --- coreboot-v3/northbridge/amd/geodelx/geodelxinit.c 2009-02-12 19:41:05 UTC (rev 1130) +++ coreboot-v3/northbridge/amd/geodelx/geodelxinit.c 2009-02-12 21:15:34 UTC (rev 1131) @@ -66,7 +66,7 @@ msr.hi = gl->hi; wrmsr(gl->desc_name, msr); printk(BIOS_SPEW, "%s: MSR 0x%08lx, val 0x%08x:0x%08x\n", - __FUNCTION__, gl->desc_name, msr.hi, msr.lo); + __func__, gl->desc_name, msr.hi, msr.lo); } /** @@ -143,7 +143,7 @@ */ sizembytes = sizeram(); printk(BIOS_DEBUG, "%s: enable for %dMBytes\n", - __FUNCTION__, sizembytes); + __func__, sizembytes); sizebytes = sizembytes << 20; sizebytes -= ((SMM_SIZE * 1024) + 1); @@ -160,7 +160,7 @@ msr.lo = sizebytes; wrmsr(gl->desc_name, msr); - printk(BIOS_DEBUG, "%s: MSR 0x%08lx, val 0x%08x:0x%08x\n", __FUNCTION__, + printk(BIOS_DEBUG, "%s: MSR 0x%08lx, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo); } @@ -177,12 +177,12 @@ sizebytes -= (SMM_SIZE * 1024); - printk(BIOS_DEBUG, "%s: %d bytes\n", __FUNCTION__, sizebytes); + printk(BIOS_DEBUG, "%s: %d bytes\n", __func__, sizebytes); /* Calculate the "two's complement" offset. */ offset = sizebytes - SMM_OFFSET; offset = (offset >> 12) & 0x000fffff; - printk(BIOS_DEBUG, "%s: offset is 0x%08x\n", __FUNCTION__, SMM_OFFSET); + printk(BIOS_DEBUG, "%s: offset is 0x%08x\n", __func__, SMM_OFFSET); msr.hi = offset << 8 | gl->hi; msr.hi |= SMM_OFFSET >> 24; @@ -191,7 +191,7 @@ msr.lo |= ((~(SMM_SIZE * 1024) + 1) >> 12) & 0xfffff; wrmsr(gl->desc_name, msr); - printk(BIOS_DEBUG, "%s: MSR 0x%08lx, val 0x%08x:0x%08x\n", __FUNCTION__, + printk(BIOS_DEBUG, "%s: MSR 0x%08lx, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo); } @@ -204,7 +204,7 @@ { struct msr msr; - printk(BIOS_DEBUG, "%s:\n", __FUNCTION__); + printk(BIOS_DEBUG, "%s:\n", __func__); msr.hi = gl->hi; /* I don't think this is needed. */ @@ -214,7 +214,7 @@ msr.lo |= ((~(SMM_SIZE * 1024) + 1) >> 12) & 0xfffff; wrmsr(gl->desc_name, msr); - printk(BIOS_DEBUG, "%s: MSR 0x%08lx, val 0x%08x:0x%08x\n", __FUNCTION__, + printk(BIOS_DEBUG, "%s: MSR 0x%08lx, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo); } @@ -742,7 +742,7 @@ { int i; - printk(BIOS_DEBUG, "Enter %s\n", __FUNCTION__); + printk(BIOS_DEBUG, "Enter %s\n", __func__); for (i = 0; gliutables[i]; i++) GLIUInit(gliutables[i]); @@ -760,7 +760,7 @@ __asm__ __volatile__("FINIT\n"); /* TODO: Create finit() function? */ - printk(BIOS_DEBUG, "Exit %s\n", __FUNCTION__); + printk(BIOS_DEBUG, "Exit %s\n", __func__); } void geode_pre_payload(void) Modified: coreboot-v3/northbridge/via/cn700/apic.c =================================================================== --- coreboot-v3/northbridge/via/cn700/apic.c 2009-02-12 19:41:05 UTC (rev 1130) +++ coreboot-v3/northbridge/via/cn700/apic.c 2009-02-12 21:15:34 UTC (rev 1131) @@ -29,8 +29,8 @@ static void cpu_bus_init(struct device *dev) { #warning "cpu_bus_init() empty, what should it do?" - printk(BIOS_SPEW, ">> Entering northbridge.c: %s\n", __FUNCTION__); - printk(BIOS_SPEW, ">> Exiting northbridge.c: %s\n", __FUNCTION__); + printk(BIOS_SPEW, ">> Entering northbridge.c: %s\n", __func__); + printk(BIOS_SPEW, ">> Exiting northbridge.c: %s\n", __func__); } static void cpu_bus_noop(struct device *dev) Modified: coreboot-v3/southbridge/amd/cs5536/cs5536.c =================================================================== --- coreboot-v3/southbridge/amd/cs5536/cs5536.c 2009-02-12 19:41:05 UTC (rev 1130) +++ coreboot-v3/southbridge/amd/cs5536/cs5536.c 2009-02-12 21:15:34 UTC (rev 1131) @@ -561,7 +561,7 @@ PCI_DEVICE_ID_AMD_CS5536_ISA, 0); if (!dev) { printk(BIOS_ERR, "%s: Could not find the south bridge!\n", - __FUNCTION__); + __func__); return; } sb = (struct southbridge_amd_cs5536_dts_config *)dev->device_configuration; @@ -663,7 +663,7 @@ * unsigned short gpiobase = MDD_GPIO; */ - printk(BIOS_ERR, "cs5536: %s\n", __FUNCTION__); + printk(BIOS_ERR, "cs5536: %s\n", __func__); setup_i8259(); lpc_init(sb); @@ -689,7 +689,7 @@ cs5536_setup_power_button(sb); - printk(BIOS_SPEW, "cs5536: %s() Exit\n", __FUNCTION__); + printk(BIOS_SPEW, "cs5536: %s() Exit\n", __func__); } /** @@ -719,10 +719,10 @@ */ static void cs5536_pci_dev_enable_resources(struct device *dev) { - printk(BIOS_SPEW, "cs5536: %s()\n", __FUNCTION__); + printk(BIOS_SPEW, "cs5536: %s()\n", __func__); pci_dev_enable_resources(dev); enable_childrens_resources(dev); - printk(BIOS_SPEW, "cs5536: %s() Exit\n", __FUNCTION__); + printk(BIOS_SPEW, "cs5536: %s() Exit\n", __func__); } struct device_operations cs5536_ops = { Modified: coreboot-v3/southbridge/amd/cs5536/irq_tables.c =================================================================== --- coreboot-v3/southbridge/amd/cs5536/irq_tables.c 2009-02-12 19:41:05 UTC (rev 1130) +++ coreboot-v3/southbridge/amd/cs5536/irq_tables.c 2009-02-12 21:15:34 UTC (rev 1131) @@ -43,7 +43,7 @@ /* Set up chipset IRQ steering. */ pciAddr = 0x80000000 | (CHIPSET_DEV_NUM << 11) | 0x5C; chipset_irq_map = (PIRQD << 12 | PIRQC << 8 | PIRQB << 4 | PIRQA); - printk(BIOS_DEBUG, "%s(%08X, %04X)\n", __FUNCTION__, pciAddr, + printk(BIOS_DEBUG, "%s(%08X, %04X)\n", __func__, pciAddr, chipset_irq_map); outl(pciAddr & ~3, 0xCF8); outl(chipset_irq_map, 0xCFC); Modified: coreboot-v3/util/lar/lib.c =================================================================== --- coreboot-v3/util/lar/lib.c 2009-02-12 19:41:05 UTC (rev 1130) +++ coreboot-v3/util/lar/lib.c 2009-02-12 21:15:34 UTC (rev 1131) @@ -86,7 +86,7 @@ else { fprintf(stderr, "%s: src_len(%d)!=dst_len(%d)\n", - __FUNCTION__, src_len, dst_len); + __func__, src_len, dst_len); exit(1); } } @@ -208,7 +208,7 @@ if (len > MAX_PATHLEN) { fprintf(stderr, "%s: %s+%s exceeds MAX_PATHLEN.\n", - __FUNCTION__, name, + __func__, name, namelist[n]->d_name); return -1; } @@ -227,7 +227,7 @@ if (len > MAX_PATHLEN) { fprintf(stderr, "%s: %s+%s exceeds MAX_PATHLEN.\n", - __FUNCTION__, pathname, + __func__, pathname, namelist[n]->d_name); return -1; } @@ -264,7 +264,7 @@ char *c; if (verbose()) - printf("%s: %s:%s\n", __FUNCTION__, filename, pathname); + printf("%s: %s:%s\n", __func__, filename, pathname); if (stat(filename, &filestat) == -1) { fprintf(stderr, "Error getting file attributes of %s\n", filename); Modified: coreboot-v3/util/lar/stream.c =================================================================== --- coreboot-v3/util/lar/stream.c 2009-02-12 19:41:05 UTC (rev 1130) +++ coreboot-v3/util/lar/stream.c 2009-02-12 21:15:34 UTC (rev 1131) @@ -126,7 +126,7 @@ shdr = (Elf32_Shdr *)&(header[ehdr->e_shoff]); if (verbose()) - fprintf(stderr, "%s: header %p #headers %d\n", __FUNCTION__, ehdr, headers); + fprintf(stderr, "%s: header %p #headers %d\n", __func__, ehdr, headers); entry = ehdr->e_entry; /* bss segments are special. They are in the section headers, Modified: coreboot-v3/util/x86emu/yabel/debug.c =================================================================== --- coreboot-v3/util/x86emu/yabel/debug.c 2009-02-12 19:41:05 UTC (rev 1130) +++ coreboot-v3/util/x86emu/yabel/debug.c 2009-02-12 21:15:34 UTC (rev 1131) @@ -19,7 +19,7 @@ void dump(u8 * addr, u32 len) { - printf("\n%s(%p, %x):\n", __FUNCTION__, addr, len); + printf("\n%s(%p, %x):\n", __func__, addr, len); while (len) { unsigned int tmpCnt = len; unsigned char x; Modified: coreboot-v3/util/x86emu/yabel/device.c =================================================================== --- coreboot-v3/util/x86emu/yabel/device.c 2009-02-12 19:41:05 UTC (rev 1130) +++ coreboot-v3/util/x86emu/yabel/device.c 2009-02-12 21:15:34 UTC (rev 1131) @@ -73,7 +73,7 @@ taa_index++; /* legacy ranges if its a VGA card... */ if ((bios_device.dev->class & 0xFF0000) == 0x030000) { - DEBUG_PRINTF("%s: VGA device found, adding legacy resources... \n", __FUNCTION__); + DEBUG_PRINTF("%s: VGA device found, adding legacy resources... \n", __func__); /* I/O 0x3B0-0x3BB */ translate_address_array[taa_index].info = IORESOURCE_FIXED | IORESOURCE_IO; translate_address_array[taa_index].bus = bus; @@ -237,7 +237,7 @@ bios_device.vmem_size = ta.size; DEBUG_PRINTF ("%s: Found prefetchable Virtual Legacy Memory BAR: %llx, size: %llx\n", - __FUNCTION__, bios_device.vmem_addr, + __func__, bios_device.vmem_addr, bios_device.vmem_size); } else if (tai_np != -1) { ta = translate_address_array[tai_np]; @@ -245,7 +245,7 @@ bios_device.vmem_size = ta.size; DEBUG_PRINTF ("%s: Found non-prefetchable Virtual Legacy Memory BAR: %llx, size: %llx", - __FUNCTION__, bios_device.vmem_addr, + __func__, bios_device.vmem_addr, bios_device.vmem_size); } // disable vmem @@ -388,7 +388,7 @@ { u8 rval = 0; //init bios_device struct - DEBUG_PRINTF("%s(%s)\n", __FUNCTION__, device->dtsname); + DEBUG_PRINTF("%s(%s)\n", __func__, device->dtsname); memset(&bios_device, 0, sizeof(bios_device)); #ifndef CONFIG_PCI_OPTION_ROM_RUN_YABEL Modified: coreboot-v3/util/x86emu/yabel/interrupt.c =================================================================== --- coreboot-v3/util/x86emu/yabel/interrupt.c 2009-02-12 19:41:05 UTC (rev 1130) +++ coreboot-v3/util/x86emu/yabel/interrupt.c 2009-02-12 21:15:34 UTC (rev 1131) @@ -31,7 +31,7 @@ setupInt(int intNum) { DEBUG_PRINTF_INTR("%s(%x): executing interrupt handler @%08x\n", - __FUNCTION__, intNum, my_rdl(intNum * 4)); + __func__, intNum, my_rdl(intNum * 4)); // push current R_FLG... will be popped by IRET push_word((u16) M.x86.R_FLG); CLEAR_FLAG(F_IF); @@ -51,7 +51,7 @@ { // the data for INT10 is stored in BDA (0000:0400h) offset 49h-66h // function number in AH - //DEBUG_PRINTF_CS_IP("%s:\n", __FUNCTION__); + //DEBUG_PRINTF_CS_IP("%s:\n", __func__); //x86emu_dump_xregs(); //if ((M.x86.R_IP == 0x32c2) && (M.x86.R_SI == 0x1ce2)){ //X86EMU_trace_on(); @@ -156,7 +156,7 @@ break; default: printf("%s(): unknown function (%x) for int10 handler.\n", - __FUNCTION__, M.x86.R_AH); + __func__, M.x86.R_AH); DEBUG_PRINTF_INTR("AX=%04x BX=%04x CX=%04x DX=%04x\n", M.x86.R_AX, M.x86.R_BX, M.x86.R_CX, M.x86.R_DX); @@ -220,7 +220,7 @@ break; default: printf("%s(): unknown multibyte keycode: %llx\n", - __FUNCTION__, *keycode); + __func__, *keycode); break; } } @@ -244,7 +244,7 @@ s8 c; // function number in AH DEBUG_PRINTF_INTR("%s(): Keyboard Interrupt: function: %x.\n", - __FUNCTION__, M.x86.R_AH); + __func__, M.x86.R_AH); DEBUG_PRINTF_INTR("AX=%04x BX=%04x CX=%04x DX=%04x\n", M.x86.R_AX, M.x86.R_BX, M.x86.R_CX, M.x86.R_DX); switch (M.x86.R_AH) { @@ -305,7 +305,7 @@ break; default: printf("%s(): unknown function (%x) for int16 handler.\n", - __FUNCTION__, M.x86.R_AH); + __func__, M.x86.R_AH); DEBUG_PRINTF_INTR("AX=%04x BX=%04x CX=%04x DX=%04x\n", M.x86.R_AX, M.x86.R_BX, M.x86.R_CX, M.x86.R_DX); @@ -337,7 +337,7 @@ // device index in SI (i.e. if multiple devices with same vendor/device id // are connected). We currently only support device index 0 DEBUG_PRINTF_INTR("%s(): function: %x: PCI Find Device\n", - __FUNCTION__, M.x86.R_AX); + __func__, M.x86.R_AX); if ((M.x86.R_CX == bios_device.pci_device_id) && (M.x86.R_DX == bios_device.pci_vendor_id) // device index must be 0 @@ -348,11 +348,11 @@ M.x86.R_BL = bios_device.devfn; DEBUG_PRINTF_INTR ("%s(): function %x: PCI Find Device --> 0x%04x\n", - __FUNCTION__, M.x86.R_AX, M.x86.R_BX); + __func__, M.x86.R_AX, M.x86.R_BX); } else { DEBUG_PRINTF_INTR ("%s(): function %x: invalid device/vendor/device index! (%04x/%04x/%02x expected: %04x/%04x/0) \n", - __FUNCTION__, M.x86.R_AX, M.x86.R_CX, M.x86.R_DX, + __func__, M.x86.R_AX, M.x86.R_CX, M.x86.R_DX, M.x86.R_SI, bios_device.pci_device_id, bios_device.pci_vendor_id); SET_FLAG(F_CF); @@ -370,7 +370,7 @@ // fail accesses to any device but ours... printf ("%s(): Config read access invalid! bus: %x (%x), devfn: %x (%x), offs: %x\n", - __FUNCTION__, bus, bios_device.bus, devfn, + __func__, bus, bios_device.bus, devfn, bios_device.devfn, offs); SET_FLAG(F_CF); M.x86.R_AH = 0x87; //return code: bad pci register @@ -390,7 +390,7 @@ #endif DEBUG_PRINTF_INTR ("%s(): function %x: PCI Config Read @%02x --> 0x%02x\n", - __FUNCTION__, M.x86.R_AX, offs, + __func__, M.x86.R_AX, offs, M.x86.R_CL); break; case 0xb109: @@ -405,7 +405,7 @@ #endif DEBUG_PRINTF_INTR ("%s(): function %x: PCI Config Read @%02x --> 0x%04x\n", - __FUNCTION__, M.x86.R_AX, offs, + __func__, M.x86.R_AX, offs, M.x86.R_CX); break; case 0xb10a: @@ -420,7 +420,7 @@ #endif DEBUG_PRINTF_INTR ("%s(): function %x: PCI Config Read @%02x --> 0x%08x\n", - __FUNCTION__, M.x86.R_AX, offs, + __func__, M.x86.R_AX, offs, M.x86.R_ECX); break; } @@ -439,7 +439,7 @@ // fail accesses to any device but ours... printf ("%s(): Config read access invalid! bus: %x (%x), devfn: %x (%x), offs: %x\n", - __FUNCTION__, bus, bios_device.bus, devfn, + __func__, bus, bios_device.bus, devfn, bios_device.devfn, offs); SET_FLAG(F_CF); M.x86.R_AH = 0x87; //return code: bad pci register @@ -456,7 +456,7 @@ #endif DEBUG_PRINTF_INTR ("%s(): function %x: PCI Config Write @%02x <-- 0x%02x\n", - __FUNCTION__, M.x86.R_AX, offs, + __func__, M.x86.R_AX, offs, M.x86.R_CL); break; case 0xb10c: @@ -468,7 +468,7 @@ #endif DEBUG_PRINTF_INTR ("%s(): function %x: PCI Config Write @%02x <-- 0x%04x\n", - __FUNCTION__, M.x86.R_AX, offs, + __func__, M.x86.R_AX, offs, M.x86.R_CX); break; case 0xb10d: @@ -480,7 +480,7 @@ #endif DEBUG_PRINTF_INTR ("%s(): function %x: PCI Config Write @%02x <-- 0x%08x\n", - __FUNCTION__, M.x86.R_AX, offs, + __func__, M.x86.R_AX, offs, M.x86.R_ECX); break; } @@ -490,7 +490,7 @@ break; default: printf("%s(): unknown function (%x) for int1a handler.\n", - __FUNCTION__, M.x86.R_AX); + __func__, M.x86.R_AX); DEBUG_PRINTF_INTR("AX=%04x BX=%04x CX=%04x DX=%04x\n", M.x86.R_AX, M.x86.R_BX, M.x86.R_CX, M.x86.R_DX); @@ -507,7 +507,7 @@ #ifndef DEBUG_PRINT_INT10 // this printf makes output by int 10 unreadable... // so we only enable it, if int10 print is disabled - DEBUG_PRINTF_INTR("%s(%x)\n", __FUNCTION__, intNum); + DEBUG_PRINTF_INTR("%s(%x)\n", __func__, intNum); #endif switch (intNum) { case 0x10: //BIOS video interrupt @@ -521,7 +521,7 @@ // ignore interrupt... DEBUG_PRINTF_INTR ("%s(%x): invalid interrupt Vector (%08x) found, interrupt ignored...\n", - __FUNCTION__, intNum, my_rdl(intNum * 4)); + __func__, intNum, my_rdl(intNum * 4)); DEBUG_PRINTF_INTR("AX=%04x BX=%04x CX=%04x DX=%04x\n", M.x86.R_AX, M.x86.R_BX, M.x86.R_CX, M.x86.R_DX); @@ -597,9 +597,9 @@ } setupInt(0x10); DEBUG_PRINTF_INTR("%s(): starting execution of INT10...\n", - __FUNCTION__); + __func__); X86EMU_exec(); - DEBUG_PRINTF_INTR("%s(): execution finished\n", __FUNCTION__); + DEBUG_PRINTF_INTR("%s(): execution finished\n", __func__); } // prepare and execute Interrupt 13 (Disk Interrupt) @@ -636,7 +636,7 @@ setupInt(0x13); DEBUG_PRINTF_INTR("%s(): starting execution of INT13...\n", - __FUNCTION__); + __func__); X86EMU_exec(); - DEBUG_PRINTF_INTR("%s(): execution finished\n", __FUNCTION__); + DEBUG_PRINTF_INTR("%s(): execution finished\n", __func__); } Modified: coreboot-v3/util/x86emu/yabel/io.c =================================================================== --- coreboot-v3/util/x86emu/yabel/io.c 2009-02-12 19:41:05 UTC (rev 1130) +++ coreboot-v3/util/x86emu/yabel/io.c 2009-02-12 21:15:34 UTC (rev 1131) @@ -89,11 +89,11 @@ u8 translated = biosemu_dev_translate_address(&translated_addr); if (translated != 0) { //translation successfull, access Device I/O (BAR or Legacy...) - DEBUG_PRINTF_IO("%s(%x): access to Device I/O\n", __FUNCTION__, + DEBUG_PRINTF_IO("%s(%x): access to Device I/O\n", __func__, addr); - //DEBUG_PRINTF_IO("%s(%04x): translated_addr: %llx\n", __FUNCTION__, addr, translated_addr); + //DEBUG_PRINTF_IO("%s(%04x): translated_addr: %llx\n", __func__, addr, translated_addr); rval = read_io((void *)translated_addr, 1); - DEBUG_PRINTF_IO("%s(%04x) Device I/O --> %02x\n", __FUNCTION__, + DEBUG_PRINTF_IO("%s(%04x) Device I/O --> %02x\n", __func__, addr, rval); return rval; } else { @@ -101,7 +101,7 @@ case 0x61: //8254 KB Controller / Timer Port rval = handle_port_61h(); - //DEBUG_PRINTF_IO("%s(%04x) KB / Timer Port B --> %02x\n", __FUNCTION__, addr, rval); + //DEBUG_PRINTF_IO("%s(%04x) KB / Timer Port B --> %02x\n", __func__, addr, rval); return rval; break; case 0xCFC: @@ -121,10 +121,10 @@ default: DEBUG_PRINTF_IO ("%s(%04x) reading from bios_device.io_buffer\n", - __FUNCTION__, addr); + __func__, addr); rval = *((u8 *) (bios_device.io_buffer + addr)); DEBUG_PRINTF_IO("%s(%04x) I/O Buffer --> %02x\n", - __FUNCTION__, addr, rval); + __func__, addr, rval); return rval; break; } @@ -138,9 +138,9 @@ u8 translated = biosemu_dev_translate_address(&translated_addr); if (translated != 0) { //translation successfull, access Device I/O (BAR or Legacy...) - DEBUG_PRINTF_IO("%s(%x): access to Device I/O\n", __FUNCTION__, + DEBUG_PRINTF_IO("%s(%x): access to Device I/O\n", __func__, addr); - //DEBUG_PRINTF_IO("%s(%04x): translated_addr: %llx\n", __FUNCTION__, addr, translated_addr); + //DEBUG_PRINTF_IO("%s(%04x): translated_addr: %llx\n", __func__, addr, translated_addr); u16 rval; if ((translated_addr & (u64) 0x1) == 0) { // 16 bit aligned access... @@ -152,7 +152,7 @@ rval = (read_io((void *)translated_addr, 1) << 8) | (read_io((void *)(translated_addr + 1), 1)); } - DEBUG_PRINTF_IO("%s(%04x) Device I/O --> %04x\n", __FUNCTION__, + DEBUG_PRINTF_IO("%s(%04x) Device I/O --> %04x\n", __func__, addr, rval); return rval; } else { @@ -165,11 +165,11 @@ default: DEBUG_PRINTF_IO ("%s(%04x) reading from bios_device.io_buffer\n", - __FUNCTION__, addr); + __func__, addr); u16 rval = in16le((void *) bios_device.io_buffer + addr); DEBUG_PRINTF_IO("%s(%04x) I/O Buffer --> %04x\n", - __FUNCTION__, addr, rval); + __func__, addr, rval); return rval; break; } @@ -183,9 +183,9 @@ u8 translated = biosemu_dev_translate_address(&translated_addr); if (translated != 0) { //translation successfull, access Device I/O (BAR or Legacy...) - DEBUG_PRINTF_IO("%s(%x): access to Device I/O\n", __FUNCTION__, + DEBUG_PRINTF_IO("%s(%x): access to Device I/O\n", __func__, addr); - //DEBUG_PRINTF_IO("%s(%04x): translated_addr: %llx\n", __FUNCTION__, addr, translated_addr); + //DEBUG_PRINTF_IO("%s(%04x): translated_addr: %llx\n", __func__, addr, translated_addr); u32 rval; if ((translated_addr & (u64) 0x3) == 0) { // 32 bit aligned access... @@ -199,7 +199,7 @@ | (read_io((void *)(translated_addr + 2), 1) << 8) | (read_io((void *)(translated_addr + 3), 1)); } - DEBUG_PRINTF_IO("%s(%04x) Device I/O --> %08x\n", __FUNCTION__, + DEBUG_PRINTF_IO("%s(%04x) Device I/O --> %08x\n", __func__, addr, rval); return rval; } else { @@ -211,11 +211,11 @@ default: DEBUG_PRINTF_IO ("%s(%04x) reading from bios_device.io_buffer\n", - __FUNCTION__, addr); + __func__, addr); u32 rval = in32le((void *) bios_device.io_buffer + addr); DEBUG_PRINTF_IO("%s(%04x) I/O Buffer --> %08x\n", - __FUNCTION__, addr, rval); + __func__, addr, rval); return rval; break; } @@ -230,10 +230,10 @@ if (translated != 0) { //translation successfull, access Device I/O (BAR or Legacy...) DEBUG_PRINTF_IO("%s(%x, %x): access to Device I/O\n", - __FUNCTION__, addr, val); - //DEBUG_PRINTF_IO("%s(%04x): translated_addr: %llx\n", __FUNCTION__, addr, translated_addr); + __func__, addr, val); + //DEBUG_PRINTF_IO("%s(%04x): translated_addr: %llx\n", __func__, addr, translated_addr); write_io((void *) translated_addr, val, 1); - DEBUG_PRINTF_IO("%s(%04x) Device I/O <-- %02x\n", __FUNCTION__, + DEBUG_PRINTF_IO("%s(%04x) Device I/O <-- %02x\n", __func__, addr, val); } else { switch (addr) { @@ -247,7 +247,7 @@ default: DEBUG_PRINTF_IO ("%s(%04x,%02x) writing to bios_device.io_buffer\n", - __FUNCTION__, addr, val); + __func__, addr, val); *((u8 *) (bios_device.io_buffer + addr)) = val; break; } @@ -262,8 +262,8 @@ if (translated != 0) { //translation successfull, access Device I/O (BAR or Legacy...) DEBUG_PRINTF_IO("%s(%x, %x): access to Device I/O\n", - __FUNCTION__, addr, val); - //DEBUG_PRINTF_IO("%s(%04x): translated_addr: %llx\n", __FUNCTION__, addr, translated_addr); + __func__, addr, val); + //DEBUG_PRINTF_IO("%s(%04x): translated_addr: %llx\n", __func__, addr, translated_addr); if ((translated_addr & (u64) 0x1) == 0) { // little-endian conversion u16 tempval = in16le((void *) &val); @@ -276,7 +276,7 @@ write_io(((void *) translated_addr), (u8) (val & 0x00FF), 1); } - DEBUG_PRINTF_IO("%s(%04x) Device I/O <-- %04x\n", __FUNCTION__, + DEBUG_PRINTF_IO("%s(%04x) Device I/O <-- %04x\n", __func__, addr, val); } else { switch (addr) { @@ -288,7 +288,7 @@ default: DEBUG_PRINTF_IO ("%s(%04x,%04x) writing to bios_device.io_buffer\n", - __FUNCTION__, addr, val); + __func__, addr, val); out16le((void *) bios_device.io_buffer + addr, val); break; } @@ -303,8 +303,8 @@ if (translated != 0) { //translation successfull, access Device I/O (BAR or Legacy...) DEBUG_PRINTF_IO("%s(%x, %x): access to Device I/O\n", - __FUNCTION__, addr, val); - //DEBUG_PRINTF_IO("%s(%04x): translated_addr: %llx\n", __FUNCTION__, addr, translated_addr); + __func__, addr, val); + //DEBUG_PRINTF_IO("%s(%04x): translated_addr: %llx\n", __func__, addr, translated_addr); if ((translated_addr & (u64) 0x3) == 0) { // little-endian conversion u32 tempval = in32le((void *) &val); @@ -321,7 +321,7 @@ write_io(((void *) translated_addr), (u8) (val & 0x000000FF), 1); } - DEBUG_PRINTF_IO("%s(%04x) Device I/O <-- %08x\n", __FUNCTION__, + DEBUG_PRINTF_IO("%s(%04x) Device I/O <-- %08x\n", __func__, addr, val); } else { switch (addr) { @@ -332,7 +332,7 @@ default: DEBUG_PRINTF_IO ("%s(%04x,%08x) writing to bios_device.io_buffer\n", - __FUNCTION__, addr, val); + __func__, addr, val); out32le((void *) bios_device.io_buffer + addr, val); break; } @@ -384,7 +384,7 @@ #endif DEBUG_PRINTF_IO ("%s(%04x) PCI Config Read @%02x, size: %d --> 0x%08x\n", - __FUNCTION__, addr, offs, size, rval); + __func__, addr, offs, size, rval); } } } @@ -433,7 +433,7 @@ #endif DEBUG_PRINTF_IO ("%s(%04x) PCI Config Write @%02x, size: %d <-- 0x%08x\n", - __FUNCTION__, addr, offs, size, val); + __func__, addr, offs, size, val); } } } Modified: coreboot-v3/util/x86emu/yabel/mem.c =================================================================== --- coreboot-v3/util/x86emu/yabel/mem.c 2009-02-12 19:41:05 UTC (rev 1130) +++ coreboot-v3/util/x86emu/yabel/mem.c 2009-02-12 21:15:34 UTC (rev 1131) @@ -44,26 +44,26 @@ /* check Interrupt Vector Access (0000:0000h - 0000:0400h) */ \ if (_addr < 0x400) { \ DEBUG_PRINTF_CS_IP("%s: read from Interrupt Vector %x --> %x\n", \ - __FUNCTION__, _addr / 4, _rval); \ + __func__, _addr / 4, _rval); \ } \ /* access to BIOS Data Area (0000:0400h - 0000:0500h)*/ \ else if ((_addr >= 0x400) && (addr < 0x500)) { \ DEBUG_PRINTF_CS_IP("%s: read from BIOS Data Area: addr: %x --> %x\n", \ - __FUNCTION__, _addr, _rval); \ + __func__, _addr, _rval); \ /* dump registers */ \ /* x86emu_dump_xregs(); */ \ } \ /* access to first 64k of memory... */ \ else if (_addr < 0x10000) { \ DEBUG_PRINTF_CS_IP("%s: read from segment 0000h: addr: %x --> %x\n", \ - __FUNCTION__, _addr, _rval); \ + __func__, _addr, _rval); \ /* dump registers */ \ /* x86emu_dump_xregs(); */ \ } \ /* read from PMM_CONV_SEGMENT */ \ else if ((_addr <= ((PMM_CONV_SEGMENT << 4) | 0xffff)) && (_addr >= (PMM_CONV_SEGMENT << 4))) { \ DEBUG_PRINTF_CS_IP("%s: read from PMM Segment %04xh: addr: %x --> %x\n", \ - __FUNCTION__, PMM_CONV_SEGMENT, _addr, _rval); \ + __func__, PMM_CONV_SEGMENT, _addr, _rval); \ /* HALT_SYS(); */ \ /* dump registers */ \ /* x86emu_dump_xregs(); */ \ @@ -71,7 +71,7 @@ /* read from PNP_DATA_SEGMENT */ \ else if ((_addr <= ((PNP_DATA_SEGMENT << 4) | 0xffff)) && (_addr >= (PNP_DATA_SEGMENT << 4))) { \ DEBUG_PRINTF_CS_IP("%s: read from PnP Data Segment %04xh: addr: %x --> %x\n", \ - __FUNCTION__, PNP_DATA_SEGMENT, _addr, _rval); \ + __func__, PNP_DATA_SEGMENT, _addr, _rval); \ /* HALT_SYS(); */ \ /* dump registers */ \ /* x86emu_dump_xregs(); */ \ @@ -79,12 +79,12 @@ /* read from EBDA Segment */ \ else if ((_addr <= ((ebda_segment << 4) | (ebda_size - 1))) && (_addr >= (ebda_segment << 4))) { \ DEBUG_PRINTF_CS_IP("%s: read from Extended BIOS Data Area %04xh, size: %04x: addr: %x --> %x\n", \ - __FUNCTION__, ebda_segment, ebda_size, _addr, _rval); \ + __func__, ebda_segment, ebda_size, _addr, _rval); \ } \ /* read from BIOS_DATA_SEGMENT */ \ else if ((_addr <= ((BIOS_DATA_SEGMENT << 4) | 0xffff)) && (_addr >= (BIOS_DATA_SEGMENT << 4))) { \ DEBUG_PRINTF_CS_IP("%s: read from BIOS Data Segment %04xh: addr: %x --> %x\n", \ - __FUNCTION__, BIOS_DATA_SEGMENT, _addr, _rval); \ + __func__, BIOS_DATA_SEGMENT, _addr, _rval); \ /* for PMM debugging */ \ /*if (_addr == BIOS_DATA_SEGMENT << 4) { \ X86EMU_trace_on(); \ @@ -107,52 +107,52 @@ /* check Interrupt Vector Access (0000:0000h - 0000:0400h) */ \ if (_addr < 0x400) { \ DEBUG_PRINTF_CS_IP("%s: write to Interrupt Vector %x <-- %x\n", \ - __FUNCTION__, _addr / 4, _val); \ + __func__, _addr / 4, _val); \ } \ /* access to BIOS Data Area (0000:0400h - 0000:0500h)*/ \ else if ((_addr >= 0x400) && (addr < 0x500)) { \ DEBUG_PRINTF_CS_IP("%s: write to BIOS Data Area: addr: %x <-- %x\n", \ - __FUNCTION__, _addr, _val); \ + __func__, _addr, _val); \ /* dump registers */ \ /* x86emu_dump_xregs(); */ \ } \ /* access to first 64k of memory...*/ \ else if (_addr < 0x10000) { \ DEBUG_PRINTF_CS_IP("%s: write to segment 0000h: addr: %x <-- %x\n", \ - __FUNCTION__, _addr, _val); \ + __func__, _addr, _val); \ /* dump registers */ \ /* x86emu_dump_xregs(); */ \ } \ /* write to PMM_CONV_SEGMENT... */ \ else if ((_addr <= ((PMM_CONV_SEGMENT << 4) | 0xffff)) && (_addr >= (PMM_CONV_SEGMENT << 4))) { \ DEBUG_PRINTF_CS_IP("%s: write to PMM Segment %04xh: addr: %x <-- %x\n", \ - __FUNCTION__, PMM_CONV_SEGMENT, _addr, _val); \ + __func__, PMM_CONV_SEGMENT, _addr, _val); \ /* dump registers */ \ /* x86emu_dump_xregs(); */ \ } \ /* write to PNP_DATA_SEGMENT... */ \ else if ((_addr <= ((PNP_DATA_SEGMENT << 4) | 0xffff)) && (_addr >= (PNP_DATA_SEGMENT << 4))) { \ DEBUG_PRINTF_CS_IP("%s: write to PnP Data Segment %04xh: addr: %x <-- %x\n", \ - __FUNCTION__, PNP_DATA_SEGMENT, _addr, _val); \ + __func__, PNP_DATA_SEGMENT, _addr, _val); \ /* dump registers */ \ /* x86emu_dump_xregs(); */ \ } \ /* write to EBDA Segment... */ \ else if ((_addr <= ((ebda_segment << 4) | (ebda_size - 1))) && (_addr >= (ebda_segment << 4))) { \ DEBUG_PRINTF_CS_IP("%s: write to Extended BIOS Data Area %04xh, size: %04x: addr: %x <-- %x\n", \ - __FUNCTION__, ebda_segment, ebda_size, _addr, _val); \ + __func__, ebda_segment, ebda_size, _addr, _val); \ } \ /* write to BIOS_DATA_SEGMENT... */ \ else if ((_addr <= ((BIOS_DATA_SEGMENT << 4) | 0xffff)) && (_addr >= (BIOS_DATA_SEGMENT << 4))) { \ DEBUG_PRINTF_CS_IP("%s: write to BIOS Data Segment %04xh: addr: %x <-- %x\n", \ - __FUNCTION__, BIOS_DATA_SEGMENT, _addr, _val); \ + __func__, BIOS_DATA_SEGMENT, _addr, _val); \ /* dump registers */ \ /* x86emu_dump_xregs(); */ \ } \ /* write to current CS segment... */ \ else if ((_addr < ((M.x86.R_CS << 4) | 0xffff)) && (_addr > (M.x86.R_CS << 4))) { \ DEBUG_PRINTF_CS_IP("%s: write to CS segment %04xh: addr: %x <-- %x\n", \ - __FUNCTION__, M.x86.R_CS, _addr, _val); \ + __func__, M.x86.R_CS, _addr, _val); \ /* dump registers */ \ /* x86emu_dump_xregs(); */ \ } \ @@ -178,17 +178,17 @@ if (translated != 0) { //translation successfull, access VGA Memory (BAR or Legacy...) DEBUG_PRINTF_MEM("%s(%08x): access to VGA Memory\n", - __FUNCTION__, addr); - //DEBUG_PRINTF_MEM("%s(%08x): translated_addr: %llx\n", __FUNCTION__, addr, translated_addr); + __func__, addr); + //DEBUG_PRINTF_MEM("%s(%08x): translated_addr: %llx\n", __func__, addr, translated_addr); set_ci(); rval = *((u8 *) translated_addr); clr_ci(); - DEBUG_PRINTF_MEM("%s(%08x) VGA --> %02x\n", __FUNCTION__, addr, + DEBUG_PRINTF_MEM("%s(%08x) VGA --> %02x\n", __func__, addr, rval); return rval; } else if (addr > M.mem_size) { DEBUG_PRINTF("%s(%08x): Memory Access out of range!\n", - __FUNCTION__, addr); + __func__, addr); //disassemble_forward(M.x86.saved_cs, M.x86.saved_ip, 1); HALT_SYS(); } else { @@ -210,8 +210,8 @@ if (translated != 0) { //translation successfull, access VGA Memory (BAR or Legacy...) DEBUG_PRINTF_MEM("%s(%08x): access to VGA Memory\n", - __FUNCTION__, addr); - //DEBUG_PRINTF_MEM("%s(%08x): translated_addr: %llx\n", __FUNCTION__, addr, translated_addr); + __func__, addr); + //DEBUG_PRINTF_MEM("%s(%08x): translated_addr: %llx\n", __func__, addr, translated_addr); // check for legacy memory, because of the remapping to BARs, the reads must // be byte reads... if ((addr >= 0xa0000) && (addr < 0xc0000)) { @@ -234,12 +234,12 @@ clr_ci(); } } - DEBUG_PRINTF_MEM("%s(%08x) VGA --> %04x\n", __FUNCTION__, addr, + DEBUG_PRINTF_MEM("%s(%08x) VGA --> %04x\n", __func__, addr, rval); return rval; } else if (addr > M.mem_size) { DEBUG_PRINTF("%s(%08x): Memory Access out of range!\n", - __FUNCTION__, addr); + __func__, addr); //disassemble_forward(M.x86.saved_cs, M.x86.saved_ip, 1); HALT_SYS(); } else { @@ -261,8 +261,8 @@ if (translated != 0) { //translation successfull, access VGA Memory (BAR or Legacy...) DEBUG_PRINTF_MEM("%s(%x): access to VGA Memory\n", - __FUNCTION__, addr); - //DEBUG_PRINTF_MEM("%s(%08x): translated_addr: %llx\n", __FUNCTION__, addr, translated_addr); + __func__, addr); + //DEBUG_PRINTF_MEM("%s(%08x): translated_addr: %llx\n", __func__, addr, translated_addr); // check for legacy memory, because of the remapping to BARs, the reads must // be byte reads... if ((addr >= 0xa0000) && (addr < 0xc0000)) { @@ -289,13 +289,13 @@ clr_ci(); } } - DEBUG_PRINTF_MEM("%s(%08x) VGA --> %08x\n", __FUNCTION__, addr, + DEBUG_PRINTF_MEM("%s(%08x) VGA --> %08x\n", __func__, addr, rval); //HALT_SYS(); return rval; } else if (addr > M.mem_size) { DEBUG_PRINTF("%s(%08x): Memory Access out of range!\n", - __FUNCTION__, addr); + __func__, addr); //disassemble_forward(M.x86.saved_cs, M.x86.saved_ip, 1); HALT_SYS(); } else { @@ -323,14 +323,14 @@ if (translated != 0) { //translation successfull, access VGA Memory (BAR or Legacy...) DEBUG_PRINTF_MEM("%s(%x, %x): access to VGA Memory\n", - __FUNCTION__, addr, val); - //DEBUG_PRINTF_MEM("%s(%08x): translated_addr: %llx\n", __FUNCTION__, addr, translated_addr); + __func__, addr, val); + //DEBUG_PRINTF_MEM("%s(%08x): translated_addr: %llx\n", __func__, addr, translated_addr); set_ci(); *((u8 *) translated_addr) = val; clr_ci(); } else if (addr > M.mem_size) { DEBUG_PRINTF("%s(%08x): Memory Access out of range!\n", - __FUNCTION__, addr); + __func__, addr); //disassemble_forward(M.x86.saved_cs, M.x86.saved_ip, 1); HALT_SYS(); } else { @@ -348,8 +348,8 @@ if (translated != 0) { //translation successfull, access VGA Memory (BAR or Legacy...) DEBUG_PRINTF_MEM("%s(%x, %x): access to VGA Memory\n", - __FUNCTION__, addr, val); - //DEBUG_PRINTF_MEM("%s(%08x): translated_addr: %llx\n", __FUNCTION__, addr, translated_addr); + __func__, addr, val); + //DEBUG_PRINTF_MEM("%s(%08x): translated_addr: %llx\n", __func__, addr, translated_addr); // check for legacy memory, because of the remapping to BARs, the reads must // be byte reads... if ((addr >= 0xa0000) && (addr < 0xc0000)) { @@ -376,7 +376,7 @@ } } else if (addr > M.mem_size) { DEBUG_PRINTF("%s(%08x): Memory Access out of range!\n", - __FUNCTION__, addr); + __func__, addr); //disassemble_forward(M.x86.saved_cs, M.x86.saved_ip, 1); HALT_SYS(); } else { @@ -393,8 +393,8 @@ if (translated != 0) { //translation successfull, access VGA Memory (BAR or Legacy...) DEBUG_PRINTF_MEM("%s(%x, %x): access to VGA Memory\n", - __FUNCTION__, addr, val); - //DEBUG_PRINTF_MEM("%s(%08x): translated_addr: %llx\n", __FUNCTION__, addr, translated_addr); + __func__, addr, val); + //DEBUG_PRINTF_MEM("%s(%08x): translated_addr: %llx\n", __func__, addr, translated_addr); // check for legacy memory, because of the remapping to BARs, the reads must // be byte reads... if ((addr >= 0xa0000) && (addr < 0xc0000)) { @@ -427,7 +427,7 @@ } } else if (addr > M.mem_size) { DEBUG_PRINTF("%s(%08x): Memory Access out of range!\n", - __FUNCTION__, addr); + __func__, addr); //disassemble_forward(M.x86.saved_cs, M.x86.saved_ip, 1); HALT_SYS(); } else { Modified: coreboot-v3/util/x86emu/yabel/pmm.c =================================================================== --- coreboot-v3/util/x86emu/yabel/pmm.c 2009-02-12 19:41:05 UTC (rev 1130) +++ coreboot-v3/util/x86emu/yabel/pmm.c 2009-02-12 21:15:34 UTC (rev 1131) @@ -109,13 +109,13 @@ flags = pop_word(); DEBUG_PRINTF_PMM ("%s: pmmAllocate: Length: %x, Handle: %x, Flags: %x\n", - __FUNCTION__, length, handle, flags); + __func__, length, handle, flags); if ((flags & 0x1) != 0) { /* request to allocate in conventional memory */ if (curr_pmm_allocation_index >= MAX_PMM_AREAS) { printf ("%s: pmmAllocate: Maximum Number of allocatable areas reached (%d), cannot allocate more memory!\n", - __FUNCTION__, MAX_PMM_AREAS); + __func__, MAX_PMM_AREAS); rval = 0; goto exit; } @@ -133,7 +133,7 @@ [curr_pmm_allocation_index - 1].length; } DEBUG_PRINTF_PMM("%s: next_offset: 0x%x\n", - __FUNCTION__, next_offset); + __func__, next_offset); if (length == 0) { /* largest possible block size requested, we have on segment * to allocate, so largest possible is segment size (0xFFFF) @@ -158,7 +158,7 @@ if (align < 0x10) { align = 0x10; } - DEBUG_PRINTF_PMM("%s: align: 0x%x\n", __FUNCTION__, + DEBUG_PRINTF_PMM("%s: align: 0x%x\n", __func__, align); if ((next_offset & (align - 1)) != 0) { /* not yet aligned... align! */ @@ -169,7 +169,7 @@ rval = 0; printf ("%s: pmmAllocate: Not enough memory available for allocation!\n", - __FUNCTION__); + __func__); goto exit; } curr_pmm_allocation_index++; @@ -181,25 +181,25 @@ rval = ((u32) (PMM_CONV_SEGMENT << 16)) | next_offset; DEBUG_PRINTF_PMM ("%s: pmmAllocate: allocated memory at %x\n", - __FUNCTION__, rval); + __func__, rval); } else { rval = 0; printf ("%s: pmmAllocate: allocation in extended memory not supported!\n", - __FUNCTION__); + __func__); } goto exit; case 1: /* function pmmFind */ handle = pop_long(); /* the handle to lookup */ - DEBUG_PRINTF_PMM("%s: pmmFind: Handle: %x\n", __FUNCTION__, + DEBUG_PRINTF_PMM("%s: pmmFind: Handle: %x\n", __func__, handle); i = 0; for (i = 0; i < curr_pmm_allocation_index; i++) { if (pmm_allocation_array[i].handle == handle) { DEBUG_PRINTF_PMM ("%s: pmmFind: found allocated memory at %x\n", - __FUNCTION__, rval); + __func__, rval); /* return the 32bit "physical" address, i.e. combination of segment and offset */ rval = ((u32) (PMM_CONV_SEGMENT << 16)) | @@ -209,7 +209,7 @@ if (rval == 0) { DEBUG_PRINTF_PMM ("%s: pmmFind: handle (%x) not found!\n", - __FUNCTION__, handle); + __func__, handle); } goto exit; case 2: @@ -220,7 +220,7 @@ */ buffer = buffer ^ ((u32) PMM_CONV_SEGMENT << 16); DEBUG_PRINTF_PMM("%s: pmmDeallocate: PMM segment offset: %x\n", - __FUNCTION__, buffer); + __func__, buffer); i = 0; /* rval = 0 means we deallocated the buffer, so set it to 1 in case we dont find it and * thus cannot deallocate @@ -234,7 +234,7 @@ rval = 0; DEBUG_PRINTF_PMM ("%s: pmmDeallocate: found allocated memory at index: %d\n", - __FUNCTION__, i); + __func__, i); /* copy the remaining elements in pmm_allocation_array one position up */ j = i; for (; j < curr_pmm_allocation_index; j++) { @@ -256,13 +256,13 @@ if (rval != 0) { DEBUG_PRINTF_PMM ("%s: pmmDeallocate: offset (%x) not found, cannot deallocate!\n", - __FUNCTION__, buffer); + __func__, buffer); } goto exit; default: /* invalid/unimplemented function */ printf("%s: invalid PMM function (0x%04x) called!\n", - __FUNCTION__, function); + __func__, function); /* PMM spec says if function is invalid, return 0xFFFFFFFF */ rval = 0xFFFFFFFF; goto exit; @@ -274,7 +274,7 @@ M.x86.R_AX = (u16) (rval & 0xFFFF); CHECK_DBG(DEBUG_PMM) { DEBUG_PRINTF_PMM("%s: dump of pmm_allocation_array:\n", - __FUNCTION__); + __func__); for (i = 0; i < MAX_PMM_AREAS; i++) { DEBUG_PRINTF_PMM ("%d:\n\thandle: %x\n\toffset: %x\n\tlength: %x\n", @@ -304,7 +304,7 @@ push_long(0); /* This is the return address for the ABI, unused in this implementation */ pmm_handleInt(); addr = ((u32) M.x86.R_DX << 16) | M.x86.R_AX; - DEBUG_PRINTF_PMM("%s: allocated memory at: %04x:%04x\n", __FUNCTION__, + DEBUG_PRINTF_PMM("%s: allocated memory at: %04x:%04x\n", __func__, M.x86.R_DX, M.x86.R_AX); function = 1; /* pmmFind */ push_long(handle); @@ -312,7 +312,7 @@ push_long(0); /* This is the return address for the ABI, unused in this implementation */ pmm_handleInt(); DEBUG_PRINTF_PMM("%s: found memory at: %04x:%04x (expected: %08x)\n", - __FUNCTION__, M.x86.R_DX, M.x86.R_AX, addr); + __func__, M.x86.R_DX, M.x86.R_AX, addr); function = 2; /* pmmDeallocate */ push_long(addr); push_word(function); @@ -320,7 +320,7 @@ pmm_handleInt(); DEBUG_PRINTF_PMM ("%s: freed memory rval: %04x:%04x (expected: 0000:0000)\n", - __FUNCTION__, M.x86.R_DX, M.x86.R_AX); + __func__, M.x86.R_DX, M.x86.R_AX); /*-------------------- Test aligned allocation/deallocation ----------------------------- */ function = 0; /* pmmAllocate */ handle = 0xdeadbeef; @@ -334,7 +334,7 @@ push_long(0); /* This is the return address for the ABI, unused in this implementation */ pmm_handleInt(); addr = ((u32) M.x86.R_DX << 16) | M.x86.R_AX; - DEBUG_PRINTF_PMM("%s: allocated memory at: %04x:%04x\n", __FUNCTION__, + DEBUG_PRINTF_PMM("%s: allocated memory at: %04x:%04x\n", __func__, M.x86.R_DX, M.x86.R_AX); function = 0; /* pmmAllocate */ handle = 0xf00d4b0b; @@ -349,7 +349,7 @@ pmm_handleInt(); /* the address should be aligned to 0x800, so probably it is at offset 0x1800... */ addr = ((u32) M.x86.R_DX << 16) | M.x86.R_AX; - DEBUG_PRINTF_PMM("%s: allocated memory at: %04x:%04x\n", __FUNCTION__, + DEBUG_PRINTF_PMM("%s: allocated memory at: %04x:%04x\n", __func__, M.x86.R_DX, M.x86.R_AX); function = 1; /* pmmFind */ push_long(handle); @@ -364,7 +364,7 @@ pmm_handleInt(); DEBUG_PRINTF_PMM ("%s: freed memory rval: %04x:%04x (expected: 0000:0000)\n", - __FUNCTION__, M.x86.R_DX, M.x86.R_AX); + __func__, M.x86.R_DX, M.x86.R_AX); handle = 0xdeadbeef; function = 1; /* pmmFind */ push_long(handle); @@ -379,7 +379,7 @@ pmm_handleInt(); DEBUG_PRINTF_PMM ("%s: freed memory rval: %04x:%04x (expected: 0000:0000)\n", - __FUNCTION__, M.x86.R_DX, M.x86.R_AX); + __func__, M.x86.R_DX, M.x86.R_AX); /*-------------------- Test out of memory allocation ----------------------------- */ function = 0; /* pmmAllocate */ handle = 0xdeadbeef; @@ -394,7 +394,7 @@ pmm_handleInt(); length = ((u32) M.x86.R_DX << 16) | M.x86.R_AX; length /= 16; /* length in paragraphs */ - DEBUG_PRINTF_PMM("%s: largest possible length: %08x\n", __FUNCTION__, + DEBUG_PRINTF_PMM("%s: largest possible length: %08x\n", __func__, length); function = 0; /* pmmAllocate */ flags = 0x1; /* conventional memory, aligned */ @@ -406,7 +406,7 @@ push_long(0); /* This is the return address for the ABI, unused in this implementation */ pmm_handleInt(); addr = ((u32) M.x86.R_DX << 16) | M.x86.R_AX; - DEBUG_PRINTF_PMM("%s: allocated memory at: %04x:%04x\n", __FUNCTION__, + DEBUG_PRINTF_PMM("%s: allocated memory at: %04x:%04x\n", __func__, M.x86.R_DX, M.x86.R_AX); function = 0; /* pmmAllocate */ length = 1; @@ -423,7 +423,7 @@ addr = ((u32) M.x86.R_DX << 16) | M.x86.R_AX; DEBUG_PRINTF_PMM ("%s: allocated memory at: %04x:%04x expected: 0000:0000\n", - __FUNCTION__, M.x86.R_DX, M.x86.R_AX); + __func__, M.x86.R_DX, M.x86.R_AX); handle = 0xdeadbeef; function = 1; /* pmmFind */ push_long(handle); @@ -438,5 +438,5 @@ pmm_handleInt(); DEBUG_PRINTF_PMM ("%s: freed memory rval: %04x:%04x (expected: 0000:0000)\n", - __FUNCTION__, M.x86.R_DX, M.x86.R_AX); + __func__, M.x86.R_DX, M.x86.R_AX); } Modified: coreboot-v3/util/x86emu/yabel/vbe.c =================================================================== --- coreboot-v3/util/x86emu/yabel/vbe.c 2009-02-12 19:41:05 UTC (rev 1130) +++ coreboot-v3/util/x86emu/yabel/vbe.c 2009-02-12 21:15:34 UTC (rev 1131) @@ -129,14 +129,14 @@ if (M.x86.R_AL != 0x4f) { DEBUG_PRINTF_VBE("%s: VBE Info Function NOT supported! AL=%x\n", - __FUNCTION__, M.x86.R_AL); + __func__, M.x86.R_AL); return -1; } if (M.x86.R_AH != 0x0) { DEBUG_PRINTF_VBE ("%s: VBE Info Function Return Code NOT OK! AH=%x\n", - __FUNCTION__, M.x86.R_AH); + __func__, M.x86.R_AH); return M.x86.R_AH; } //printf("VBE Info Dump:"); @@ -200,14 +200,14 @@ if (M.x86.R_AL != 0x4f) { DEBUG_PRINTF_VBE ("%s: VBE Return Mode Info Function NOT supported! AL=%x\n", - __FUNCTION__, M.x86.R_AL); + __func__, M.x86.R_AL); return -1; } if (M.x86.R_AH != 0x0) { DEBUG_PRINTF_VBE ("%s: VBE Return Mode Info (mode: %04x) Function Return Code NOT OK! AH=%02x\n", - __FUNCTION__, mode_info->video_mode, M.x86.R_AH); + __func__, mode_info->video_mode, M.x86.R_AH); return M.x86.R_AH; } //pointer to mode_info_block is in ES:DI @@ -260,7 +260,7 @@ M.x86.R_BX |= 0x4000; // set bit 14 to request linear framebuffer mode M.x86.R_BX &= 0x7FFF; // clear bit 15 to request clearing of framebuffer - DEBUG_PRINTF_VBE("%s: setting mode: 0x%04x\n", __FUNCTION__, + DEBUG_PRINTF_VBE("%s: setting mode: 0x%04x\n", __func__, M.x86.R_BX); // enable trace @@ -273,14 +273,14 @@ if (M.x86.R_AL != 0x4f) { DEBUG_PRINTF_VBE ("%s: VBE Set Mode Function NOT supported! AL=%x\n", - __FUNCTION__, M.x86.R_AL); + __func__, M.x86.R_AL); return -1; } if (M.x86.R_AH != 0x0) { DEBUG_PRINTF_VBE ("%s: mode: %x VBE Set Mode Function Return Code NOT OK! AH=%x\n", - __FUNCTION__, mode_info->video_mode, M.x86.R_AH); + __func__, mode_info->video_mode, M.x86.R_AH); return M.x86.R_AH; } return 0; @@ -296,7 +296,7 @@ M.x86.R_BL = 0x00; // set format M.x86.R_BH = format; - DEBUG_PRINTF_VBE("%s: setting palette format: %d\n", __FUNCTION__, + DEBUG_PRINTF_VBE("%s: setting palette format: %d\n", __func__, format); // enable trace @@ -309,14 +309,14 @@ if (M.x86.R_AL != 0x4f) { DEBUG_PRINTF_VBE ("%s: VBE Set Palette Format Function NOT supported! AL=%x\n", - __FUNCTION__, M.x86.R_AL); + __func__, M.x86.R_AL); return -1; } if (M.x86.R_AH != 0x0) { DEBUG_PRINTF_VBE ("%s: VBE Set Palette Format Function Return Code NOT OK! AH=%x\n", - __FUNCTION__, M.x86.R_AH); + __func__, M.x86.R_AH); return M.x86.R_AH; } return 0; @@ -339,7 +339,7 @@ // store color value at ES:DI out32le(biosmem + (M.x86.R_ES << 4) + M.x86.R_DI, color_value); - DEBUG_PRINTF_VBE("%s: setting color #%x: 0x%04x\n", __FUNCTION__, + DEBUG_PRINTF_VBE("%s: setting color #%x: 0x%04x\n", __func__, color_number, color_value); // enable trace @@ -352,14 +352,14 @@ if (M.x86.R_AL != 0x4f) { DEBUG_PRINTF_VBE ("%s: VBE Set Palette Function NOT supported! AL=%x\n", - __FUNCTION__, M.x86.R_AL); + __func__, M.x86.R_AL); return -1; } if (M.x86.R_AH != 0x0) { DEBUG_PRINTF_VBE ("%s: VBE Set Palette Function Return Code NOT OK! AH=%x\n", - __FUNCTION__, M.x86.R_AH); + __func__, M.x86.R_AH); return M.x86.R_AH; } return 0; @@ -388,20 +388,20 @@ if (M.x86.R_AL != 0x4f) { DEBUG_PRINTF_VBE ("%s: VBE Set Palette Function NOT supported! AL=%x\n", - __FUNCTION__, M.x86.R_AL); + __func__, M.x86.R_AL); return -1; } if (M.x86.R_AH != 0x0) { DEBUG_PRINTF_VBE ("%s: VBE Set Palette Function Return Code NOT OK! AH=%x\n", - __FUNCTION__, M.x86.R_AH); + __func__, M.x86.R_AH); return M.x86.R_AH; } // read color value from ES:DI *color_value = in32le(biosmem + (M.x86.R_ES << 4) + M.x86.R_DI); - DEBUG_PRINTF_VBE("%s: getting color #%x --> 0x%04x\n", __FUNCTION__, + DEBUG_PRINTF_VBE("%s: getting color #%x --> 0x%04x\n", __func__, color_number, *color_value); return 0; @@ -429,14 +429,14 @@ if (M.x86.R_AL != 0x4f) { DEBUG_PRINTF_VBE ("%s: VBE Get DDC Info Function NOT supported! AL=%x\n", - __FUNCTION__, M.x86.R_AL); + __func__, M.x86.R_AL); return -1; } if (M.x86.R_AH != 0x0) { DEBUG_PRINTF_VBE ("%s: port: %x VBE Get DDC Info Function Return Code NOT OK! AH=%x\n", - __FUNCTION__, ddc_info->port_number, M.x86.R_AH); + __func__, ddc_info->port_number, M.x86.R_AH); return M.x86.R_AH; } // BH = approx. time in seconds to transfer one EDID block @@ -464,14 +464,14 @@ if (M.x86.R_AL != 0x4f) { DEBUG_PRINTF_VBE ("%s: VBE Read EDID Function NOT supported! AL=%x\n", - __FUNCTION__, M.x86.R_AL); + __func__, M.x86.R_AL); return -1; } if (M.x86.R_AH != 0x0) { DEBUG_PRINTF_VBE ("%s: port: %x VBE Read EDID Function Return Code NOT OK! AH=%x\n", - __FUNCTION__, ddc_info->port_number, M.x86.R_AH); + __func__, ddc_info->port_number, M.x86.R_AH); return M.x86.R_AH; } @@ -565,13 +565,13 @@ if (strncmp((char *) input.signature, "DDC", 4) != 0) { printf ("%s: Invalid input signature! expected: %s, is: %s\n", - __FUNCTION__, "DDC", input.signature); + __func__, "DDC", input.signature); return -1; } if (input.size_reserved != sizeof(screen_info_t)) { printf ("%s: Size of return struct is wrong, required: %d, available: %d\n", - __FUNCTION__, (int) sizeof(screen_info_t), + __func__, (int) sizeof(screen_info_t), input.size_reserved); return -1; } @@ -765,7 +765,7 @@ output->framebuffer_address = best_mode_info.framebuffer_address; } else { - printf("%s: No suitable video mode found!\n", __FUNCTION__); + printf("%s: No suitable video mode found!\n", __func__); //unset display_type... output->display_type = 0; }

1 0

How to find graphics MMIO?
by Joseph Smith 12 Feb '09

12 Feb '09

I need to find out what my graphics MMIO space is. Is there a utility for that? -- Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org

3 3

dos2unix
by Myles Watson 12 Feb '09

12 Feb '09

In the spirit of trivial but large patches, here are two more. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Thanks, Myles

4 6

r1130 - in coreboot-v3: mainboard/kontron/986lcd-m southbridge/intel/i82801gx
by svn＠coreboot.org 12 Feb '09

12 Feb '09

Author: myles Date: 2009-02-12 20:41:05 +0100 (Thu, 12 Feb 2009) New Revision: 1130 Modified: coreboot-v3/mainboard/kontron/986lcd-m/power_reset_check.c coreboot-v3/southbridge/intel/i82801gx/stage1_smbus.c coreboot-v3/southbridge/intel/i82801gx/watchdog.c Log: Convert \r\n to \n in v3. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Corey Osgood <corey.osgood(a)gmail.com> Modified: coreboot-v3/mainboard/kontron/986lcd-m/power_reset_check.c =================================================================== --- coreboot-v3/mainboard/kontron/986lcd-m/power_reset_check.c 2009-02-10 22:41:35 UTC (rev 1129) +++ coreboot-v3/mainboard/kontron/986lcd-m/power_reset_check.c 2009-02-12 19:41:05 UTC (rev 1130) @@ -33,7 +33,7 @@ u8 cmos; cmos=cmos_read(RTC_BOOT_BYTE)>>4 ; - printk(BIOS_DEBUG, "Boot byte = %x\r\n", cmos); + printk(BIOS_DEBUG, "Boot byte = %x\n", cmos); if((cmos>2)&&(cmos&1)) full_reset(); } Modified: coreboot-v3/southbridge/intel/i82801gx/stage1_smbus.c =================================================================== --- coreboot-v3/southbridge/intel/i82801gx/stage1_smbus.c 2009-02-10 22:41:35 UTC (rev 1129) +++ coreboot-v3/southbridge/intel/i82801gx/stage1_smbus.c 2009-02-12 19:41:05 UTC (rev 1130) @@ -57,7 +57,7 @@ /* Clear any lingering errors, so transactions can run. */ outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT); - printk(BIOS_DEBUG, "SMBus controller enabled.\r\n"); + printk(BIOS_DEBUG, "SMBus controller enabled.\n"); } /* some prototypes are hand-declared since the include files are still a little too stage-2 oriented */ Modified: coreboot-v3/southbridge/intel/i82801gx/watchdog.c =================================================================== --- coreboot-v3/southbridge/intel/i82801gx/watchdog.c 2009-02-10 22:41:35 UTC (rev 1129) +++ coreboot-v3/southbridge/intel/i82801gx/watchdog.c 2009-02-12 19:41:05 UTC (rev 1130) @@ -54,5 +54,5 @@ outw(0x0008, base + 0x04); outw(0x0002, base + 0x06); - printk(BIOS_DEBUG, "ICH7 watchdog disabled\r\n"); + printk(BIOS_DEBUG, "ICH7 watchdog disabled\n"); }

1 0

mcp55_io_dump.c
by Carl-Daniel Hailfinger 12 Feb '09

12 Feb '09

Yinghai sent this to the list two years ago. It is really useful for debugging MCP55. Regards, Carl-Daniel -- http://www.hailfinger.org/

1 0

Motherboard ASUS P4S8L Chipset SIS 651/962
by Martin Hinner 12 Feb '09

12 Feb '09

Hi, I am not on the list, so please reply directly to my e-mail. I have one 'broken' Asus P4S8L mainboard with SIS651. This motherboard is working fine, except it sometimes does not boot properly (due to broken on-board NIC). I would like to try Coreboot on it, are you interesting in testing it on this chipset? Martin

1 0

[PATCH] Improve DBM690T and Pistachio comments
by Carl-Daniel Hailfinger 12 Feb '09

12 Feb '09

Improve mainboard.c comments for DBM690T and Pistachio. Fix reference to documentation. Use __FUNCTION__ instead of hardcoding function names in printk messages. No functional changes. I'm slowly getting to the point where adding another RS690 board is really easy and needs almost no changes to the existing target. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/pistachio/mainboard.c =================================================================== --- LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/pistachio/mainboard.c (Revision 3936) +++ LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/pistachio/mainboard.c (Arbeitskopie) @@ -49,11 +49,11 @@ * It has a pin named LOW_POWER to enable it into LOW POWER state. * In order to run NIC, we should let it out of Low power state. This pin is * controlled by GPM8. -* RPR4.2.3 GPM as GPIO +* RRG4.2.3 GPM as GPIO * GPM pins can be used as GPIO. The GPM I/O functions is controlled by three registers: * I/O C50, C51, C52, PM I/O94, 95, 96. -* RPR4.2.3.1 GPM pins as Input -* RPR4.2.3.2 GPM pins as Output +* RRG4.2.3.1 GPM pins as Input +* RRG4.2.3.2 GPM pins as Output * The R77 (on BRASS) / R81 (on Bronze) is not load! * So NIC can work whether this function runs. ********************************************************/ @@ -191,18 +191,18 @@ sm_dev->path.u.pci.devfn, 0x41, byte); /* set GPM5 as input */ - /* step1: set index register 0C50h to 13h (miscellaneous control) */ + /* set index register 0C50h to 13h (miscellaneous control) */ outb(0x13, 0xC50); /* CMIndex */ - /* step2: set CM data register 0C51h bits [7:6] to 01b to set Input/Out control */ + /* set CM data register 0C51h bits [7:6] to 01b to set Input/Out control */ byte = inb(0xC51); /* CMData */ byte &= 0x3f; byte |= 1 << 6; outb(byte, 0xC51); - /* step3: set GPM port 0C52h appropriate bits to 1 to tri-state the GPM port */ + /* set GPM port 0C52h bit 5 to 1 to tri-state the GPM port */ byte = inb(0xc52); /* GpmPort */ byte |= 1 << 5; outb(byte, 0xc52); - /* step4: set CM data register 0C51h bits [7:6] to 00b to set GPM port for read */ + /* set CM data register 0C51h bits [7:6] to 00b to set GPM port for read */ byte = inb(0xc51); byte &= 0x3f; outb(byte, 0xc51); @@ -282,14 +282,14 @@ /* TOP_MEM: the top of DRAM below 4G */ msr = rdmsr(TOP_MEM); printk_info - ("pistachio_enable, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n", - msr.lo, msr.hi); + ("%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n", + __FUNCTION__, msr.lo, msr.hi); /* TOP_MEM2: the top of DRAM above 4G */ msr2 = rdmsr(TOP_MEM2); printk_info - ("pistachio_enable, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n", - msr2.lo, msr2.hi); + ("%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n", + __FUNCTION__, msr2.lo, msr2.hi); switch (msr.lo) { case 0x10000000: /* 256M system memory */ @@ -310,8 +310,8 @@ } uma_memory_start = msr.lo - uma_memory_size; /* TOP_MEM1 */ - printk_info("pistachio_enable: uma size 0x%08x, memory start 0x%08x\n", - uma_memory_size, uma_memory_start); + printk_info("%s: uma size 0x%08x, memory start 0x%08x\n", + __FUNCTION__, uma_memory_size, uma_memory_start); /* TODO: TOP_MEM2 */ #else Index: LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/mainboard.c =================================================================== --- LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/mainboard.c (Revision 3936) +++ LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/mainboard.c (Arbeitskopie) @@ -49,8 +49,8 @@ /******************************************************** * dbm690t uses a BCM5789 as on-board NIC. * It has a pin named LOW_POWER to enable it into LOW POWER state. -* In order to run NIC, we should let it out of Low power state. This pin -* is controlled by sb600 GPM3. +* In order to run NIC, we should let it out of Low power state. This pin is +* controlled by sb600 GPM3. * RRG4.2.3 GPM as GPIO * GPM pins can be used as GPIO. The GPM I/O functions is controlled by three registers: * I/O C50, C51, C52, PM I/O94, 95, 96. @@ -63,22 +63,27 @@ printk_info("enable_onboard_nic.\n"); - outb(0x13, 0xC50); + /* set index register 0C50h to 13h (miscellaneous control) */ + outb(0x13, 0xC50); /* CMIndex */ + /* set CM data register 0C51h bits [7:6] to 01b to set Input/Out control */ byte = inb(0xC51); byte &= 0x3F; byte |= 0x40; outb(byte, 0xC51); + /* set GPM port 0C52h bit 3 to 0 to enable output for GPM3 */ byte = inb(0xC52); byte &= ~0x8; outb(byte, 0xC52); + /* set CM data register 0C51h bits [7:6] to 10b to set Output state control */ byte = inb(0xC51); byte &= 0x3F; byte |= 0x80; /* 7:6=10 */ outb(byte, 0xC51); + /* set GPM port 0C52h bit 3 to 0 to output 0 on GPM3 */ byte = inb(0xC52); byte &= ~0x8; outb(byte, 0xC52); @@ -205,14 +210,14 @@ /* TOP_MEM: the top of DRAM below 4G */ msr = rdmsr(TOP_MEM); printk_info - ("dbm690t_enable, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n", - msr.lo, msr.hi); + ("%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n", + __FUNCTION__, msr.lo, msr.hi); /* TOP_MEM2: the top of DRAM above 4G */ msr2 = rdmsr(TOP_MEM2); printk_info - ("dbm690t_enable, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n", - msr2.lo, msr2.hi); + ("%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n", + __FUNCTION__, msr2.lo, msr2.hi); switch (msr.lo) { case 0x10000000: /* 256M system memory */ @@ -233,8 +238,8 @@ } uma_memory_start = msr.lo - uma_memory_size; /* TOP_MEM1 */ - printk_info("dbm690t_enable: uma size 0x%08x, memory start 0x%08x\n", - uma_memory_size, uma_memory_start); + printk_info("%s: uma size 0x%08x, memory start 0x%08x\n", + __FUNCTION__, uma_memory_size, uma_memory_start); /* TODO: TOP_MEM2 */ #else -- http://www.hailfinger.org/ Index: LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/pistachio/mainboard.c =================================================================== --- LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/pistachio/mainboard.c (Revision 3936) +++ LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/pistachio/mainboard.c (Arbeitskopie) @@ -49,11 +49,11 @@ * It has a pin named LOW_POWER to enable it into LOW POWER state. * In order to run NIC, we should let it out of Low power state. This pin is * controlled by GPM8. -* RPR4.2.3 GPM as GPIO +* RRG4.2.3 GPM as GPIO * GPM pins can be used as GPIO. The GPM I/O functions is controlled by three registers: * I/O C50, C51, C52, PM I/O94, 95, 96. -* RPR4.2.3.1 GPM pins as Input -* RPR4.2.3.2 GPM pins as Output +* RRG4.2.3.1 GPM pins as Input +* RRG4.2.3.2 GPM pins as Output * The R77 (on BRASS) / R81 (on Bronze) is not load! * So NIC can work whether this function runs. ********************************************************/ @@ -191,18 +191,18 @@ sm_dev->path.u.pci.devfn, 0x41, byte); /* set GPM5 as input */ - /* step1: set index register 0C50h to 13h (miscellaneous control) */ + /* set index register 0C50h to 13h (miscellaneous control) */ outb(0x13, 0xC50); /* CMIndex */ - /* step2: set CM data register 0C51h bits [7:6] to 01b to set Input/Out control */ + /* set CM data register 0C51h bits [7:6] to 01b to set Input/Out control */ byte = inb(0xC51); /* CMData */ byte &= 0x3f; byte |= 1 << 6; outb(byte, 0xC51); - /* step3: set GPM port 0C52h appropriate bits to 1 to tri-state the GPM port */ + /* set GPM port 0C52h bit 5 to 1 to tri-state the GPM port */ byte = inb(0xc52); /* GpmPort */ byte |= 1 << 5; outb(byte, 0xc52); - /* step4: set CM data register 0C51h bits [7:6] to 00b to set GPM port for read */ + /* set CM data register 0C51h bits [7:6] to 00b to set GPM port for read */ byte = inb(0xc51); byte &= 0x3f; outb(byte, 0xc51); @@ -282,14 +282,14 @@ /* TOP_MEM: the top of DRAM below 4G */ msr = rdmsr(TOP_MEM); printk_info - ("pistachio_enable, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n", - msr.lo, msr.hi); + ("%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n", + __FUNCTION__, msr.lo, msr.hi); /* TOP_MEM2: the top of DRAM above 4G */ msr2 = rdmsr(TOP_MEM2); printk_info - ("pistachio_enable, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n", - msr2.lo, msr2.hi); + ("%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n", + __FUNCTION__, msr2.lo, msr2.hi); switch (msr.lo) { case 0x10000000: /* 256M system memory */ @@ -310,8 +310,8 @@ } uma_memory_start = msr.lo - uma_memory_size; /* TOP_MEM1 */ - printk_info("pistachio_enable: uma size 0x%08x, memory start 0x%08x\n", - uma_memory_size, uma_memory_start); + printk_info("%s: uma size 0x%08x, memory start 0x%08x\n", + __FUNCTION__, uma_memory_size, uma_memory_start); /* TODO: TOP_MEM2 */ #else Index: LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/mainboard.c =================================================================== --- LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/mainboard.c (Revision 3936) +++ LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/mainboard.c (Arbeitskopie) @@ -49,8 +49,8 @@ /******************************************************** * dbm690t uses a BCM5789 as on-board NIC. * It has a pin named LOW_POWER to enable it into LOW POWER state. -* In order to run NIC, we should let it out of Low power state. This pin -* is controlled by sb600 GPM3. +* In order to run NIC, we should let it out of Low power state. This pin is +* controlled by sb600 GPM3. * RRG4.2.3 GPM as GPIO * GPM pins can be used as GPIO. The GPM I/O functions is controlled by three registers: * I/O C50, C51, C52, PM I/O94, 95, 96. @@ -63,22 +63,27 @@ printk_info("enable_onboard_nic.\n"); - outb(0x13, 0xC50); + /* set index register 0C50h to 13h (miscellaneous control) */ + outb(0x13, 0xC50); /* CMIndex */ + /* set CM data register 0C51h bits [7:6] to 01b to set Input/Out control */ byte = inb(0xC51); byte &= 0x3F; byte |= 0x40; outb(byte, 0xC51); + /* set GPM port 0C52h bit 3 to 0 to enable output for GPM3 */ byte = inb(0xC52); byte &= ~0x8; outb(byte, 0xC52); + /* set CM data register 0C51h bits [7:6] to 10b to set Output state control */ byte = inb(0xC51); byte &= 0x3F; byte |= 0x80; /* 7:6=10 */ outb(byte, 0xC51); + /* set GPM port 0C52h bit 3 to 0 to output 0 on GPM3 */ byte = inb(0xC52); byte &= ~0x8; outb(byte, 0xC52); @@ -205,14 +210,14 @@ /* TOP_MEM: the top of DRAM below 4G */ msr = rdmsr(TOP_MEM); printk_info - ("dbm690t_enable, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n", - msr.lo, msr.hi); + ("%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n", + __FUNCTION__, msr.lo, msr.hi); /* TOP_MEM2: the top of DRAM above 4G */ msr2 = rdmsr(TOP_MEM2); printk_info - ("dbm690t_enable, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n", - msr2.lo, msr2.hi); + ("%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n", + __FUNCTION__, msr2.lo, msr2.hi); switch (msr.lo) { case 0x10000000: /* 256M system memory */ @@ -233,8 +238,8 @@ } uma_memory_start = msr.lo - uma_memory_size; /* TOP_MEM1 */ - printk_info("dbm690t_enable: uma size 0x%08x, memory start 0x%08x\n", - uma_memory_size, uma_memory_start); + printk_info("%s: uma size 0x%08x, memory start 0x%08x\n", + __FUNCTION__, uma_memory_size, uma_memory_start); /* TODO: TOP_MEM2 */ #else

3 3

r3942 - trunk/coreboot-v2/src/cpu/x86/mtrr
by svn＠coreboot.org 12 Feb '09

12 Feb '09

Author: stepan Date: 2009-02-12 17:02:16 +0100 (Thu, 12 Feb 2009) New Revision: 3942 Modified: trunk/coreboot-v2/src/cpu/x86/mtrr/mtrr.c Log: Fix mtrr setup for UMA architectures. If high SMM memory is used (and needs to be uncached for whatever reason; it shouldn't in my opinion), we should do it the same way. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: trunk/coreboot-v2/src/cpu/x86/mtrr/mtrr.c =================================================================== --- trunk/coreboot-v2/src/cpu/x86/mtrr/mtrr.c 2009-02-12 14:50:43 UTC (rev 3941) +++ trunk/coreboot-v2/src/cpu/x86/mtrr/mtrr.c 2009-02-12 16:02:16 UTC (rev 3942) @@ -37,6 +37,10 @@ #include <cpu/x86/mtrr.h> #include <cpu/x86/cache.h> +#ifdef CONFIG_GFXUMA +extern uint64_t uma_memory_base, uma_memory_size; +#endif + static unsigned int mtrr_msr[] = { MTRRfix64K_00000_MSR, MTRRfix16K_80000_MSR, MTRRfix16K_A0000_MSR, MTRRfix4K_C0000_MSR, MTRRfix4K_C8000_MSR, MTRRfix4K_D0000_MSR, MTRRfix4K_D8000_MSR, @@ -164,7 +168,7 @@ * ramsize = 156MB == 128MB WB (at 0MB) + 32MB WB (at 128MB) + 4MB UC (at 156MB) */ /* 2 MTRRS are reserved for the operating system */ -#if 0 +#if 1 #define BIOS_MTRRS 6 #define OS_MTRRS 2 #else @@ -229,13 +233,21 @@ unsigned long next_range_startk, unsigned char type, unsigned address_bits) { if (!range_sizek) { - printk_debug("range_to_mtrr called for empty range\n"); + /* If there's no MTRR hole, this function will bail out + * here when called for the hole. + */ + printk_spew("Zero-sized MTRR range @%ldKB\n", range_startk); return reg; } + if (reg >= BIOS_MTRRS) { - printk_err("Running out of variable MTRRs!\n"); + printk_err("Warning: Out of MTRRs for base: %4ldMB, range: %ldMB, type %s\n", + range_startk >>10, range_sizek >> 10, + (type==MTRR_TYPE_UNCACHEABLE)?"UC": + ((type==MTRR_TYPE_WRBACK)?"WB":"Other") ); return reg; } + while(range_sizek) { unsigned long max_align, align; unsigned long sizek; @@ -375,6 +387,7 @@ enable_fixed_mtrr(); } + void x86_setup_var_mtrrs(unsigned address_bits) /* this routine needs to know how many address bits a given processor * supports. CPUs get grumpy when you set too many bits in @@ -401,10 +414,22 @@ #endif var_state.reg = 0; var_state.address_bits = address_bits; + search_global_resources( IORESOURCE_MEM | IORESOURCE_CACHEABLE, IORESOURCE_MEM | IORESOURCE_CACHEABLE, set_var_mtrr_resource, &var_state); +#ifdef CONFIG_GFXUMA + // For now we assume the UMA space is at the end of memory + if (var_state.hole_startk || var_state.hole_sizek) { + printk_debug("Warning: Can't set up MTRR hole for UMA due to pre-existing MTRR hole.\n"); + } else { + // Increase the base range and set up UMA as an UC hole instead + var_state.range_sizek += (uma_memory_size >> 10); + var_state.hole_startk = (uma_memory_base >> 10); + var_state.hole_sizek = (uma_memory_size >> 10); + } +#endif /* Write the last range */ var_state.reg = range_to_mtrr(var_state.reg, var_state.range_startk, var_state.range_sizek, 0, MTRR_TYPE_WRBACK, var_state.address_bits);

1 0

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coreboot February 2009