coreboot February 2009

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232 discussions

[PATCH] Fix bayou payload execution
by Ulf Jordan 10 Feb '09

10 Feb '09

Bayou svn HEAD cannot execute its payloads correctly, due to payloads overwriting bayou in memory. This is in turn due to the lpgcc link run trying to apply both libpayload's and bayou's ldscripts. The two attached patches a) makes lpgcc's choice of ldscript overridable and b) adjusts bayou's ldscript to work with the recent MB changes in libpayload. Compile and runtime tested with bayou, coreinfo and coreboot-v3 in QEMU. /ulf

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r3935 - trunk/payloads/libpayload/bin
by svn＠coreboot.org 10 Feb '09

10 Feb '09

Author: myles Date: 2009-02-10 22:12:35 +0100 (Tue, 10 Feb 2009) New Revision: 3935 Modified: trunk/payloads/libpayload/bin/lpgcc Log: Fix bayou payload execution. Bayou must link with its own ldscript to end up at a load address that doesn't interfere with payloads. Make Bayou's ldscript MB compatible, so the link with libpayload/lib/i386/head.o succeeds. Signed-off-by: Ulf Jordan <jordan(a)chalmers.se> Acked-by: Jordan Crouse <jordan(a)cosmicpenguin.net> Modified: trunk/payloads/libpayload/bin/lpgcc =================================================================== --- trunk/payloads/libpayload/bin/lpgcc 2009-02-10 21:09:03 UTC (rev 3934) +++ trunk/payloads/libpayload/bin/lpgcc 2009-02-10 21:12:35 UTC (rev 3935) @@ -39,6 +39,8 @@ # This will set the _LIBDIR and _INCDIR variables used below . $BASE/lp.functions +_LDSCRIPT="-Wl,-T,$_LIBDIR/libpayload.ldscript" + trygccoption() { $DEFAULT_CC $1 -S -xc /dev/null -o .$$.tmp &> /dev/null RET=$? @@ -73,6 +75,11 @@ shift continue ;; + -Wl,-T,*) + _LDSCRIPT="$1" + shift + continue + ;; *) ;; esac @@ -90,7 +97,7 @@ _CFLAGS="$_CFLAGS -I`$DEFAULT_CC -m32 -print-search-dirs | head -n 1 | cut -d' ' -f2`include" -_LDFLAGS="-Wl,-T,$_LIBDIR/libpayload.ldscript -static" +_LDFLAGS="$_LDSCRIPT -static" if [ $DOLINK -eq 0 ]; then if [ $DEBUGME -eq 1 ]; then

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r3934 - trunk/payloads/bayou
by svn＠coreboot.org 10 Feb '09

10 Feb '09

Author: myles Date: 2009-02-10 22:09:03 +0100 (Tue, 10 Feb 2009) New Revision: 3934 Modified: trunk/payloads/bayou/bayou.ldscript Log: Fix bayou payload execution. Bayou must link with its own ldscript to end up at a load address that doesn't interfere with payloads. Make Bayou's ldscript MB compatible, so the link with libpayload/lib/i386/head.o succeeds. Signed-off-by: Ulf Jordan <jordan(a)chalmers.se> Acked-by: Jordan Crouse <jordan(a)cosmicpenguin.net> Modified: trunk/payloads/bayou/bayou.ldscript =================================================================== --- trunk/payloads/bayou/bayou.ldscript 2009-02-10 03:02:05 UTC (rev 3933) +++ trunk/payloads/bayou/bayou.ldscript 2009-02-10 21:09:03 UTC (rev 3934) @@ -60,6 +60,8 @@ *(.data.*) } + _edata = .; + .bss : { *(.bss) *(.bss.*)

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r3933 - in trunk/coreboot-v2: src/arch/i386/boot src/boot util/vgabios/x86emu/src/x86emu
by svn＠coreboot.org 09 Feb '09

09 Feb '09

Author: myles Date: 2009-02-10 04:02:05 +0100 (Tue, 10 Feb 2009) New Revision: 3933 Modified: trunk/coreboot-v2/src/arch/i386/boot/pirq_routing.c trunk/coreboot-v2/src/boot/elfboot.c trunk/coreboot-v2/util/vgabios/x86emu/src/x86emu/sys.c Log: Change 0x%p to %p. Thanks Stefan for catching the one I introduced in 3931. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Myles Watson <mylesgw(a)gmail.com> Modified: trunk/coreboot-v2/src/arch/i386/boot/pirq_routing.c =================================================================== --- trunk/coreboot-v2/src/arch/i386/boot/pirq_routing.c 2009-02-09 20:26:14 UTC (rev 3932) +++ trunk/coreboot-v2/src/arch/i386/boot/pirq_routing.c 2009-02-10 03:02:05 UTC (rev 3933) @@ -25,7 +25,7 @@ for (i = 0; i < rt->size; i++) sum += addr[i]; - printk_debug("%s(): Interrupt Routing Table located at 0x%p.\n", + printk_debug("%s(): Interrupt Routing Table located at %p.\n", __FUNCTION__, addr); Modified: trunk/coreboot-v2/src/boot/elfboot.c =================================================================== --- trunk/coreboot-v2/src/boot/elfboot.c 2009-02-09 20:26:14 UTC (rev 3932) +++ trunk/coreboot-v2/src/boot/elfboot.c 2009-02-10 03:02:05 UTC (rev 3933) @@ -590,7 +590,7 @@ /* Reset to booting from this image as late as possible */ boot_successful(); - printk_debug("Jumping to boot code at 0x%p\n", entry); + printk_debug("Jumping to boot code at %p\n", entry); post_code(0xfe); /* Jump to kernel */ Modified: trunk/coreboot-v2/util/vgabios/x86emu/src/x86emu/sys.c =================================================================== --- trunk/coreboot-v2/util/vgabios/x86emu/src/x86emu/sys.c 2009-02-09 20:26:14 UTC (rev 3932) +++ trunk/coreboot-v2/util/vgabios/x86emu/src/x86emu/sys.c 2009-02-10 03:02:05 UTC (rev 3933) @@ -196,7 +196,7 @@ //printk("It's a0000\n"); addr &= ~0xfffe0000; retaddr = (u8 *) (M.abseg + addr); - //printk("retaddr now 0x%p\n", retaddr); + //printk("retaddr now %p\n", retaddr); } else if (addr < 0x200) { printk("updating int vector 0x%x\n", addr >> 2); retaddr = (u8 *) (M.mem_base + addr);

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seabios question
by ron minnich 09 Feb '09

09 Feb '09

Sorry, I'm new to all this and am under ugly deadlines so I'm again asking for help. I need to run gpxe. Gpxe needs a bios api. So I need to put together coreboot v2 + seabios + gpxe. This is a bit more than I've done and I wonder if someone has done it already. This needs to all be in ROM. The goal is to have a kontron booting LTSP or whatever we want, and gpxe is ideal for this purpose. I need v2 for SMP, SMI, and ACPI. Thanks in advance ... ron

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Move Plugin support options
by Myles Watson 09 Feb '09

09 Feb '09

Plugin support shouldn't be as visible as it is. This patch moves it to the device menu and makes it depend on expert. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Thanks, Myles

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r1126 - coreboot-v3/device
by svn＠coreboot.org 09 Feb '09

09 Feb '09

Author: myles Date: 2009-02-09 23:25:59 +0100 (Mon, 09 Feb 2009) New Revision: 1126 Modified: coreboot-v3/device/Kconfig Log: Move Plugin menu and make it depend on experimental. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: coreboot-v3/device/Kconfig =================================================================== --- coreboot-v3/device/Kconfig 2009-02-09 16:10:58 UTC (rev 1125) +++ coreboot-v3/device/Kconfig 2009-02-09 22:25:59 UTC (rev 1126) @@ -123,9 +123,8 @@ Initialize onboard VGA chips before any plugin VGA cards are initialized. -endmenu - menu "Plugin Support" +depends EXPERT config PCIX_PLUGIN_SUPPORT bool "Support for devices that provide PCI-X and aren't in the dts." @@ -164,6 +163,8 @@ endmenu +endmenu #Devices + menu "Power management" config SUSPEND_TO_RAM

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flashrom: Can't mmap memory
by Myles Watson 09 Feb '09

09 Feb '09

When I boot using the factory BIOS on my s2895 flashrom works. When I boot with Coreboot, I get the Error: Can't mmap memory using /dev/mem: Operation not permitted It shouldn't be kernel parameters since I'm using the same grub2 entry to boot either way. This sounds a little too familiar, but I can't find a thread where this isn't linked to a newer, more restrictive kernel. Thanks, Myles

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r3932 - trunk/util/flashrom
by svn＠coreboot.org 09 Feb '09

09 Feb '09

Author: stuge Date: 2009-02-09 21:26:14 +0100 (Mon, 09 Feb 2009) New Revision: 3932 Modified: trunk/util/flashrom/flashrom.c Log: flashrom: Fix broken flash chip base address logic Elan SC520 requries us to deal with flash chip base addresses at locations other than top of 4GB. The logic for that was incorrectly triggered also when a board had more than one flash chip. This patch will honor flashbase only when probing for the first flash chip on the board, and look at top of 4GB for later chips. Signed-off-by: Peter Stuge <peter(a)stuge.se> Acked-by: Myles Watson <mylesgw(a)gmail.com> Modified: trunk/util/flashrom/flashrom.c =================================================================== --- trunk/util/flashrom/flashrom.c 2009-02-09 17:52:54 UTC (rev 3931) +++ trunk/util/flashrom/flashrom.c 2009-02-09 20:26:14 UTC (rev 3932) @@ -121,7 +121,7 @@ size = getpagesize(); } - base = flashbase ? flashbase : (0xffffffff - size + 1); + base = flashbase && flashchips == first_flash ? flashbase : (0xffffffff - size + 1); flash->virtual_memory = bios = physmap("flash chip", base, size); if (force)

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v2 warnings
by Myles Watson 09 Feb '09

09 Feb '09

Remove a couple of warnings (mostly from format strings.) Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Thanks, Myles

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coreboot February 2009