coreboot August 2008

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r3503 - trunk/payloads/libpayload/drivers
by svn＠coreboot.org 12 Aug '08

12 Aug '08

Author: stepan Date: 2008-08-12 16:19:40 +0200 (Tue, 12 Aug 2008) New Revision: 3503 Modified: trunk/payloads/libpayload/drivers/keyboard.c Log: libpayload: fix type in keyboard driver. (trivial) Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/payloads/libpayload/drivers/keyboard.c =================================================================== --- trunk/payloads/libpayload/drivers/keyboard.c 2008-08-12 11:58:00 UTC (rev 3502) +++ trunk/payloads/libpayload/drivers/keyboard.c 2008-08-12 14:19:40 UTC (rev 3503) @@ -96,6 +96,7 @@ case 0x80 | 0x36: case 0x80 | 0x2a: modifier |= MOD_SHIFT; + break; case 0x1d: modifier &= ~MOD_CTRL; break;

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[PATCH] libpayload: Drop useless Makefile.inc files
by Uwe Hermann 12 Aug '08

12 Aug '08

See patch. Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

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flashrom: Fix error -EINVAL on mmap()
by Segher Boessenkool 12 Aug '08

12 Aug '08

Don't calculate "flash_baseaddr" until the final value of "size" is known, otherwise we end up trying to map a page right after end of memory. Fixes #112. Signed-off-by: Segher Boessenkool <segher(a)kernel.crashing.org> --- flashrom.c | 16 ++++++++-------- 1 files changed, 8 insertions(+), 8 deletions(-) Index: flashrom/flashrom.c =================================================================== --- flashrom.orig/flashrom.c +++ flashrom/flashrom.c @@ -116,14 +116,6 @@ size = flash->total_size * 1024; -#ifdef TS5300 - // FIXME: Wrong place for this decision - // FIXME: This should be autodetected. It is trivial. - flash_baseaddr = 0x9400000; -#else - flash_baseaddr = (0xffffffff - size + 1); -#endif - /* If getpagesize() > size -> * "Can't mmap memory using /dev/mem: Invalid argument" * This should never happen as we don't support any flash chips @@ -139,6 +131,14 @@ size = getpagesize(); } +#ifdef TS5300 + // FIXME: Wrong place for this decision + // FIXME: This should be autodetected. It is trivial. + flash_baseaddr = 0x9400000; +#else + flash_baseaddr = (0xffffffff - size + 1); +#endif + bios = mmap(0, size, PROT_WRITE | PROT_READ, MAP_SHARED, fd_mem, (off_t) flash_baseaddr); if (bios == MAP_FAILED) {

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#112: probe_flash calculates base address before final value of size is known
by coreboot 12 Aug '08

12 Aug '08

#112: probe_flash calculates base address before final value of size is known ----------------------------------+----------------------------------------- Reporter: alaricx(a)gmail.com | Owner: somebody Type: defect | Status: new Priority: major | Milestone: Component: flashrom | Version: v2 Keywords: probe_flash mmap | Dependencies: Patchstatus: patch needs review | ----------------------------------+----------------------------------------- Found thanks to segher in #coreboot. In probe_flash(), flash_baseaddr is set before the getpagesize() > size check, thus can be invalid, causing mmap issues. -- Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/112> coreboot <http://www.coreboot.org/>

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r3502 - trunk/util/flashrom
by svn＠coreboot.org 12 Aug '08

12 Aug '08

Author: segher Date: 2008-08-12 13:58:00 +0200 (Tue, 12 Aug 2008) New Revision: 3502 Modified: trunk/util/flashrom/flashrom.c Log: flashrom: Fix error -EINVAL on mmap() Don't calculate "flash_baseaddr" until the final value of "size" is known, otherwise we end up trying to map a page right after the end of memory. Fixes #112. Signed-off-by: Segher Boessenkool <segher(a)kernel.crashing.org> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/util/flashrom/flashrom.c =================================================================== --- trunk/util/flashrom/flashrom.c 2008-08-11 20:35:32 UTC (rev 3501) +++ trunk/util/flashrom/flashrom.c 2008-08-12 11:58:00 UTC (rev 3502) @@ -116,14 +116,6 @@ size = flash->total_size * 1024; -#ifdef TS5300 - // FIXME: Wrong place for this decision - // FIXME: This should be autodetected. It is trivial. - flash_baseaddr = 0x9400000; -#else - flash_baseaddr = (0xffffffff - size + 1); -#endif - /* If getpagesize() > size -> * "Can't mmap memory using /dev/mem: Invalid argument" * This should never happen as we don't support any flash chips @@ -139,6 +131,14 @@ size = getpagesize(); } +#ifdef TS5300 + // FIXME: Wrong place for this decision + // FIXME: This should be autodetected. It is trivial. + flash_baseaddr = 0x9400000; +#else + flash_baseaddr = (0xffffffff - size + 1); +#endif + bios = mmap(0, size, PROT_WRITE | PROT_READ, MAP_SHARED, fd_mem, (off_t) flash_baseaddr); if (bios == MAP_FAILED) {

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[coreinfo] patch: change coreinfo to use libpayload to access cbtables
by Sean Nelson 12 Aug '08

12 Aug '08

remove coreboot_module.c's cbtables and use libpayload's cbtables. Signed-off-by: Sean Nelson <snelson(a)nmt.edu> --- patch for coreinfo, associated with my previous patch

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Google Mail issues
by Gregg C Levine 12 Aug '08

12 Aug '08

Hello! How many of us on this list also use Google Mail for the obvious reasons? Most of us may not be aware of this, but the entire Google site runs on a gaggle of used machines (well they were used the last time I had met with an engineering boffin from Google, myself and the LUG I belong to.), basically the 502 error message refers to hardware issues. In this case one of those machines had finally crashed, with what was once called a solid failure, and it needed to be replaced. Unfortunately instead of being assigned to Google the search engine, it was assigned to Google the Mail services. Hence the persistent 502 error message, and the issues concerning not being able to reach our mail messages. (And other data stored there as well.) And naturally it had just revived a few minutes ago. Ron, you are also welcome to dispute what I have just related. -- Gregg C Levine hansolofalcon(a)worldnet.att.net "The Force will be with you always." Obi-Wan Kenobi

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patch: stage 2 ide device for mcp55
by ron minnich 12 Aug '08

12 Aug '08

attached. This was pretty trivial. I expect to be able to do the next few devices and take at most 15 mins apiece for them. First I intend, since Peter keeps asking, to modify dtc so we can have ide.dtc and not just ide. This actually compiles and builds and the dtc works and ... well it's nice. ron

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patch: mcp pci device
by ron minnich 12 Aug '08

12 Aug '08

compiles with no errors. ron

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r750 - in coreboot-v3/include: . arch/x86 arch/x86/amd/k8 device
by svn＠coreboot.org 12 Aug '08

12 Aug '08

Author: rminnich Date: 2008-08-12 05:39:39 +0200 (Tue, 12 Aug 2008) New Revision: 750 Modified: coreboot-v3/include/arch/x86/amd/k8/k8.h coreboot-v3/include/arch/x86/amd/k8/sysconf.h coreboot-v3/include/arch/x86/cpu.h coreboot-v3/include/console.h coreboot-v3/include/device/device.h coreboot-v3/include/lib.h coreboot-v3/include/mc146818rtc.h coreboot-v3/include/string.h Log: Make some things (die, mem*, resourcemap code, option code) SHARED. The option code is tricky as it is used by standalone code. If you include that file and you are standalone, you now have to define STANDALONE (is there a better way?) Change the cpuid to be a 24-byte string instead of 3 u32s. Make the CPUID usage PIC-safe by not using %ebx. Test building on two different geodes, tested to boot on dbe62 Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: coreboot-v3/include/arch/x86/amd/k8/k8.h =================================================================== --- coreboot-v3/include/arch/x86/amd/k8/k8.h 2008-08-11 23:55:10 UTC (rev 749) +++ coreboot-v3/include/arch/x86/amd/k8/k8.h 2008-08-12 03:39:39 UTC (rev 750) @@ -422,4 +422,20 @@ u32 sblk; u32 sbbusn; } __attribute__((packed)); + +/* dual core support */ +unsigned int read_nb_cfg_54(void); + +struct node_core_id { + unsigned nodeid; + unsigned coreid; +}; + +// it can be used to get unitid and coreid it running only +struct node_core_id get_node_core_id(unsigned int nb_cfg_54); + +struct device; +unsigned get_apicid_base(unsigned ioapic_num); +void amd_sibling_init(struct device *cpu); + #endif /* ! ASSEMBLY */ Modified: coreboot-v3/include/arch/x86/amd/k8/sysconf.h =================================================================== --- coreboot-v3/include/arch/x86/amd/k8/sysconf.h 2008-08-11 23:55:10 UTC (rev 749) +++ coreboot-v3/include/arch/x86/amd/k8/sysconf.h 2008-08-12 03:39:39 UTC (rev 750) @@ -42,6 +42,6 @@ }; -extern struct amdk8_sysconf_t sysconf; +extern struct amdk8_sysconf sysconf; #endif Modified: coreboot-v3/include/arch/x86/cpu.h =================================================================== --- coreboot-v3/include/arch/x86/cpu.h 2008-08-11 23:55:10 UTC (rev 749) +++ coreboot-v3/include/arch/x86/cpu.h 2008-08-12 03:39:39 UTC (rev 750) @@ -99,9 +99,13 @@ r.ecx = 0; /* ecx is often an input as well as an output. */ - __asm__("cpuid" + /* can't use ebx in PIC mode */ + __asm__("pushl %%ebx" + "\n\tcpuid" + "\n\tmovl %%ebx, %%esi" + "\n\tpopl %%ebx" : "=a" (r.eax), - "=b" (r.ebx), + "=S" (r.ebx), "=c" (r.ecx), "=d" (r.edx) : "0" (r.eax), "2" (r.ecx)); @@ -246,9 +250,9 @@ }; }; -void setup_resource_map_x_offset(const struct rmap *rm, u32 max, +SHARED(setup_resource_map_x_offset, void, const struct rmap *rm, u32 max, u32 offset_dev, u32 offset_pciio, u32 offset_io); -void setup_resource_map(const struct rmap *rm, u32 max); +SHARED(setup_resource_map, void, const struct rmap *rm, u32 max); #endif /* ARCH_X86_CPU_H */ Modified: coreboot-v3/include/console.h =================================================================== --- coreboot-v3/include/console.h 2008-08-11 23:55:10 UTC (rev 749) +++ coreboot-v3/include/console.h 2008-08-12 03:39:39 UTC (rev 750) @@ -37,7 +37,6 @@ void console_tx_flush(void); unsigned char console_rx_byte(void); int console_tst_byte(void); -void die(const char *msg); #ifdef CONFIG_CONSOLE_BUFFER void printk_buffer_init(void); void printk_buffer_move(void *newaddr, int newsize); @@ -64,5 +63,6 @@ int msg_level, const char *fmt, ...); SHARED(banner, void, int msg_level, const char *msg); SHARED(dump_mem_range, void, int msg_level, unsigned char *buf, int size); +SHARED(die, void, const char *msg); #endif /* CONSOLE_H */ Modified: coreboot-v3/include/device/device.h =================================================================== --- coreboot-v3/include/device/device.h 2008-08-11 23:55:10 UTC (rev 749) +++ coreboot-v3/include/device/device.h 2008-08-12 03:39:39 UTC (rev 750) @@ -89,7 +89,7 @@ struct cpu_id { - u32 cpuid[3]; + u8 cpuid[24]; }; struct cpu_bus_id Modified: coreboot-v3/include/lib.h =================================================================== --- coreboot-v3/include/lib.h 2008-08-11 23:55:10 UTC (rev 749) +++ coreboot-v3/include/lib.h 2008-08-12 03:39:39 UTC (rev 750) @@ -20,6 +20,7 @@ #ifndef LIB_H #define LIB_H +#include <shared.h> /** * Return the size of a given array, no matter of which data type Modified: coreboot-v3/include/mc146818rtc.h =================================================================== --- coreboot-v3/include/mc146818rtc.h 2008-08-11 23:55:10 UTC (rev 749) +++ coreboot-v3/include/mc146818rtc.h 2008-08-12 03:39:39 UTC (rev 750) @@ -117,8 +117,14 @@ #define RTC_LAST_BOOT_FLAG_SET (1<<1) #define RTC_NORMAL_BOOT_FLAG_SET (1<<0) +#ifdef STANDALONE /* standalone program using this file */ +int get_option(void *dest, char *name); +#else +#include <shared.h> + +SHARED(get_option, int, void *dest, char *name); +#endif void rtc_init(int invalid); -int get_option(void *dest, char *name); int last_boot_normal(void); int check_normal_boot_flag(void); Modified: coreboot-v3/include/string.h =================================================================== --- coreboot-v3/include/string.h 2008-08-11 23:55:10 UTC (rev 749) +++ coreboot-v3/include/string.h 2008-08-12 03:39:39 UTC (rev 750) @@ -22,6 +22,7 @@ #define STRING_H #include <types.h> +#include <shared.h> /* lib/string.c */ size_t strnlen(const char *str, size_t maxlen); @@ -30,10 +31,10 @@ int strncmp(const char *s1, const char *s2, int maxlen); /* lib/mem.c */ -void *memcpy(void *dest, const void *src, size_t len); -void *memmove(void *dest, const void *src, size_t len); -void *memset(void *s, int c, size_t len); -int memcmp(const void *s1, const void *s2, size_t len); +SHARED(memcpy, void *, void *dest, const void *src, size_t len); +SHARED(memmove, void *, void *dest, const void *src, size_t len); +SHARED(memset, void *, void *s, int c, size_t len); +SHARED(memcmp, int , const void *s1, const void *s2, size_t len); /* console/vsprintf.c */ int sprintf(char *buf, const char *fmt, ...);

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coreboot August 2008