coreboot June 2008

coreboot@coreboot.org

75 participants
230 discussions

Re: [coreboot] Black window when running qemu with coreboot+LegacyBIOS
by Zhang Rui 24 Jun '08

24 Jun '08

Hi Kevin, 2008/6/19 Kevin O'Connor <kevin(a)koconnor.net>: > Please 'cc the coreboot mailing list too. OK. > On Thu, Jun 19, 2008 at 09:29:29AM +0800, Zhang Rui wrote: >> Hello, >> >> I build the latest code of LegacyBIOS and get bios.bin.elf. Then use >> it as payload of coreboot. Then I put bios.bin produced by coreboot >> and Vgabios-cirrus in one directory. >> And then run "qemu -L <directory of Vgabios-cirrus and bios.bin> -hda >> /dev/zero -serial stdio". But I get a black window of qemu with no >> output and cannot close. There are lots of messages in the command >> console. >> >> Is that OK or is there any problem? > > You've done well to get this far. You have an issue with coreboot: > >> the message in the console: >> >> coreboot-3.0.674 Thu Jun 19 08:39:43 CST 2008 starting... > [...] >> LAR: Attempting to open 'normal/payload/segment0'. >> LAR: Start 0xfffc0000 len 0x40000 >> LAR: seen member normal/option_table >> LAR: seen member normal/initram/segment0 >> LAR: seen member normal/stage2/segment0 >> LAR: seen member normal/stage2/segment1 >> LAR: seen member normal/stage2/segment2 >> LAR: seen member normal/payload/segment0 >> LAR: CHECK normal/payload/segment0 @ 0xfffc43c0 >> start 0xfffc4410 len 20789 reallen 65652 compression 1 entry >> 0x000f66e0 loadaddress 0x08048000 >> LAR: Compression algorithm #1 (lzma) used >> Decoding error = 1 > > The above is not right. > > To compare, I get: > > LAR: Attempting to open 'normal/payload/segment0'. > LAR: Start 0xfffc0000 len 0x40000 > LAR: seen member normal/option_table > LAR: seen member normal/initram/segment0 > LAR: seen member normal/stage2/segment0 > LAR: seen member normal/stage2/segment1 > LAR: seen member normal/stage2/segment2 > LAR: seen member normal/payload/segment0 > LAR: CHECK normal/payload/segment0 @ 0xfffc3e30 > start 0xfffc3e80 len 21037 reallen 65536 compression 1 entry 0x000f66a0 loadaddress 0x000f0000 > LAR: Compression algorithm #1 (lzma) used > > You have an incorrect reallen and loadaddress. You can use "objdump > -x bios.bin.elf" to confirm that the elf file is correct. I get: > > $ objdump -x out/bios.bin.elf > > out/bios.bin.elf: file format elf32-i386 > out/bios.bin.elf > architecture: i386, flags 0x00000112: > EXEC_P, HAS_SYMS, D_PAGED > start address 0x000f66a0 > > Program Header: > LOAD off 0x00001000 vaddr 0x000f0000 paddr 0x000f0000 align 2**12 > filesz 0x00010000 memsz 0x00010000 flags rw- > > Sections: > Idx Name Size VMA LMA File off Algn > 0 .data 00010000 000f0000 000f0000 00001000 2**0 > CONTENTS, ALLOC, LOAD, DATA > SYMBOL TABLE: > 000f0000 l d .data 00000000 .data > 00010000 g *ABS* 00000000 _binary_out_bios_bin_size > 00100000 g *ABS* 00000000 __bss_start > 00100000 g .data 00000000 _binary_out_bios_bin_end > 00100000 g *ABS* 00000000 _edata > 00100000 g *ABS* 00000000 _end > 000f0000 g .data 00000000 _binary_out_bios_bin_start > > > -Kevin > You are right. There is something wrong with my elf file. The address and size is not correct. Here is the message about my bios.bin.elf: legacybios/out> objdump -x bios.bin.elf bios.bin.elf: file format elf32-i386 bios.bin.elf architecture: i386, flags 0x00000112: EXEC_P, HAS_SYMS, D_PAGED start address 0x000f66e0 Program Header: LOAD off 0x00000000 vaddr 0x08048000 paddr 0x08048000 align 2**12 filesz 0x00010074 memsz 0x00010074 flags rw- Sections: Idx Name Size VMA LMA File off Algn 0 .data 00010000 08048074 08048074 00000074 2**0 CONTENTS, ALLOC, LOAD, DATA SYMBOL TABLE: 08048074 l d .data 00000000 .data 00000000 l d *ABS* 00000000 .shstrtab 00000000 l d *ABS* 00000000 .symtab 00000000 l d *ABS* 00000000 .strtab 00010000 g *ABS* 00000000 _binary_out_bios_bin_size 08058074 g *ABS* 00000000 __bss_start 08058074 g .data 00000000 _binary_out_bios_bin_end 08058074 g *ABS* 00000000 _edata 08058074 g *ABS* 00000000 _end 08048074 g .data 00000000 _binary_out_bios_bin_start What could be wrong in my building process? I build LegacyBIOS again with the config.h setting in http://www.coreboot.org/LegacyBIOS and the result is the same. Here is the building message: [...]legacybios> make AVOIDCOMBINE=1 mkdir out Compiling whole program out/blob.16.s In file included from out/blob.16.s.tmp.c:7: out/../src/kbd.c: In function 'process_key': out/../src/kbd.c:658: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/kbd.c:659: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/kbd.c:661: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/kbd.c:662: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/kbd.c:667: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/kbd.c:673: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/kbd.c:674: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/kbd.c:676: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/kbd.c:677: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/kbd.c:682: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/kbd.c:683: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/kbd.c:685: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/kbd.c:686: warning: dereferencing type-punned pointer will break strict-aliasing rules In file included from out/blob.16.s.tmp.c:12: out/../src/disk.c: In function 'extended_access': out/../src/disk.c:135: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/disk.c:136: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/disk.c:138: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/disk.c:150: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/disk.c: In function 'disk_1348': out/../src/disk.c:358: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/disk.c:375: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/disk.c:378: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/disk.c:381: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/disk.c:390: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/disk.c:396: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/disk.c:405: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/disk.c:407: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/disk.c:408: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/disk.c:462: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/disk.c:463: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/disk.c:466: warning: dereferencing type-punned pointer will break strict-aliasing rules In file included from out/blob.16.s.tmp.c:13: out/../src/cdrom.c: At top level: out/../src/disk.h:111: warning: 'cdrom_read_emu' declared inline after being called out/../src/disk.h:111: warning: previous declaration of 'cdrom_read_emu' was here out/../src/cdrom.c: In function 'cdemu_134b': out/../src/cdrom.c:282: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/cdrom.c:283: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/cdrom.c:284: warning: dereferencing type-punned pointer will break strict-aliasing rules out/../src/cdrom.c:285: warning: dereferencing type-punned pointer will break strict-aliasing rules Generating assembler for src/font.c Moving data sections to text in out/font.16.s Generating assembler for src/cbt.c Moving data sections to text in out/cbt.16.s Generating assembler for src/floppy_dbt.c Moving data sections to text in out/floppy_dbt.16.s Generating 16bit layout of out/romlayout16.o Precompiling src/rombios16.lds.S Linking out/rom16.o Extracting binary out/rom16.bin Generating symbol offset header out/rom16.offset.auto.h Compiling whole program out/romlayout32.o Precompiling src/rombios32.lds.S Linking out/rom32.o Extracting binary out/rom32.bin Generating symbol offset header out/rom32.offset.auto.h Building out/bios.bin Writing output rom out/bios.bin 16bit C-code size: 26336 32bit C-code size: 11044 Total C-code size: 37380

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filo: Skip native ATA controllers in find_ide_controller_compat()
by Peter Stuge 24 Jun '08

24 Jun '08

Patch not signed off since I haven't tested this at all. I would appreciate test results from using this patch on boards which have both SATA controller(s) and one or more PATA controllers in compatibility (AKA legacy) mode. Previously it was not possible to boot from a drive on a PATA controller in compat mode when there were PCI devices in native mode (SATA always are) on lower devfn numbers. Native mode devices were basically still assumed to use the legacy IO ports in the code looking up IO ports for compat devices. Please set DEBUG_IDE=1 in Config and send output to me or the list. Thanks! //Peter

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[RFC] coreboot Live CD
by Ken.Fuchs＠bench.com 24 Jun '08

24 Jun '08

The main problem with LinuxBIOS/coreboot is the lack of stable releases. When coreboot gets a stable release or at least a stable snapshot, it would be nice to add the source code to a Live CD with the proper toolchain. Another problem with LinuxBIOS and now with coreboot is all the mainboards I tried to build or the even the payloads would never compile without some serious errors. Hopefully, a validated coreboot Live CD would solve this problem and increase exposure of coreboot at the same time. Sincerely, Ken Fuchs

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What are the best motherboards/systems out there for open-source software?
by David Christensen 23 Jun '08

23 Jun '08

coreboot: I am researching parts to build a new open-source desktop system, and came across coreboot tonight. I have heard of open-source projects to implement x86 BIOS, but have always wondered how they fared given the fact that most motherboard vendors and chip vendors consider their products confidential intellectual property and won't provide technical documentation necessary for software development without an contract (NDA, etc.). Are there any modern x86 motherboards and/or systems currently available for which technical documents are available for the motherboard and everything on it? Are matters better or worse for alternate architectures? David

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What are the best motherboards/systems out there foropen-source software?
by Tiago Marques 23 Jun '08

23 Jun '08

Ok, I get your point, but the Iwlwifi is quite open IMHO. I don't really trust Intel, as they may pull the documentation for future products but take a look at this: http://www.phoronix.com/scan.php?page=article&item=984&num=1 http://www.phoronix.com/scan.php?page=article&item=850&num=1 They seem quite happy, well, at least the graphics division. I think it would be profitable to talk to companies like http://www.jwele.com/ which are emerging players in the market, to whom coreboot might interest. I can try to do this, but it isn't usually easy to get the right contacts. Best regards, Tiago Marques On Mon, Jun 23, 2008 at 3:58 PM, Cristi Magherusan <cristi.magherusan(a)net.utcluj.ro> wrote: > On Mon, 2008-06-23 at 13:56 +0100, Tiago Marques wrote: >> I've seen my fair share of open-source adoption, or not. As such, >> seeing the recent developments with open-source drivers in the Intel >> camp, I can say they are pretty happy with the result, everyone is. > > >From my experience, Intel only cares about the big OEM companies. > When they do give something to the community they usually give > poorly-written sourcecode that only they can further maintain instead > of proper documentation. The best example are the the ipw3945/iwlwifi > drivers for their wireless adapters. > http://kerneltrap.org/node/6650 > http://www.openbsd.org/papers/brhard2007 > >> Has it already been attempted to contact chipset manufacturers to >> release information without NDA, much like what AMD has already done >> with graphics cards? > > Yes it was, and they always give evasive answers about Intelectual > Property and external regulations that they must follow in order to > assure the robustness or security of their products. Pure bull$%!#. > >> I say this because, if they realize that by allowing open-source >> replacements for the BIOS would allow for new industry players to have >> a lower cost of entry to the motherboard manufacturing. This, I see, >> would drive chipset sales up, which is good for them IMHO. Emerging >> markets like Chine, which will start doing it anyway, would benefit, >> like the manufacturer would also. > > AMD and VIA are doing this, among others to reduce costs. Intel is just > too big for this small starting players. > >> This is something I think Coreboot should be attempting to "lobby", so >> NDAs could become a thing of the past. >> >> Anyone has any idea of how much are the costs for using Pheonix or AMI's BIOS? > > A few dollars per unit, i guess. I think their strong point is that they > offer support for them and make them work on new board models. > > Cristi > > -- > Cristi Magherusan, > Universitatea Tehnica din Cluj - Napoca > Centrul de Comunicatii "Pusztai Kalman" > Tel. 0264/401247 http://cc.utcluj.ro > >

1 0

r207 - in buildrom-devel/packages/filo: . patches
by svn＠coreboot.org 23 Jun '08

23 Jun '08

Author: jcrouse Date: 2008-06-23 17:28:22 +0200 (Mon, 23 Jun 2008) New Revision: 207 Modified: buildrom-devel/packages/filo/filo.mk buildrom-devel/packages/filo/patches/make.patch Log: buildrom: move FILO to r49 New patch to filo does a better job of groking sata drivers, moving to new revision (trivial). Signed-off-by: Jordan Crouse <jordan.crouse(a)amd.com> Acked-by: Jordan Crouse <jordan.crouse(a)amd.com> Modified: buildrom-devel/packages/filo/filo.mk =================================================================== --- buildrom-devel/packages/filo/filo.mk 2008-06-22 14:36:04 UTC (rev 206) +++ buildrom-devel/packages/filo/filo.mk 2008-06-23 15:28:22 UTC (rev 207) @@ -1,5 +1,5 @@ FILO_URL=svn://coreboot.org/filo/trunk/filo-0.5 -FILO_TAG=44 +FILO_TAG=49 FILO_DIR=$(BUILD_DIR)/filo FILO_SRC_DIR=$(FILO_DIR)/svn Modified: buildrom-devel/packages/filo/patches/make.patch =================================================================== --- buildrom-devel/packages/filo/patches/make.patch 2008-06-22 14:36:04 UTC (rev 206) +++ buildrom-devel/packages/filo/patches/make.patch 2008-06-23 15:28:22 UTC (rev 207) @@ -1,14 +1,14 @@ Index: svn/makerules =================================================================== ---- svn.orig/makerules 2007-05-01 02:15:06.000000000 -0600 -+++ svn/makerules 2007-05-01 02:15:45.000000000 -0600 +--- svn.orig/makerules 2008-06-23 09:25:38.000000000 -0600 ++++ svn/makerules 2008-06-23 09:26:54.000000000 -0600 @@ -6,7 +6,7 @@ GCCINCDIR = $(shell $(CC) -print-search-dirs | head -n 1 | cut -d' ' -f2)include CPPFLAGS = -nostdinc -imacros $(TOPDIR)/config.h -I$(TOPDIR)/include -I$(GCCINCDIR) -MD # grub part needs no-strict-aliasing! -CFLAGS = -Wall -Os -fomit-frame-pointer -fno-common -ffreestanding \ +CFLAGS_extra = -Wall -Os -fomit-frame-pointer -fno-common -ffreestanding \ - -fno-strict-aliasing -Wno-pointer-sign -Wno-unused + -fno-strict-aliasing -Wno-unused ASFLAGS = -D__ASSEMBLY__ @@ -30,10 +30,10 @@

1 0

Technologic TS-5300
by Peter Stuge 23 Jun '08

23 Jun '08

Who remembers details about this guy? flashrom hardcodes the flash chip address to 0x9400000 with -DTS5300 instead of the regular 4G-flash chip size. There's a comment suggesting that it should be possible to autodetect when flashrom is running on TS-5300, but there is no mention of how. The Technologic TS-5300 is an AMD Elan 520 PC/104 design which seems to still sell at $259 on http://www.embeddedarm.com/products/board-detail.php?product=TS-5300 I want to get rid of the #define. Probe it or lose it! //Peter

3 5

Does LegacyBIOS support USB?
by Joseph Smith 23 Jun '08

23 Jun '08

Hello, This may be a question for Kevin, but does LegacyBIOS support booting from USB drives? And/or legacy keyboard functionality? -- Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org

2 2

inteltool is sweet
by Joseph Smith 23 Jun '08

23 Jun '08

Hello, I finally had a chance to try out inteltool, and it works great! Great job Stefan! Attached is the output from the Thomson IP1000. Maybe if I get some free time I will add i82830 northbridge support to it. -- Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org

1 0

Re: [coreboot] #88: Add UHCI/OHCI/EHCI support to GRUB2
by joe＠settoplinux.org 22 Jun '08

22 Jun '08

#88: Add UHCI/OHCI/EHCI support to GRUB2 ----------------------------+----------------------------------------------- Reporter: uwe | Owner: oxygene Type: enhancement | Status: new Priority: critical | Milestone: Port GRUB2 to coreboot Component: filo | Version: Resolution: | Keywords: Dependencies: | Patchstatus: there is no patch ----------------------------+----------------------------------------------- Changes (by stepan): * owner: => oxygene -- Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/88#comment:2> coreboot <http://www.coreboot.org/> I can't wait for this to happen :-) -- Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org

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coreboot June 2008