coreboot October 2008

coreboot@coreboot.org

84 participants
608 discussions

r3687 - trunk/coreboot-v2/src/arch/i386/boot
by svn＠coreboot.org 23 Oct '08

23 Oct '08

Author: mjones Date: 2008-10-23 00:20:48 +0200 (Thu, 23 Oct 2008) New Revision: 3687 Modified: trunk/coreboot-v2/src/arch/i386/boot/pirq_routing.c Log: Fixes a off-by-one error when routing the IRQs. This led to IRQ15 not getting assigned. Signed-off-by: Jens Rottmann <JRottmann(a)LiPPERTEmbedded.de> Acked-by: Marc Jones <marc.jones(a)amd.com> Modified: trunk/coreboot-v2/src/arch/i386/boot/pirq_routing.c =================================================================== --- trunk/coreboot-v2/src/arch/i386/boot/pirq_routing.c 2008-10-22 15:49:20 UTC (rev 3686) +++ trunk/coreboot-v2/src/arch/i386/boot/pirq_routing.c 2008-10-22 22:20:48 UTC (rev 3687) @@ -137,7 +137,7 @@ /* yet not routed */ if (!pirq[link - 1]) { - for (k = 2; k < 15; k++) { + for (k = 2; k <= 15; k++) { if (!((bitmap >> k) & 1)) continue;

1 0

r944 - coreboot-v3/lib
by svn＠coreboot.org 22 Oct '08

22 Oct '08

Author: myles Date: 2008-10-22 21:18:04 +0200 (Wed, 22 Oct 2008) New Revision: 944 Modified: coreboot-v3/lib/console.c Log: This patch fixes the fix! Sorry again. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Myles Watson <mylesgw(a)gmail.com> Thanks, Myles Modified: coreboot-v3/lib/console.c =================================================================== --- coreboot-v3/lib/console.c 2008-10-22 18:55:55 UTC (rev 943) +++ coreboot-v3/lib/console.c 2008-10-22 19:18:04 UTC (rev 944) @@ -132,6 +132,10 @@ va_list args; int i; + if (msg_level > console_loglevel()) { + return 0; + } + #ifdef CONFIG_CONSOLE_PREPEND_LOG_LEVEL console_tx_byte('<', (void *)0); console_tx_byte(msg_level + '0', (void *)0); @@ -142,10 +146,6 @@ i = 0; #endif - if (msg_level > console_loglevel()) { - return 0; - } - va_start(args, fmt); i += vtxprintf(console_tx_byte, (void *)0, fmt, args); va_end(args);

1 0

committed route dumper code.
by ron minnich 22 Oct '08

22 Oct '08

This code is now callable from anywhere. Here is output. This call is from initram. It looks like the dumper code or the routes are wrong in some, not all, cases. I am gone for next week on travel so I wanted to give people a look at it. TODO: mv mainboard.c to stage2.c mv util.c to dumproutes.c DRAM(40)01000000-00ffffff, ->(1), R, W, 2 nodes, 1 DRAM(48)01000000-00ffffff, ->(1), R, W, 2 nodes, 1 DRAM(50)01000000-00ffffff, ->(1), R, W, 2 nodes, 1 DRAM(58)01000000-00ffffff, ->(1), R, W, 2 nodes, 1 DRAM(60)00000000-00ffffff, ->(4), , , No interleave, 0 DRAM(68)00000000-00ffffff, ->(0), R, W, 8 nodes, 0 DRAM(70)00000000-00ffffff, ->(0), , , No interleave, 0 DRAM(78)00000000-00ffffff, ->(0), , , No interleave, 0 MMIO(80)01a00000-1100ffff, ->(0,2), , , CPU disable 0, Lock 0, Non posted 0 MMIO(88)75060000-0000ffff, ->(2,0), , , CPU disable 0, Lock 0, Non posted 0 MMIO(90)51040000-3f00ffff, ->(0,0), , , CPU disable 1, Lock 0, Non posted 0 MMIO(98)00000000-0000ffff, ->(0,0), R, W, CPU disable 0, Lock 0, Non posted 0 MMIO(a0)01c00000-1100ffff, ->(0,1), , , CPU disable 0, Lock 0, Non posted 1 MMIO(a8)75000000-0000ffff, ->(2,0), , , CPU disable 0, Lock 0, Non posted 0 MMIO(b0)51040000-0000ffff, ->(0,0), , , CPU disable 1, Lock 0, Non posted 0 MMIO(b8)00000000-0000ffff, ->(0,0), , , CPU disable 0, Lock 0, Non posted 0 PCIIO(c0)00001010-00003110, ->(0,1), , ,VGA 0 ISA 0 PCIIO(c8)00000750-00000000, ->(2,0), , ,VGA 0 ISA 1 PCIIO(d0)00002510-00000000, ->(0,0), , ,VGA 1 ISA 0 PCIIO(d8)00000000-00000000, ->(0,0), , ,VGA 0 ISA 0 CONFIG(e0)00000000-00000000 ->(0,0), CE 0 CONFIG(e4)00000000-00000000 ->(0,0), CE 0 CONFIG(e8)00000000-00000000 ->(0,0), CE 0 CONFIG(ec)00000000-00000000 ->(0,0), CE 0

2 4

r943 - in coreboot-v3: mainboard/amd/serengeti northbridge/amd/k8
by svn＠coreboot.org 22 Oct '08

22 Oct '08

Author: myles Date: 2008-10-22 20:55:55 +0200 (Wed, 22 Oct 2008) New Revision: 943 Modified: coreboot-v3/mainboard/amd/serengeti/initram.c coreboot-v3/mainboard/amd/serengeti/mainboard.c coreboot-v3/northbridge/amd/k8/util.c Log: This patch cleans up the showallroutes utility: 1. fix if->in in comments 2. change width of output for different types 3. make all masks 0x so that it's easy to tell a mask It also changes the invocations to do function 1 instead of 0. I think we should consider a name that makes it clear that this is only good for AMD K8+ processors function 1. We might need a similar utility for other functions later. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Ronald G. Minnich <rminnich(a)gmail.com> Modified: coreboot-v3/mainboard/amd/serengeti/initram.c =================================================================== --- coreboot-v3/mainboard/amd/serengeti/initram.c 2008-10-22 18:31:42 UTC (rev 942) +++ coreboot-v3/mainboard/amd/serengeti/initram.c 2008-10-22 18:55:55 UTC (rev 943) @@ -250,7 +250,7 @@ dump_pci_device_index_wait(PCI_DEV(0, 0x19, 2), 0x98); #endif - showallroutes(BIOS_DEBUG, PCI_BDF(0,0x18, 0)); + showallroutes(BIOS_DEBUG, PCI_BDF(0,0x18, 1)); printk(BIOS_DEBUG, "stage1 returns\n"); return 0; Modified: coreboot-v3/mainboard/amd/serengeti/mainboard.c =================================================================== --- coreboot-v3/mainboard/amd/serengeti/mainboard.c 2008-10-22 18:31:42 UTC (rev 942) +++ coreboot-v3/mainboard/amd/serengeti/mainboard.c 2008-10-22 18:55:55 UTC (rev 943) @@ -35,14 +35,14 @@ static void show(struct device *dev) { - showallroutes(BIOS_DEBUG, PCI_BDF(0,0x18, 0)); + showallroutes(BIOS_DEBUG, PCI_BDF(0,0x18, 1)); } struct device_operations serengeti = { .id = {.type = DEVICE_ID_PCI, {.pci = {.vendor = PCI_VENDOR_ID_AMD, - .device = 1}}}, - .constructor = default_device_constructor, + .device = 1}}}, + .constructor = default_device_constructor, .phase6_init = show, }; Modified: coreboot-v3/northbridge/amd/k8/util.c =================================================================== --- coreboot-v3/northbridge/amd/k8/util.c 2008-10-22 18:31:42 UTC (rev 942) +++ coreboot-v3/northbridge/amd/k8/util.c 2008-10-22 18:55:55 UTC (rev 943) @@ -79,7 +79,7 @@ */ static int node(u32 reg) { - return BITS(reg, 0, 7); + return BITS(reg, 0, 0x7); } /** @@ -88,7 +88,7 @@ */ static int link(u32 reg) { - return BITS(reg, 4, 3); + return BITS(reg, 4, 0x3); } @@ -103,9 +103,9 @@ */ void showdram(int level, u8 which, u32 base, u32 lim) { - printk(level, "DRAM(%02x)%08x-%08x, ->(%d), %s, %s, %s, %d\n", - which, ((base&0xfff0000)<<8), - ((lim&0xffff0000<<8))+0xffffff, + printk(level, "DRAM(%02x)%010llx-%010llx, ->(%d), %s, %s, %s, %d\n", + which, (((u64)base&0xffff0000)<<8), + (((u64)lim&0xffff0000)<<8)+0xffffff, node(lim), re(base), we(base), ileave(base), (lim>>8)&3); } @@ -121,10 +121,10 @@ void showconfig(int level, u8 which, u32 reg) { /* don't use node() and link() here */ - printk(level, "CONFIG(%02x)%08x-%08x ->(%d,%d),%s %s CE %d\n", + printk(level, "CONFIG(%02x)%02x-%02x ->(%d,%d),%s %s CE %d\n", which, BITS(reg, 24, 0xff), BITS(reg, 16, 0xff), - BITS(reg, 4, 7), BITS(reg, 8, 3), - re(reg), we(reg), BITS(reg, 0, 4)); + BITS(reg, 4, 0x7), BITS(reg, 8, 0x3), + re(reg), we(reg), BITS(reg, 2, 0x1)); } /** @@ -138,15 +138,16 @@ */ void showpciio(int level, u8 which, u32 base, u32 lim) { - printk(level, "PCIIO(%02x)%08x-%08x, ->(%d,%d), %s, %s,VGA %d ISA %d\n", - which, BITS(base, 12, 0x3fff), BITS(lim, 12, 0x3fff), + printk(level, "PCIIO(%02x)%07x-%07x, ->(%d,%d), %s, %s,VGA %d ISA %d\n", + which, BITS(base, 12, 0x3fff)<<12, + (BITS(lim, 12, 0x3fff)<<12) + 0xfff, node(lim), link(lim), re(base), we(base), - BITS(base, 4, 1), BITS(base, 5, 1)); + BITS(base, 4, 0x1), BITS(base, 5, 0x1)); } /** - * Print the pciio routing info for one base/limit pair. + * Print the mmio routing info for one base/limit pair. * Show base, limit, dest node, dest link on that node, read and write enable, and * CPU Disable, Lock, and Non-posted. * @param level printing level @@ -156,19 +157,19 @@ */ void showmmio(int level, u8 which, u32 base, u32 lim) { - printk(level, "MMIO(%02x)%08x-%08x, ->(%d,%d), %s, %s, CPU disable %d, Lock %d, Non posted %d\n", - which, BITS(base, 0, 0xffffff00)<<8, - (BITS(lim, 0, 0xffffff00)<<8)+0xffff, + printk(level, "MMIO(%02x)%010llx-%010llx, ->(%d,%d), %s, %s, CPU disable %d, Lock %d, Non posted %d\n", + which, ((u64)BITS(base, 0, 0xffffff00))<<8, + (((u64)BITS(lim, 0, 0xffffff00))<<8)+0xffff, node(lim), link(lim), re(base), we(base), - BITS(base, 4, 1), - BITS(base, 7, 1), BITS(lim, 7, 1)); + BITS(base, 4, 0x1), + BITS(base, 7, 0x1), BITS(lim, 7, 0x1)); } /** * Show all dram routing registers. This function is callable at any time. * @param level The debug level - * @param dev 32-bit number if the standard bus/dev/fn format which is used raw config space + * @param dev 32-bit number in the standard bus/dev/fn format which is used raw config space */ void showalldram(int level, u32 dev) { @@ -183,7 +184,7 @@ /** * Show all mmio routing registers. This function is callable at any time. * @param level The debug level - * @param dev 32-bit number if the standard bus/dev/fn format which is used raw config space + * @param dev 32-bit number in the standard bus/dev/fn format which is used raw config space */ void showallmmio(int level, u32 dev) { @@ -198,7 +199,7 @@ /** * Show all pciio routing registers. This function is callable at any time. * @param level The debug level - * @param dev 32-bit number if the standard bus/dev/fn format which is used raw config space + * @param dev 32-bit number in the standard bus/dev/fn format which is used raw config space */ void showallpciio(int level, u32 dev) { @@ -213,7 +214,7 @@ /** * Show all config routing registers. This function is callable at any time. * @param level The debug level - * @param dev 32-bit number if the standard bus/dev/fn format which is used raw config space + * @param dev 32-bit number in the standard bus/dev/fn format which is used raw config space */ void showallconfig(int level, u32 dev) { @@ -227,7 +228,7 @@ /** * Show all routing registers. This function is callable at any time. * @param level The debug level - * @param dev 32-bit number if the standard bus/dev/fn format which is used raw config space + * @param dev 32-bit number in the standard bus/dev/fn format which is used raw config space */ void showallroutes(int level, u32 dev) {

1 0

r942 - coreboot-v3/lib
by svn＠coreboot.org 22 Oct '08

22 Oct '08

Author: myles Date: 2008-10-22 20:31:42 +0200 (Wed, 22 Oct 2008) New Revision: 942 Modified: coreboot-v3/lib/console.c Log: This patch fixes 921 so that the log_level works again. Sorry about that. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Myles Watson <mylesgw(a)gmail.com> Thanks, Myles Modified: coreboot-v3/lib/console.c =================================================================== --- coreboot-v3/lib/console.c 2008-10-21 03:20:05 UTC (rev 941) +++ coreboot-v3/lib/console.c 2008-10-22 18:31:42 UTC (rev 942) @@ -138,13 +138,13 @@ console_tx_byte('>', (void *)0); i = 3; +#else + i = 0; +#endif if (msg_level > console_loglevel()) { return 0; } -#else - i = 0; -#endif va_start(args, fmt); i += vtxprintf(console_tx_byte, (void *)0, fmt, args);

1 0

r3686 build service
by coreboot information 22 Oct '08

22 Oct '08

Dear coreboot readers! This is the automated build check service of coreboot. The developer "jcrouse" checked in revision 3686 to the coreboot source repository and caused the following changes: Change Log: Fix ordering problem in the libpayload Makefile. The include of 'include util/kconfig/Makefile' must come before certain pattern rules for compilation of kconfig files, otherwise the build would break in most situations. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Jordan Crouse <jordan.crouse(a)amd.com> Build Log: Compilation of tyan:s2882 has been fixed If something broke during this checkin please be a pain in jcrouse's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

1 0

Re: [coreboot] r3681 libpayload build failure
by Stefan Reinauer 22 Oct '08

22 Oct '08

svn(a)coreboot.org wrote: > Author: jcrouse > Date: 2008-10-21 23:49:48 +0200 (Tue, 21 Oct 2008) > New Revision: 3681 > > Modified: > trunk/payloads/libpayload/Makefile > trunk/payloads/libpayload/drivers/video/video.c > trunk/payloads/libpayload/sample/hello.c > Log: > [PATCH] fix video console init > > Move console_add_output-driver() inside the for() loop > > Signed-off-by: Jordan Crouse <jordan.crouse(a)amd.com> > Acked-by: Jordan Crouse <jordan.crouse(a)amd.com> > > > Modified: trunk/payloads/libpayload/Makefile > =================================================================== > --- trunk/payloads/libpayload/Makefile 2008-10-21 16:27:38 UTC (rev 3680) > +++ trunk/payloads/libpayload/Makefile 2008-10-21 21:49:48 UTC (rev 3681) > @@ -115,6 +115,8 @@ > $(Q)printf " AR $(subst $(shell pwd)/,,$(@))\n" > $(Q)$(AR) rc $@ $(OBJS) > > +include util/kconfig/Makefile > + > $(obj)/%.o: $(src)/%.c > $(Q)printf " CC $(subst $(shell pwd)/,,$(@))\n" > $(Q)$(CC) -m32 $(CFLAGS) -c -o $@ $< > @@ -164,7 +166,6 @@ > $(Q)rm -rf build > $(Q)rm -f .config .config.old ..config.tmp .kconfig.d .tmpconfig* > > -include util/kconfig/Makefile > > .PHONY: $(PHONY) prepare clean distclean doxygen doxy > This part is not mentioned in the changelog of the commit. I assume it has been committed by accident, because it breaks libpayload here: ra:libpayload stepan$ make menuconfig make: *** No rule to make target `menuconfig'. Stop. ra:libpayload stepan$ make config make: *** No rule to make target `config'. Stop. ra:libpayload stepan$ -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: info(a)coresystems.de • http://www.coresystems.de/ Registergericht: Amtsgericht Freiburg • HRB 7656 Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866

4 5

r3686 - trunk/payloads/libpayload
by svn＠coreboot.org 22 Oct '08

22 Oct '08

Author: jcrouse Date: 2008-10-22 17:49:20 +0200 (Wed, 22 Oct 2008) New Revision: 3686 Modified: trunk/payloads/libpayload/Makefile Log: Fix ordering problem in the libpayload Makefile. The include of 'include util/kconfig/Makefile' must come before certain pattern rules for compilation of kconfig files, otherwise the build would break in most situations. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Jordan Crouse <jordan.crouse(a)amd.com> Modified: trunk/payloads/libpayload/Makefile =================================================================== --- trunk/payloads/libpayload/Makefile 2008-10-22 11:23:32 UTC (rev 3685) +++ trunk/payloads/libpayload/Makefile 2008-10-22 15:49:20 UTC (rev 3686) @@ -115,16 +115,6 @@ $(Q)printf " AR $(subst $(shell pwd)/,,$(@))\n" $(Q)$(AR) rc $@ $(OBJS) -include util/kconfig/Makefile - -$(obj)/%.o: $(src)/%.c - $(Q)printf " CC $(subst $(shell pwd)/,,$(@))\n" - $(Q)$(CC) -m32 $(CFLAGS) -c -o $@ $< - -$(obj)/%.S.o: $(src)/%.S - $(Q)printf " CC $(subst $(shell pwd)/,,$(@))\n" - $(Q)$(CC) -m32 $(CFLAGS) -c -o $@ $< - endif install: lib @@ -169,6 +159,22 @@ $(Q)rm -rf build $(Q)rm -f .config .config.old ..config.tmp .kconfig.d .tmpconfig* +# This include must come _before_ the pattern rules below! +# Order _does_ matter for pattern rules. +include util/kconfig/Makefile +ifeq ($(strip $(HAVE_DOTCONFIG)),) +else + +$(obj)/%.o: $(src)/%.c + $(Q)printf " CC $(subst $(shell pwd)/,,$(@))\n" + $(Q)$(CC) -m32 $(CFLAGS) -c -o $@ $< + +$(obj)/%.S.o: $(src)/%.S + $(Q)printf " CC $(subst $(shell pwd)/,,$(@))\n" + $(Q)$(CC) -m32 $(CFLAGS) -c -o $@ $< + +endif + .PHONY: $(PHONY) prepare clean distclean doxygen doxy

1 0

Using flashrom to save DMI data
by Fabrício Ceolin 22 Oct '08

22 Oct '08

Hi, Is it possible to use a flashrom to save DMI data? In some bios, I can change the flash image before write on flash, but in some cases, the image cannot contains DMI data. Are there any way to extract DMI data using flashrom and pull a modified version back? Thanks! -- Fabrício Ceolin ulevel.com Diretor Executivo

1 0

r3685 build service
by coreboot information 22 Oct '08

22 Oct '08

Dear coreboot readers! This is the automated build check service of coreboot. The developer "stepan" checked in revision 3685 to the coreboot source repository and caused the following changes: Change Log: add multiboot support to defconfig (trivial) Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of tyan:s2882 has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3685&device=s2882&vendor=t… If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

1 0

← Newer
1
...
20
21
22
23
24
25
26
...
61
Older →

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

2004

2003

2002

coreboot October 2008