coreboot January 2008

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347 discussions

v3 compilation failures
by Carl-Daniel Hailfinger 29 Jan '08

29 Jan '08

3 of 5 targets in v3 fail to compile: - adl/msm800sev - amd/norwich - artecgroup/dbe61 While none of these targets worked on real hardware, we were at least able to compile them and could keep the code mostly warning-free to give later porters a good start. Right now the accumulated mess is rather difficult to clean up. One of the contributing factors is the variety of smbus_read_byte prototypes. Same problem for spd_read_byte. Which one is the "right" prototype? ./include/device/smbus.h:int smbus_read_byte(struct device *dev, u8 addr); ./device/smbus_ops.c:int smbus_read_byte(struct device *dev, u8 addr) (introduced in r307) ./include/lib.h:int smbus_read_byte(unsigned device, unsigned address); ./mainboard/artecgroup/dbe61/initram.c:int smbus_read_byte(unsigned device, unsigned address) (introduced in r349) ./southbridge/amd/cs5536/smbus_initram.c:int smbus_read_byte(u16 device, u8 address) (introduced in r344) Patches appreciated. Hints: - artecgroup/dbe61 first failed in r527 with "undefined reference to 'spd_read_byte'" - adl/msm800sev and amd/norwich first failed in r537 with "conflicting types for 'spd_read_byte'", which was uncovered by the new combined compilation, but the root cause (conflicting types) had been there for dozens of revisions. Regards, Carl-Daniel

6 16

r568 - coreboot-v3/include
by svn＠coreboot.org 29 Jan '08

29 Jan '08

Author: mjones Date: 2008-01-30 01:48:41 +0100 (Wed, 30 Jan 2008) New Revision: 568 Modified: coreboot-v3/include/lib.h Log: V3 compilation errors: Clean up lib.h prototypes. Signed-off-by: Marc Jones <marc.jones(a)amd.com> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: coreboot-v3/include/lib.h =================================================================== --- coreboot-v3/include/lib.h 2008-01-30 00:46:41 UTC (rev 567) +++ coreboot-v3/include/lib.h 2008-01-30 00:48:41 UTC (rev 568) @@ -36,11 +36,4 @@ void beep_short(void); void beep_long(void); -/* smbus functions */ -int smbus_read_byte(unsigned device, unsigned address); - -/* dram functions */ -void ram_failure(const char *why); -void ram_initialize(int controllers, void *ctrl); - #endif /* LIB_H */

1 0

r567 - coreboot-v3/southbridge/amd/cs5536
by svn＠coreboot.org 29 Jan '08

29 Jan '08

Author: mjones Date: 2008-01-30 01:46:41 +0100 (Wed, 30 Jan 2008) New Revision: 567 Modified: coreboot-v3/southbridge/amd/cs5536/smbus_initram.c Log: V3 compilation errors: Fix spd_read_byte prototype. Signed-off-by: Marc Jones <marc.jones(a)amd.com> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: coreboot-v3/southbridge/amd/cs5536/smbus_initram.c =================================================================== --- coreboot-v3/southbridge/amd/cs5536/smbus_initram.c 2008-01-29 17:48:10 UTC (rev 566) +++ coreboot-v3/southbridge/amd/cs5536/smbus_initram.c 2008-01-30 00:46:41 UTC (rev 567) @@ -343,7 +343,7 @@ * @param address The address. * @return The data from the SMBus packet area or an error of 0xff (i.e. -1). */ -int spd_read_byte(u16 device, u8 address) +u8 spd_read_byte(u16 device, u8 address) { return smbus_read_byte(device, address); }

1 0

Re: [coreboot] RM4100 Lives! <maybe with VGA ;)
by joe＠smittys.pointclark.net 29 Jan '08

29 Jan '08

> Alright! Check out the i830 datasheet page 131 section 4.5.3.6 says > that the setting of the SCC, if it's 38000 0r 30000, depends on device > #0 GCC1 bit 1. I'm not seeing those bits get modified anywhere, so drop > this into northbridge.c's northbridge_init or else sdram_set_registers > (it may have to be done during pre-raminit, for linuxbios to properly > recognize the device): > > > Good luck, > Corey Ba Bing!! I just set GCC1 in raminit.c to (0x3 << 4) 1mb vga memory and boom we have VGA. I do see some issues that are going to need to get worked out, with it. See attached boot log. 1. from bootlog, what does this mean? halt_sys: file /home/joe/coreboot-v2/src/devices/emulator/x86emu/ops.c, line 4387 2. The mtrr setup seems kind of crazy? is this normal? 3. kernel message: 127MB LOWMEM available. This should be right according to the original bios (1MB for VGA) 4. kernel message: agpgart: Detected 892K stolen memory. This should say 1024 correct? How to fix it? Getting there, I can see the finish line far off in the distance...... Thanks - Joe

1 0

alix1c and v3
by ron minnich 29 Jan '08

29 Jan '08

OK, VSA is running fine. BUT, after VSA runs, memory at 0x1000 is ZERO'd. This is Bad, as this is where stage2 lives! Any ideas :-) ron

7 36

ROM_SIZE
by Marc Karasek 29 Jan '08

29 Jan '08

I have a question. Is there any place I can look that will explain the relationship between the options for ROM_SIZE, etc.. in the Config.lb file? -- /********************* Marc Karasek MTS Sun Microsystems mailto:marc.karasek@sun.com ph:770.360.6415 *********************/

2 3

Re: [coreboot] proposed change to dtc to allow multiple dts files per single chip
by Carl-Daniel Hailfinger 29 Jan '08

29 Jan '08

On 29.01.2008 17:44, ron minnich wrote: > Second try. > > In the current version of dtc, if one has the line: > /config/ = "northbridge/amd/geodelx"; > > Then the file northbridge/amd/geodelx/dts is read in and processed. > Magic(TM) appends the name "/dts" to the path. > > This hack is fine with chips that only do one thing. > But some (all) northbridge parts play several roles: APIC cluster, PCI domain > device, and PCI device. The result is a need for more than one dts, since > there are three possible devices, with three types of IDs, and so on. > > To keep things sane, I am proposing to enable multiple dts files in a > directory, names (e.g., nothing required here): > domaindts > pcidts > apicdts > > (of course these names can be anything, this is just an example). > This change will require a change to the dtc, since we can no longer > assume just one dts file, and hence need a way to name these different > files. > > The proposed change is very simple. We now require the full path name > for the file, and eliminate the Magic(TM). > > So, > /config/ = "northbridge/amd/geodelx/pcidts"; > > will open the pcidts file. > /config/ = "northbridge/amd/geodelx/domaindts"; > will open the domain dts. > > Maybe we should just call it domain and pci and apic? works for me. > /config/ = "northbridge/amd/geodelx/domain"; > /config/ = "northbridge/amd/geodelx/pcibridge"; > /config/ = "northbridge/amd/geodelx/apic"; > > Changes: > dtc.c: create a new function, fopenfile, that will only open a path if it > really is a file. Modify dtc_open_file to use this function. fopenfile > assumes "-" means stdin; should it, or should I move that assumption back > to dtc_open_file? > dtc.h: add prototypes > dtc-parser.y: Given a config path, open the path. > southbridge/amd/cs5536/cs5536.c: example of how C code changes > > > Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> > Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Please see the comments below, but they do not have to be addressed for this commit, just keep them in mind for future commits in that area. > Index: util/dtc/dtc.c > =================================================================== > --- util/dtc/dtc.c (revision 565) > +++ util/dtc/dtc.c (working copy) > @@ -61,21 +61,47 @@ > fill_fullpaths(child, tree->fullpath); > } > > -static FILE *dtc_open_file(char *fname) > +/* How stupid is POSIX? This stupid: you can fopen a directory if mode > + * is "r", but then there is very little you can do with it except get errors. > + * This function now makes sure that the thing you open is a file. > + */ > +FILE *fopenfile(char *fname) > { > - FILE *f; > + FILE *f = NULL; > > - if (streq(fname, "-")) > + if (streq(fname, "-")){ > f = stdin; > - else > + } else { > + struct stat buf; > + if (stat(fname, &buf) < 0) { > + errno = EISDIR; > + goto no; > + } > + > + if (! S_ISREG(buf.st_mode)){ > + errno = EISDIR; > + goto no; > + } > + > f = fopen(fname, "r"); > + } > > +no: > + > + return f; > +} > + > +FILE *dtc_open_file(char *fname) > +{ > + FILE *f = fopenfile(fname); > + > if (! f) > die("Couldn't open \"%s\": %s\n", fname, strerror(errno)); > > return f; > } > > + > static void usage(void) > { > fprintf(stderr, "Usage:\n"); > Index: util/dtc/dtc.h > =================================================================== > --- util/dtc/dtc.h (revision 565) > +++ util/dtc/dtc.h (working copy) > @@ -31,6 +31,8 @@ > #include <errno.h> > #include <unistd.h> > #include <netinet/in.h> > +#include <sys/types.h> > +#include <sys/stat.h> > > /* also covers (part of?) linux's byteswap.h functionality */ > #include "endian.h" > @@ -236,5 +238,6 @@ > > char *join_path(char *path, char *name); > void fill_fullpaths(struct node *tree, char *prefix); > - > +FILE *fopenfile(char *fname); > +FILE *dtc_open_file(char *fname); > #endif /* _DTC_H */ > Index: util/dtc/dtc-parser.y > =================================================================== > --- util/dtc/dtc-parser.y (revision 565) > +++ util/dtc/dtc-parser.y (working copy) > @@ -121,17 +121,16 @@ > config: DT_CONFIG '(' > includepath { > void switchin(FILE *f); > - > - /* switch ... */ > - char path[1024]; > FILE *f; > + /* The need for a cast here is silly */ > + char *name = (char *)$3.val; > + > /* TODO: keep track of which of these we have read in. If we have already done it, then > * don't do it twice. > */ > - sprintf(path, "%s/dts", $3.val); > - f = fopen(path, "r"); > + f = fopenfile(name); > if (! f){ > - perror(path); > + perror(name); > exit(1); > } > switchin(f); > Index: southbridge/amd/cs5536/cs5536.c > =================================================================== > --- southbridge/amd/cs5536/cs5536.c (revision 565) > +++ southbridge/amd/cs5536/cs5536.c (working copy) > @@ -172,7 +172,7 @@ > * > * @param sb Southbridge config structure. > */ > -static void lpc_init(struct southbridge_amd_cs5536_config *sb) > +static void lpc_init(struct southbridge_amd_cs5536_dts_config *sb) > { > struct msr msr; > > @@ -220,7 +220,7 @@ > * > * @param sb Southbridge config structure. > */ > -static void uarts_init(struct southbridge_amd_cs5536_config *sb) > +static void uarts_init(struct southbridge_amd_cs5536_dts_config *sb) > { > struct msr msr; > u16 addr = 0; > @@ -383,7 +383,7 @@ > * > * @param sb Southbridge config structure. > */ > -static void enable_USB_port4(struct southbridge_amd_cs5536_config *sb) > +static void enable_USB_port4(struct southbridge_amd_cs5536_dts_config *sb) > { > u32 *bar; > struct msr msr; > @@ -475,7 +475,7 @@ > { > struct device *dev; > struct msr msr; > - struct southbridge_amd_cs5536_config *sb; > + struct southbridge_amd_cs5536_dts_config *sb; > const struct msrinit *csi; > > post_code(P80_CHIPSET_INIT); > @@ -486,7 +486,7 @@ > __FUNCTION__); > return; > } > - sb = (struct southbridge_amd_cs5536_config *)dev->device_configuration; > + sb = (struct southbridge_amd_cs5536_dts_config *)dev->device_configuration; > > #if 0 > if (!IsS3Resume()) > @@ -548,8 +548,8 @@ > */ > static void southbridge_init(struct device *dev) > { > - struct southbridge_amd_cs5536_config *sb = > - (struct southbridge_amd_cs5536_config *)dev->device_configuration; > + struct southbridge_amd_cs5536_dts_config *sb = > + (struct southbridge_amd_cs5536_dts_config *)dev->device_configuration; > > /* > * struct device *gpiodev; > struct southbridge_amd_cs5536_dts_config is a rather ling name. While I agree that we want to reflect the name of the dts in the name of the struct, we probably want to keep the name as short as possible. Since _dts is already part of the struct name, maybe we can remove the _config from the end. Regards, Carl-Daniel

2 1

r566 - in coreboot-v3: southbridge/amd/cs5536 util/dtc
by svn＠coreboot.org 29 Jan '08

29 Jan '08

Author: rminnich Date: 2008-01-29 18:48:10 +0100 (Tue, 29 Jan 2008) New Revision: 566 Modified: coreboot-v3/southbridge/amd/cs5536/cs5536.c coreboot-v3/util/dtc/dtc-parser.y coreboot-v3/util/dtc/dtc.c coreboot-v3/util/dtc/dtc.h Log: In the current version of dtc, if one has the line: /config/ = "northbridge/amd/geodelx"; Then the file northbridge/amd/geodelx/dts is read in and processed. Magic(TM) appends the name "/dts" to the path. This hack is fine with chips that only do one thing. But some (all) northbridge parts play several roles: APIC cluster, PCI domain device, and PCI device. The result is a need for more than one dts, since there are three possible devices, with three types of IDs, and so on. To keep things sane, I am proposing to enable multiple dts files in a directory, names (e.g., nothing required here): domaindts pcidts apicdts (of course these names can be anything, this is just an example). This change will require a change to the dtc, since we can no longer assume just one dts file, and hence need a way to name these different files. The proposed change is very simple. We now require the full path name for the file, and eliminate the Magic(TM). So, /config/ = "northbridge/amd/geodelx/pcidts"; will open the pcidts file. /config/ = "northbridge/amd/geodelx/domaindts"; will open the domain dts. Maybe we should just call it domain and pci and apic? works for me. /config/ = "northbridge/amd/geodelx/domain"; /config/ = "northbridge/amd/geodelx/pcibridge"; /config/ = "northbridge/amd/geodelx/apic"; Changes: dtc.c: create a new function, fopenfile, that will only open a path if it really is a file. Modify dtc_open_file to use this function. fopenfile assumes "-" means stdin; should it, or should I move that assumption back to dtc_open_file? dtc.h: add prototypes dtc-parser.y: Given a config path, open the path. southbridge/amd/cs5536/cs5536.c: example of how C code changes Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Please see the comments below, but they do not have to be addressed for this commit, just keep them in mind for future commits in that area. Modified: coreboot-v3/southbridge/amd/cs5536/cs5536.c =================================================================== --- coreboot-v3/southbridge/amd/cs5536/cs5536.c 2008-01-28 17:50:56 UTC (rev 565) +++ coreboot-v3/southbridge/amd/cs5536/cs5536.c 2008-01-29 17:48:10 UTC (rev 566) @@ -172,7 +172,7 @@ * * @param sb Southbridge config structure. */ -static void lpc_init(struct southbridge_amd_cs5536_config *sb) +static void lpc_init(struct southbridge_amd_cs5536_dts_config *sb) { struct msr msr; @@ -220,7 +220,7 @@ * * @param sb Southbridge config structure. */ -static void uarts_init(struct southbridge_amd_cs5536_config *sb) +static void uarts_init(struct southbridge_amd_cs5536_dts_config *sb) { struct msr msr; u16 addr = 0; @@ -383,7 +383,7 @@ * * @param sb Southbridge config structure. */ -static void enable_USB_port4(struct southbridge_amd_cs5536_config *sb) +static void enable_USB_port4(struct southbridge_amd_cs5536_dts_config *sb) { u32 *bar; struct msr msr; @@ -475,7 +475,7 @@ { struct device *dev; struct msr msr; - struct southbridge_amd_cs5536_config *sb; + struct southbridge_amd_cs5536_dts_config *sb; const struct msrinit *csi; post_code(P80_CHIPSET_INIT); @@ -486,7 +486,7 @@ __FUNCTION__); return; } - sb = (struct southbridge_amd_cs5536_config *)dev->device_configuration; + sb = (struct southbridge_amd_cs5536_dts_config *)dev->device_configuration; #if 0 if (!IsS3Resume()) @@ -548,8 +548,8 @@ */ static void southbridge_init(struct device *dev) { - struct southbridge_amd_cs5536_config *sb = - (struct southbridge_amd_cs5536_config *)dev->device_configuration; + struct southbridge_amd_cs5536_dts_config *sb = + (struct southbridge_amd_cs5536_dts_config *)dev->device_configuration; /* * struct device *gpiodev; Modified: coreboot-v3/util/dtc/dtc-parser.y =================================================================== --- coreboot-v3/util/dtc/dtc-parser.y 2008-01-28 17:50:56 UTC (rev 565) +++ coreboot-v3/util/dtc/dtc-parser.y 2008-01-29 17:48:10 UTC (rev 566) @@ -121,17 +121,16 @@ config: DT_CONFIG '(' includepath { void switchin(FILE *f); - - /* switch ... */ - char path[1024]; FILE *f; + /* The need for a cast here is silly */ + char *name = (char *)$3.val; + /* TODO: keep track of which of these we have read in. If we have already done it, then * don't do it twice. */ - sprintf(path, "%s/dts", $3.val); - f = fopen(path, "r"); + f = fopenfile(name); if (! f){ - perror(path); + perror(name); exit(1); } switchin(f); Modified: coreboot-v3/util/dtc/dtc.c =================================================================== --- coreboot-v3/util/dtc/dtc.c 2008-01-28 17:50:56 UTC (rev 565) +++ coreboot-v3/util/dtc/dtc.c 2008-01-29 17:48:10 UTC (rev 566) @@ -61,21 +61,47 @@ fill_fullpaths(child, tree->fullpath); } -static FILE *dtc_open_file(char *fname) +/* How stupid is POSIX? This stupid: you can fopen a directory if mode + * is "r", but then there is very little you can do with it except get errors. + * This function now makes sure that the thing you open is a file. + */ +FILE *fopenfile(char *fname) { - FILE *f; + FILE *f = NULL; - if (streq(fname, "-")) + if (streq(fname, "-")){ f = stdin; - else + } else { + struct stat buf; + if (stat(fname, &buf) < 0) { + errno = EISDIR; + goto no; + } + + if (! S_ISREG(buf.st_mode)){ + errno = EISDIR; + goto no; + } + f = fopen(fname, "r"); + } +no: + + return f; +} + +FILE *dtc_open_file(char *fname) +{ + FILE *f = fopenfile(fname); + if (! f) die("Couldn't open \"%s\": %s\n", fname, strerror(errno)); return f; } + static void usage(void) { fprintf(stderr, "Usage:\n"); Modified: coreboot-v3/util/dtc/dtc.h =================================================================== --- coreboot-v3/util/dtc/dtc.h 2008-01-28 17:50:56 UTC (rev 565) +++ coreboot-v3/util/dtc/dtc.h 2008-01-29 17:48:10 UTC (rev 566) @@ -31,6 +31,8 @@ #include <errno.h> #include <unistd.h> #include <netinet/in.h> +#include <sys/types.h> +#include <sys/stat.h> /* also covers (part of?) linux's byteswap.h functionality */ #include "endian.h" @@ -236,5 +238,6 @@ char *join_path(char *path, char *name); void fill_fullpaths(struct node *tree, char *prefix); - +FILE *fopenfile(char *fname); +FILE *dtc_open_file(char *fname); #endif /* _DTC_H */

1 0

[BUILDROM] Bump revisions
by Jordan Crouse 29 Jan '08

29 Jan '08

Hey all. Attached is the final step in the LinuxBIOS->coreboot renaming for buildrom. This revision bumps the coreboot revision on all platforms to handle the renaming, and also to take advantage of some bug fixes. All platforms supported by buildrom are now compiling, even on ubuntu. Jordan -- Jordan Crouse Systems Software Development Engineer Advanced Micro Devices, Inc. [BUILDROM]: Fixup all of the coreboot SVN revisions Bump all platforms to newer versions of the coreboot SVN to take into account the renaming and bug fixes. Signed-off-by: Jordan Crouse <jordan.crouse(a)amd.com> Index: buildrom-devel/config/platforms/alix1c.conf =================================================================== --- buildrom-devel.orig/config/platforms/alix1c.conf 2008-01-28 16:16:28.000000000 -0700 +++ buildrom-devel/config/platforms/alix1c.conf 2008-01-28 16:17:15.000000000 -0700 @@ -29,8 +29,8 @@ COREBOOT_BOARD=alix1c CBV2_CONFIG=Config.lb CBV2_TDIR=alix1c -CBV2_TAG=3047 -COREBOOT_ROM_NAME=linuxbios.rom +CBV2_TAG=3079 +COREBOOT_ROM_NAME=coreboot.rom # FILO configuration Index: buildrom-devel/config/platforms/db800.conf =================================================================== --- buildrom-devel.orig/config/platforms/db800.conf 2008-01-28 16:16:28.000000000 -0700 +++ buildrom-devel/config/platforms/db800.conf 2008-01-28 16:17:15.000000000 -0700 @@ -32,7 +32,7 @@ COREBOOT_BOARD=db800 CBV2_CONFIG=Config.lb CBV2_TDIR=db800 -CBV2_TAG=2810 +CBV2_TAG=3079 COREBOOT_ROM_NAME=db800.rom # FILO configuration Index: buildrom-devel/config/platforms/dbe61.conf =================================================================== --- buildrom-devel.orig/config/platforms/dbe61.conf 2008-01-28 16:16:28.000000000 -0700 +++ buildrom-devel/config/platforms/dbe61.conf 2008-01-28 16:17:15.000000000 -0700 @@ -31,7 +31,7 @@ COREBOOT_BOARD=dbe61 CBV2_CONFIG=Config.lb CBV2_TDIR=dbe61 -CBV2_TAG=2728 +CBV2_TAG=3079 COREBOOT_ROM_NAME=dbe61.rom # FILO configuration Index: buildrom-devel/config/platforms/ga-2761gxdk.conf =================================================================== --- buildrom-devel.orig/config/platforms/ga-2761gxdk.conf 2008-01-28 16:16:28.000000000 -0700 +++ buildrom-devel/config/platforms/ga-2761gxdk.conf 2008-01-28 16:17:15.000000000 -0700 @@ -36,8 +36,8 @@ COREBOOT_BOARD=ga_2761gxdk CBV2_CONFIG=Config.lb CBV2_TDIR=ga_2761gxdk -CBV2_TAG=2908 -COREBOOT_ROM_NAME=linuxbios.rom +CBV2_TAG=3079 +COREBOOT_ROM_NAME=coreboot.rom # FILO configuration Index: buildrom-devel/config/platforms/m57sli.conf =================================================================== --- buildrom-devel.orig/config/platforms/m57sli.conf 2008-01-28 16:16:28.000000000 -0700 +++ buildrom-devel/config/platforms/m57sli.conf 2008-01-28 16:17:15.000000000 -0700 @@ -40,8 +40,8 @@ COREBOOT_BOARD=m57sli CBV2_CONFIG=Config.lb CBV2_TDIR=m57sli -CBV2_TAG=2958 -COREBOOT_ROM_NAME=linuxbios.rom +CBV2_TAG=3079 +COREBOOT_ROM_NAME=coreboot.rom # FILO configuration Index: buildrom-devel/config/platforms/msm800sev.conf =================================================================== --- buildrom-devel.orig/config/platforms/msm800sev.conf 2008-01-28 16:16:28.000000000 -0700 +++ buildrom-devel/config/platforms/msm800sev.conf 2008-01-28 16:17:15.000000000 -0700 @@ -30,8 +30,8 @@ COREBOOT_BOARD=msm800sev CBV2_CONFIG=Config.lb CBV2_TDIR=msm800sev -CBV2_TAG=3047 -COREBOOT_ROM_NAME=linuxbios.rom +CBV2_TAG=3079 +COREBOOT_ROM_NAME=coreboot.rom # FILO configuration Index: buildrom-devel/config/platforms/norwich.conf =================================================================== --- buildrom-devel.orig/config/platforms/norwich.conf 2008-01-28 16:16:28.000000000 -0700 +++ buildrom-devel/config/platforms/norwich.conf 2008-01-28 16:17:15.000000000 -0700 @@ -30,7 +30,7 @@ COREBOOT_BOARD=norwich CBV2_CONFIG=Config.lb CBV2_TDIR=norwich -CBV2_TAG=2810 +CBV2_TAG=3079 COREBOOT_ROM_NAME=norwich.rom # FILO configuration Index: buildrom-devel/config/platforms/qemu.conf =================================================================== --- buildrom-devel.orig/config/platforms/qemu.conf 2008-01-28 16:16:28.000000000 -0700 +++ buildrom-devel/config/platforms/qemu.conf 2008-01-28 16:17:15.000000000 -0700 @@ -24,7 +24,7 @@ ETHERBOOT_ARCH=i386 # coreboot-v2 configuration -CBV2_TAG=2950 +CBV2_TAG=3079 CBV2_CONFIG=Config.lb CBV2_TDIR=qemu-i386 Index: buildrom-devel/config/platforms/serengeti_cheetah.conf =================================================================== --- buildrom-devel.orig/config/platforms/serengeti_cheetah.conf 2008-01-28 16:16:28.000000000 -0700 +++ buildrom-devel/config/platforms/serengeti_cheetah.conf 2008-01-28 16:17:15.000000000 -0700 @@ -48,13 +48,13 @@ ifeq ($(CONFIG_PLATFORM_CHEETAH_FAM10),y) COREBOOT_BOARD=serengeti_cheetah_fam10 CBV2_TDIR=serengeti_cheetah_fam10 -CBV2_TAG=3018 +CBV2_TAG=3085 COREBOOT_ROM_NAME=amd-cheetah-fam10.rom else COREBOOT_BOARD=serengeti_cheetah CBV2_CONFIG=Config.lb CBV2_TDIR=serengeti_cheetah -CBV2_TAG=2950 +CBV2_TAG=3086 COREBOOT_ROM_NAME=serengeti_cheetah.rom endif Index: buildrom-devel/config/platforms/supermicro-h8dmr.conf =================================================================== --- buildrom-devel.orig/config/platforms/supermicro-h8dmr.conf 2008-01-28 16:16:28.000000000 -0700 +++ buildrom-devel/config/platforms/supermicro-h8dmr.conf 2008-01-28 16:17:15.000000000 -0700 @@ -40,8 +40,8 @@ COREBOOT_BOARD=h8dmr CBV2_CONFIG=Config.lb CBV2_TDIR=h8dmr -CBV2_TAG=2996 -COREBOOT_ROM_NAME=linuxbios.rom +CBV2_TAG=3079 +COREBOOT_ROM_NAME=coreboot.rom # FILO configuration Index: buildrom-devel/config/platforms/tyan-s2882.conf =================================================================== --- buildrom-devel.orig/config/platforms/tyan-s2882.conf 2008-01-28 16:16:28.000000000 -0700 +++ buildrom-devel/config/platforms/tyan-s2882.conf 2008-01-28 16:17:15.000000000 -0700 @@ -40,8 +40,8 @@ COREBOOT_BOARD=s2882 CBV2_CONFIG=Config.lb CBV2_TDIR=s2882 -CBV2_TAG=2887 -COREBOOT_ROM_NAME=linuxbios.rom +CBV2_TAG=3079 +COREBOOT_ROM_NAME=coreboot.rom # FILO configuration Index: buildrom-devel/config/platforms/tyan-s2891.conf =================================================================== --- buildrom-devel.orig/config/platforms/tyan-s2891.conf 2008-01-28 16:16:28.000000000 -0700 +++ buildrom-devel/config/platforms/tyan-s2891.conf 2008-01-28 16:17:15.000000000 -0700 @@ -40,8 +40,8 @@ COREBOOT_BOARD=s2891 CBV2_CONFIG=Config.lb CBV2_TDIR=s2891 -CBV2_TAG=2792 -COREBOOT_ROM_NAME=linuxbios.rom +CBV2_TAG=3079 +COREBOOT_ROM_NAME=coreboot.rom # FILO configuration Index: buildrom-devel/Makefile =================================================================== --- buildrom-devel.orig/Makefile 2008-01-28 16:16:28.000000000 -0700 +++ buildrom-devel/Makefile 2008-01-28 16:17:15.000000000 -0700 @@ -43,7 +43,7 @@ # TARGET_ROM is what we are ultimately building - this should be # specified by the platform files -TARGET_ROM ?= linuxbios.rom +TARGET_ROM ?= coreboot.rom TARGET_ROM_FILE=$(OUTPUT_DIR)/$(TARGET_ROM) # Choose the version of coreboot to build - this might be better Index: buildrom-devel/packages/coreboot-v2/patches/m57sli-filo-and-etherboot-Config.lb.patch =================================================================== --- buildrom-devel.orig/packages/coreboot-v2/patches/m57sli-filo-and-etherboot-Config.lb.patch 2008-01-28 16:16:28.000000000 -0700 +++ buildrom-devel/packages/coreboot-v2/patches/m57sli-filo-and-etherboot-Config.lb.patch 2008-01-28 16:17:15.000000000 -0700 @@ -1,8 +1,8 @@ -Index: Config.lb +Index: svn/targets/gigabyte/m57sli/Config.lb =================================================================== ---- LinuxBIOSv2/targets/gigabyte/m57sli/Config.lb-orig 2007-08-14 14:49:13.000000000 -0400 -+++ LinuxBIOSv2/targets/gigabyte/m57sli/Config.lb 2007-08-21 17:56:34.000000000 -0400 -@@ -22,83 +22,30 @@ +--- svn.orig/targets/gigabyte/m57sli/Config.lb 2008-01-18 11:50:03.000000000 -0700 ++++ svn/targets/gigabyte/m57sli/Config.lb 2008-01-18 13:33:03.000000000 -0700 +@@ -22,82 +22,30 @@ target m57sli mainboard gigabyte/m57sli @@ -24,7 +24,7 @@ option ROM_IMAGE_SIZE=0x20000 -# option ROM_IMAGE_SIZE=0x15800 option XIP_ROM_SIZE=0x40000 - option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" -# payload ../../../payloads/tg3--ide_disk.zelf -# payload ../../../payloads/filo.elf -# payload ../../../payloads/filo_mem.elf @@ -54,7 +54,7 @@ option ROM_IMAGE_SIZE=0x20000 -# option ROM_IMAGE_SIZE=0x15800 option XIP_ROM_SIZE=0x40000 - option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" -# payload ../../../payloads/tg3--ide_disk.zelf -# payload ../../../payloads/filo.elf -# payload ../../../payloads/filo_mem.elf @@ -85,13 +85,12 @@ - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE -- option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" +- option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" + option USE_FAILOVER_IMAGE=1 + option USE_FALLBACK_IMAGE=0 + option ROM_IMAGE_SIZE=FAILOVER_SIZE + option XIP_ROM_SIZE=FAILOVER_SIZE -+ option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" ++ option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" end --#buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" - buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" "failover" + #buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" Index: buildrom-devel/packages/coreboot-v2/patches/m57sli-kernel-and-lab-Config.lb.patch =================================================================== --- buildrom-devel.orig/packages/coreboot-v2/patches/m57sli-kernel-and-lab-Config.lb.patch 2008-01-28 16:16:28.000000000 -0700 +++ buildrom-devel/packages/coreboot-v2/patches/m57sli-kernel-and-lab-Config.lb.patch 2008-01-28 16:17:15.000000000 -0700 @@ -95,7 +95,7 @@ option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" end --#buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" --buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" "failover" +-#buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +-buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" + -+buildrom ./linuxbios.rom ROM_SIZE "fallback" "failover" ++buildrom ./coreboot.rom ROM_SIZE "fallback" "failover" Index: buildrom-devel/packages/coreboot-v2/patches/qemu-payload.patch =================================================================== --- buildrom-devel.orig/packages/coreboot-v2/patches/qemu-payload.patch 2008-01-28 16:16:28.000000000 -0700 +++ buildrom-devel/packages/coreboot-v2/patches/qemu-payload.patch 2008-01-28 16:17:15.000000000 -0700 @@ -1,7 +1,7 @@ Index: svn/targets/emulation/qemu-i386/Config.lb =================================================================== ---- svn/targets/emulation/qemu-i386/Config.lb (revision 2950) -+++ svn/targets/emulation/qemu-i386/Config.lb (working copy) +--- svn.orig/targets/emulation/qemu-i386/Config.lb 2008-01-18 11:50:03.000000000 -0700 ++++ svn/targets/emulation/qemu-i386/Config.lb 2008-01-18 13:40:00.000000000 -0700 @@ -4,6 +4,8 @@ mainboard emulation/qemu-i386 @@ -14,7 +14,7 @@ @@ -13,8 +15,8 @@ romimage "image" option ROM_IMAGE_SIZE=0x10000 - option LINUXBIOS_EXTRA_VERSION="-GRUB2" + option COREBOOT_EXTRA_VERSION="-GRUB2" - payload /home/stepan/core.img + payload ../payload.elf end Index: buildrom-devel/packages/coreboot-v2/patches/serengeti_cheetah-lab.patch =================================================================== --- buildrom-devel.orig/packages/coreboot-v2/patches/serengeti_cheetah-lab.patch 2008-01-28 16:16:28.000000000 -0700 +++ buildrom-devel/packages/coreboot-v2/patches/serengeti_cheetah-lab.patch 2008-01-28 16:17:15.000000000 -0700 @@ -93,6 +93,6 @@ -end - - --buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" "failover" --#buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" +-buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" +-#buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./serengeti_cheetah.rom ROM_SIZE "fallback" Index: buildrom-devel/packages/coreboot-v2/patches/serengeti_cheetah-payload.patch =================================================================== --- buildrom-devel.orig/packages/coreboot-v2/patches/serengeti_cheetah-payload.patch 2008-01-28 16:16:28.000000000 -0700 +++ buildrom-devel/packages/coreboot-v2/patches/serengeti_cheetah-payload.patch 2008-01-28 16:17:15.000000000 -0700 @@ -1,27 +1,11 @@ Index: svn/targets/amd/serengeti_cheetah/Config.lb =================================================================== ---- svn/targets/amd/serengeti_cheetah/Config.lb (revision 2880) -+++ svn/targets/amd/serengeti_cheetah/Config.lb (working copy) -@@ -5,71 +5,22 @@ - target serengeti_cheetah - mainboard amd/serengeti_cheetah - --# serengeti_leopard - romimage "normal" --# 48K for SCSI FW --# option ROM_SIZE = 475136 --# 48K for SCSI FW and 48K for ATI ROM --# option ROM_SIZE = 425984 --# 64K for Etherboot --# option ROM_SIZE = 458752 - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=0 --# option ROM_IMAGE_SIZE=0x13800 --# option ROM_IMAGE_SIZE=0x18800 - option ROM_IMAGE_SIZE=0x20000 --# option ROM_IMAGE_SIZE=0x15800 +--- svn.orig/targets/amd/serengeti_cheetah/Config.lb 2008-01-18 11:50:04.000000000 -0700 ++++ svn/targets/amd/serengeti_cheetah/Config.lb 2008-01-28 13:48:15.000000000 -0700 +@@ -21,23 +21,7 @@ + # option ROM_IMAGE_SIZE=0x15800 option XIP_ROM_SIZE=0x40000 - option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" -# payload ../../../payloads/tg3--ide_disk.zelf -# payload ../../../payloads/filo.elf -# payload ../../../payloads/filo_mem.elf @@ -43,14 +27,10 @@ end romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 --# option ROM_IMAGE_SIZE=0x13800 --# option ROM_IMAGE_SIZE=0x19800 - option ROM_IMAGE_SIZE=0x20000 --# option ROM_IMAGE_SIZE=0x15800 +@@ -49,27 +33,7 @@ + # option ROM_IMAGE_SIZE=0x15800 option XIP_ROM_SIZE=0x40000 - option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" -# payload ../../../payloads/tg3--ide_disk.zelf -# payload ../../../payloads/filo.elf -# payload ../../../payloads/filo_mem.elf @@ -76,10 +56,10 @@ end romimage "failover" -@@ -81,5 +32,4 @@ +@@ -81,5 +45,4 @@ end --buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" "failover" --#buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" +-buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" +-#buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./serengeti_cheetah.rom ROM_SIZE "normal" "fallback" "failover" Index: buildrom-devel/packages/coreboot-v2/patches/supermicro-h8dmr-filo-and-etherboot-Config.lb.patch =================================================================== --- buildrom-devel.orig/packages/coreboot-v2/patches/supermicro-h8dmr-filo-and-etherboot-Config.lb.patch 2008-01-28 16:16:28.000000000 -0700 +++ buildrom-devel/packages/coreboot-v2/patches/supermicro-h8dmr-filo-and-etherboot-Config.lb.patch 2008-01-28 16:17:15.000000000 -0700 @@ -1,5 +1,7 @@ ---- LinuxBIOSv2/targets/supermicro/h8dmr/Config.lb 2007-11-30 10:42:05.000000000 -0500 -+++ LinuxBIOSv2/targets/supermicro/h8dmr/Config.lb 2007-11-30 11:21:15.000000000 -0500 +Index: svn/targets/supermicro/h8dmr/Config.lb +=================================================================== +--- svn.orig/targets/supermicro/h8dmr/Config.lb 2008-01-18 13:09:01.000000000 -0700 ++++ svn/targets/supermicro/h8dmr/Config.lb 2008-01-18 13:09:04.000000000 -0700 @@ -22,73 +22,25 @@ target h8dmr mainboard supermicro/h8dmr @@ -26,7 +28,7 @@ -# option ROM_IMAGE_SIZE=0x15800 - option XIP_ROM_SIZE=0x40000 + option XIP_ROM_SIZE=0x20000 - option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" -# payload ../../../payloads/tg3--ide_disk.zelf -# payload ../../../payloads/filo.elf -# payload ../../../payloads/filo_mem.elf @@ -56,7 +58,7 @@ -# option ROM_IMAGE_SIZE=0x15800 - option XIP_ROM_SIZE=0x40000 + option XIP_ROM_SIZE=0x20000 - option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" -# payload ../../../payloads/tg3--ide_disk.zelf -# payload ../../../payloads/filo.elf -# payload ../../../payloads/filo_mem.elf @@ -83,9 +85,3 @@ end romimage "failover" -@@ -99,5 +51,4 @@ - option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" - end - --#buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" - buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" "failover" Index: buildrom-devel/packages/coreboot-v2/patches/supermicro-h8dmr-kernel-and-lab-Config.lb.patch =================================================================== --- buildrom-devel.orig/packages/coreboot-v2/patches/supermicro-h8dmr-kernel-and-lab-Config.lb.patch 2008-01-28 16:16:28.000000000 -0700 +++ buildrom-devel/packages/coreboot-v2/patches/supermicro-h8dmr-kernel-and-lab-Config.lb.patch 2008-01-28 16:17:15.000000000 -0700 @@ -96,7 +96,7 @@ + option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" end --#buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" --buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" "failover" +-#buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +-buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" + -+buildrom ./linuxbios.rom ROM_SIZE "fallback" "failover" ++buildrom ./coreboot.rom ROM_SIZE "fallback" "failover" Index: buildrom-devel/packages/coreboot-v2/patches/tyan-s2882-filo-Config.lb.patch =================================================================== --- buildrom-devel.orig/packages/coreboot-v2/patches/tyan-s2882-filo-Config.lb.patch 2008-01-28 16:16:28.000000000 -0700 +++ buildrom-devel/packages/coreboot-v2/patches/tyan-s2882-filo-Config.lb.patch 2008-01-28 16:17:15.000000000 -0700 @@ -1,7 +1,7 @@ -Index: LinuxBIOSv2/targets/tyan/s2882/Config.lb +Index: svn/targets/tyan/s2882/Config.lb =================================================================== ---- LinuxBIOSv2/targets/tyan/s2882/Config.lb (revision 2867) -+++ LinuxBIOSv2/targets/tyan/s2882/Config.lb (working copy) +--- svn.orig/targets/tyan/s2882/Config.lb 2008-01-18 11:50:04.000000000 -0700 ++++ svn/targets/tyan/s2882/Config.lb 2008-01-18 13:45:33.000000000 -0700 @@ -7,45 +7,21 @@ # Tyan s2882 @@ -20,7 +20,7 @@ option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option XIP_ROM_SIZE=0x20000 - option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" -# payload ../../../payloads/tg3--ide_disk.zelf -# payload ../../../payloads/filo.elf -# payload ../../../payloads/filo_mem.elf @@ -40,7 +40,7 @@ option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option XIP_ROM_SIZE=0x20000 - option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" -# payload ../../../payloads/tg3--ide_disk.zelf -# payload ../../../payloads/filo.elf -# payload ../../../payloads/filo_mem.elf @@ -53,4 +53,4 @@ + payload ../payload.elf end - buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" + buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" Index: buildrom-devel/packages/coreboot-v2/patches/tyan-s2882-kernel-and-lab-Config.lb.patch =================================================================== --- buildrom-devel.orig/packages/coreboot-v2/patches/tyan-s2882-kernel-and-lab-Config.lb.patch 2008-01-28 16:16:28.000000000 -0700 +++ buildrom-devel/packages/coreboot-v2/patches/tyan-s2882-kernel-and-lab-Config.lb.patch 2008-01-28 16:17:15.000000000 -0700 @@ -58,5 +58,5 @@ + payload ../payload.elf end --buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" -+buildrom ./linuxbios.rom ROM_SIZE "fallback" +-buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" ++buildrom ./coreboot.rom ROM_SIZE "fallback" Index: buildrom-devel/packages/coreboot-v2/patches/tyan-s2891-filo-Config.lb.patch =================================================================== --- buildrom-devel.orig/packages/coreboot-v2/patches/tyan-s2891-filo-Config.lb.patch 2008-01-28 16:16:28.000000000 -0700 +++ buildrom-devel/packages/coreboot-v2/patches/tyan-s2891-filo-Config.lb.patch 2008-01-28 16:17:15.000000000 -0700 @@ -1,7 +1,7 @@ -Index: targets/tyan/s2891/Config.lb +Index: svn/targets/tyan/s2891/Config.lb =================================================================== ---- LinuxBIOSv2/targets/tyan/s2891/Config.lb (revision 2742) -+++ LinuxBIOSv2/targets/tyan/s2891/Config.lb (working copy) +--- svn.orig/targets/tyan/s2891/Config.lb 2008-01-18 11:50:04.000000000 -0700 ++++ svn/targets/tyan/s2891/Config.lb 2008-01-18 13:48:08.000000000 -0700 @@ -7,55 +7,21 @@ # Tyan s2891 @@ -23,7 +23,7 @@ option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option XIP_ROM_SIZE=0x20000 - option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" -# payload ../../../payloads/tg3--ide_disk.zelf -# payload ../../../payloads/filo.elf -# payload ../../../payloads/filo_mem.elf @@ -47,7 +47,7 @@ option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option XIP_ROM_SIZE=0x20000 - option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" -# payload ../../../payloads/tg3--ide_disk.zelf -# payload ../../../payloads/filo.elf -# payload ../../../payloads/filo_mem.elf @@ -63,4 +63,4 @@ + payload ../payload.elf end - buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" + buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" Index: buildrom-devel/packages/coreboot-v2/patches/tyan-s2891-kernel-and-lab-Config.lb.patch =================================================================== --- buildrom-devel.orig/packages/coreboot-v2/patches/tyan-s2891-kernel-and-lab-Config.lb.patch 2008-01-28 16:16:28.000000000 -0700 +++ buildrom-devel/packages/coreboot-v2/patches/tyan-s2891-kernel-and-lab-Config.lb.patch 2008-01-28 16:17:15.000000000 -0700 @@ -66,5 +66,5 @@ + payload ../payload.elf end --buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" -+buildrom ./linuxbios.rom ROM_SIZE "fallback" +-buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" ++buildrom ./coreboot.rom ROM_SIZE "fallback" Index: buildrom-devel/packages/coreboot-v2/patches/2761gxdk-fix-target.patch =================================================================== --- buildrom-devel.orig/packages/coreboot-v2/patches/2761gxdk-fix-target.patch 2008-01-28 16:17:23.000000000 -0700 +++ buildrom-devel/packages/coreboot-v2/patches/2761gxdk-fix-target.patch 2008-01-28 16:17:31.000000000 -0700 @@ -1,21 +1,21 @@ Index: svn/targets/gigabyte/ga_2761gxdk/Config.lb =================================================================== ---- svn.orig/targets/gigabyte/ga_2761gxdk/Config.lb -+++ svn/targets/gigabyte/ga_2761gxdk/Config.lb -@@ -42,7 +42,8 @@ romimage "normal" - # option ROM_IMAGE_SIZE=0x15800 - option XIP_ROM_SIZE=0x40000 - option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" +--- svn.orig/targets/gigabyte/ga_2761gxdk/Config.lb 2008-01-18 11:50:03.000000000 -0700 ++++ svn/targets/gigabyte/ga_2761gxdk/Config.lb 2008-01-28 11:28:24.000000000 -0700 +@@ -32,7 +32,8 @@ + option ROM_IMAGE_SIZE=0x20000 + option XIP_ROM_SIZE=0x40000 + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" - payload ../../../../payloads/filo_uda1.elf +# payload ../../../../payloads/filo_uda1.elf + payload ../payload.elf end - romimage "fallback" -@@ -55,7 +56,8 @@ romimage "fallback" - # option ROM_IMAGE_SIZE=0x15800 - option XIP_ROM_SIZE=0x40000 - option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" + romimage "fallback" +@@ -41,7 +42,8 @@ + option ROM_IMAGE_SIZE=0x20000 + option XIP_ROM_SIZE=0x40000 + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" - payload ../../../../payloads/filo_uda1.elf +# payload ../../../../payloads/filo_uda1.elf + payload ../payload.elf

2 2

r101 - in buildrom-devel: . config/platforms packages/coreboot-v2/patches
by svn＠coreboot.org 29 Jan '08

29 Jan '08

Author: jcrouse Date: 2008-01-29 16:53:02 +0100 (Tue, 29 Jan 2008) New Revision: 101 Modified: buildrom-devel/Makefile buildrom-devel/config/platforms/alix1c.conf buildrom-devel/config/platforms/db800.conf buildrom-devel/config/platforms/dbe61.conf buildrom-devel/config/platforms/ga-2761gxdk.conf buildrom-devel/config/platforms/m57sli.conf buildrom-devel/config/platforms/msm800sev.conf buildrom-devel/config/platforms/norwich.conf buildrom-devel/config/platforms/qemu.conf buildrom-devel/config/platforms/serengeti_cheetah.conf buildrom-devel/config/platforms/supermicro-h8dmr.conf buildrom-devel/config/platforms/tyan-s2882.conf buildrom-devel/config/platforms/tyan-s2891.conf buildrom-devel/packages/coreboot-v2/patches/2761gxdk-fix-target.patch buildrom-devel/packages/coreboot-v2/patches/m57sli-filo-and-etherboot-Config.lb.patch buildrom-devel/packages/coreboot-v2/patches/m57sli-kernel-and-lab-Config.lb.patch buildrom-devel/packages/coreboot-v2/patches/qemu-payload.patch buildrom-devel/packages/coreboot-v2/patches/serengeti_cheetah-lab.patch buildrom-devel/packages/coreboot-v2/patches/serengeti_cheetah-payload.patch buildrom-devel/packages/coreboot-v2/patches/supermicro-h8dmr-filo-and-etherboot-Config.lb.patch buildrom-devel/packages/coreboot-v2/patches/supermicro-h8dmr-kernel-and-lab-Config.lb.patch buildrom-devel/packages/coreboot-v2/patches/tyan-s2882-filo-Config.lb.patch buildrom-devel/packages/coreboot-v2/patches/tyan-s2882-kernel-and-lab-Config.lb.patch buildrom-devel/packages/coreboot-v2/patches/tyan-s2891-filo-Config.lb.patch buildrom-devel/packages/coreboot-v2/patches/tyan-s2891-kernel-and-lab-Config.lb.patch Log: [BUILDROM]: Fixup all of the coreboot SVN revisions Bump all platforms to newer versions of the coreboot SVN to take into account the renaming and bug fixes. Signed-off-by: Jordan Crouse <jordan.crouse(a)amd.com> Acked-by: Myles Watson <myles(a)pel.cs.byu.edu> Modified: buildrom-devel/Makefile =================================================================== --- buildrom-devel/Makefile 2008-01-18 18:39:21 UTC (rev 100) +++ buildrom-devel/Makefile 2008-01-29 15:53:02 UTC (rev 101) @@ -43,7 +43,7 @@ # TARGET_ROM is what we are ultimately building - this should be # specified by the platform files -TARGET_ROM ?= linuxbios.rom +TARGET_ROM ?= coreboot.rom TARGET_ROM_FILE=$(OUTPUT_DIR)/$(TARGET_ROM) # Choose the version of coreboot to build - this might be better Modified: buildrom-devel/config/platforms/alix1c.conf =================================================================== --- buildrom-devel/config/platforms/alix1c.conf 2008-01-18 18:39:21 UTC (rev 100) +++ buildrom-devel/config/platforms/alix1c.conf 2008-01-29 15:53:02 UTC (rev 101) @@ -29,8 +29,8 @@ COREBOOT_BOARD=alix1c CBV2_CONFIG=Config.lb CBV2_TDIR=alix1c -CBV2_TAG=3047 -COREBOOT_ROM_NAME=linuxbios.rom +CBV2_TAG=3079 +COREBOOT_ROM_NAME=coreboot.rom # FILO configuration Modified: buildrom-devel/config/platforms/db800.conf =================================================================== --- buildrom-devel/config/platforms/db800.conf 2008-01-18 18:39:21 UTC (rev 100) +++ buildrom-devel/config/platforms/db800.conf 2008-01-29 15:53:02 UTC (rev 101) @@ -32,7 +32,7 @@ COREBOOT_BOARD=db800 CBV2_CONFIG=Config.lb CBV2_TDIR=db800 -CBV2_TAG=2810 +CBV2_TAG=3079 COREBOOT_ROM_NAME=db800.rom # FILO configuration Modified: buildrom-devel/config/platforms/dbe61.conf =================================================================== --- buildrom-devel/config/platforms/dbe61.conf 2008-01-18 18:39:21 UTC (rev 100) +++ buildrom-devel/config/platforms/dbe61.conf 2008-01-29 15:53:02 UTC (rev 101) @@ -31,7 +31,7 @@ COREBOOT_BOARD=dbe61 CBV2_CONFIG=Config.lb CBV2_TDIR=dbe61 -CBV2_TAG=2728 +CBV2_TAG=3079 COREBOOT_ROM_NAME=dbe61.rom # FILO configuration Modified: buildrom-devel/config/platforms/ga-2761gxdk.conf =================================================================== --- buildrom-devel/config/platforms/ga-2761gxdk.conf 2008-01-18 18:39:21 UTC (rev 100) +++ buildrom-devel/config/platforms/ga-2761gxdk.conf 2008-01-29 15:53:02 UTC (rev 101) @@ -36,8 +36,8 @@ COREBOOT_BOARD=ga_2761gxdk CBV2_CONFIG=Config.lb CBV2_TDIR=ga_2761gxdk -CBV2_TAG=2908 -COREBOOT_ROM_NAME=linuxbios.rom +CBV2_TAG=3079 +COREBOOT_ROM_NAME=coreboot.rom # FILO configuration Modified: buildrom-devel/config/platforms/m57sli.conf =================================================================== --- buildrom-devel/config/platforms/m57sli.conf 2008-01-18 18:39:21 UTC (rev 100) +++ buildrom-devel/config/platforms/m57sli.conf 2008-01-29 15:53:02 UTC (rev 101) @@ -40,8 +40,8 @@ COREBOOT_BOARD=m57sli CBV2_CONFIG=Config.lb CBV2_TDIR=m57sli -CBV2_TAG=2958 -COREBOOT_ROM_NAME=linuxbios.rom +CBV2_TAG=3079 +COREBOOT_ROM_NAME=coreboot.rom # FILO configuration Modified: buildrom-devel/config/platforms/msm800sev.conf =================================================================== --- buildrom-devel/config/platforms/msm800sev.conf 2008-01-18 18:39:21 UTC (rev 100) +++ buildrom-devel/config/platforms/msm800sev.conf 2008-01-29 15:53:02 UTC (rev 101) @@ -30,8 +30,8 @@ COREBOOT_BOARD=msm800sev CBV2_CONFIG=Config.lb CBV2_TDIR=msm800sev -CBV2_TAG=3047 -COREBOOT_ROM_NAME=linuxbios.rom +CBV2_TAG=3079 +COREBOOT_ROM_NAME=coreboot.rom # FILO configuration Modified: buildrom-devel/config/platforms/norwich.conf =================================================================== --- buildrom-devel/config/platforms/norwich.conf 2008-01-18 18:39:21 UTC (rev 100) +++ buildrom-devel/config/platforms/norwich.conf 2008-01-29 15:53:02 UTC (rev 101) @@ -30,7 +30,7 @@ COREBOOT_BOARD=norwich CBV2_CONFIG=Config.lb CBV2_TDIR=norwich -CBV2_TAG=2810 +CBV2_TAG=3079 COREBOOT_ROM_NAME=norwich.rom # FILO configuration Modified: buildrom-devel/config/platforms/qemu.conf =================================================================== --- buildrom-devel/config/platforms/qemu.conf 2008-01-18 18:39:21 UTC (rev 100) +++ buildrom-devel/config/platforms/qemu.conf 2008-01-29 15:53:02 UTC (rev 101) @@ -24,7 +24,7 @@ ETHERBOOT_ARCH=i386 # coreboot-v2 configuration -CBV2_TAG=2950 +CBV2_TAG=3079 CBV2_CONFIG=Config.lb CBV2_TDIR=qemu-i386 Modified: buildrom-devel/config/platforms/serengeti_cheetah.conf =================================================================== --- buildrom-devel/config/platforms/serengeti_cheetah.conf 2008-01-18 18:39:21 UTC (rev 100) +++ buildrom-devel/config/platforms/serengeti_cheetah.conf 2008-01-29 15:53:02 UTC (rev 101) @@ -48,13 +48,13 @@ ifeq ($(CONFIG_PLATFORM_CHEETAH_FAM10),y) COREBOOT_BOARD=serengeti_cheetah_fam10 CBV2_TDIR=serengeti_cheetah_fam10 -CBV2_TAG=3018 +CBV2_TAG=3085 COREBOOT_ROM_NAME=amd-cheetah-fam10.rom else COREBOOT_BOARD=serengeti_cheetah CBV2_CONFIG=Config.lb CBV2_TDIR=serengeti_cheetah -CBV2_TAG=2950 +CBV2_TAG=3086 COREBOOT_ROM_NAME=serengeti_cheetah.rom endif Modified: buildrom-devel/config/platforms/supermicro-h8dmr.conf =================================================================== --- buildrom-devel/config/platforms/supermicro-h8dmr.conf 2008-01-18 18:39:21 UTC (rev 100) +++ buildrom-devel/config/platforms/supermicro-h8dmr.conf 2008-01-29 15:53:02 UTC (rev 101) @@ -40,8 +40,8 @@ COREBOOT_BOARD=h8dmr CBV2_CONFIG=Config.lb CBV2_TDIR=h8dmr -CBV2_TAG=2996 -COREBOOT_ROM_NAME=linuxbios.rom +CBV2_TAG=3079 +COREBOOT_ROM_NAME=coreboot.rom # FILO configuration Modified: buildrom-devel/config/platforms/tyan-s2882.conf =================================================================== --- buildrom-devel/config/platforms/tyan-s2882.conf 2008-01-18 18:39:21 UTC (rev 100) +++ buildrom-devel/config/platforms/tyan-s2882.conf 2008-01-29 15:53:02 UTC (rev 101) @@ -40,8 +40,8 @@ COREBOOT_BOARD=s2882 CBV2_CONFIG=Config.lb CBV2_TDIR=s2882 -CBV2_TAG=2887 -COREBOOT_ROM_NAME=linuxbios.rom +CBV2_TAG=3079 +COREBOOT_ROM_NAME=coreboot.rom # FILO configuration Modified: buildrom-devel/config/platforms/tyan-s2891.conf =================================================================== --- buildrom-devel/config/platforms/tyan-s2891.conf 2008-01-18 18:39:21 UTC (rev 100) +++ buildrom-devel/config/platforms/tyan-s2891.conf 2008-01-29 15:53:02 UTC (rev 101) @@ -40,8 +40,8 @@ COREBOOT_BOARD=s2891 CBV2_CONFIG=Config.lb CBV2_TDIR=s2891 -CBV2_TAG=2792 -COREBOOT_ROM_NAME=linuxbios.rom +CBV2_TAG=3079 +COREBOOT_ROM_NAME=coreboot.rom # FILO configuration Modified: buildrom-devel/packages/coreboot-v2/patches/2761gxdk-fix-target.patch =================================================================== --- buildrom-devel/packages/coreboot-v2/patches/2761gxdk-fix-target.patch 2008-01-18 18:39:21 UTC (rev 100) +++ buildrom-devel/packages/coreboot-v2/patches/2761gxdk-fix-target.patch 2008-01-29 15:53:02 UTC (rev 101) @@ -1,21 +1,21 @@ Index: svn/targets/gigabyte/ga_2761gxdk/Config.lb =================================================================== ---- svn.orig/targets/gigabyte/ga_2761gxdk/Config.lb -+++ svn/targets/gigabyte/ga_2761gxdk/Config.lb -@@ -42,7 +42,8 @@ romimage "normal" - # option ROM_IMAGE_SIZE=0x15800 - option XIP_ROM_SIZE=0x40000 - option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" +--- svn.orig/targets/gigabyte/ga_2761gxdk/Config.lb 2008-01-18 11:50:03.000000000 -0700 ++++ svn/targets/gigabyte/ga_2761gxdk/Config.lb 2008-01-28 11:28:24.000000000 -0700 +@@ -32,7 +32,8 @@ + option ROM_IMAGE_SIZE=0x20000 + option XIP_ROM_SIZE=0x40000 + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" - payload ../../../../payloads/filo_uda1.elf +# payload ../../../../payloads/filo_uda1.elf + payload ../payload.elf end - romimage "fallback" -@@ -55,7 +56,8 @@ romimage "fallback" - # option ROM_IMAGE_SIZE=0x15800 - option XIP_ROM_SIZE=0x40000 - option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" + romimage "fallback" +@@ -41,7 +42,8 @@ + option ROM_IMAGE_SIZE=0x20000 + option XIP_ROM_SIZE=0x40000 + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" - payload ../../../../payloads/filo_uda1.elf +# payload ../../../../payloads/filo_uda1.elf + payload ../payload.elf Modified: buildrom-devel/packages/coreboot-v2/patches/m57sli-filo-and-etherboot-Config.lb.patch =================================================================== --- buildrom-devel/packages/coreboot-v2/patches/m57sli-filo-and-etherboot-Config.lb.patch 2008-01-18 18:39:21 UTC (rev 100) +++ buildrom-devel/packages/coreboot-v2/patches/m57sli-filo-and-etherboot-Config.lb.patch 2008-01-29 15:53:02 UTC (rev 101) @@ -1,8 +1,8 @@ -Index: Config.lb +Index: svn/targets/gigabyte/m57sli/Config.lb =================================================================== ---- LinuxBIOSv2/targets/gigabyte/m57sli/Config.lb-orig 2007-08-14 14:49:13.000000000 -0400 -+++ LinuxBIOSv2/targets/gigabyte/m57sli/Config.lb 2007-08-21 17:56:34.000000000 -0400 -@@ -22,83 +22,30 @@ +--- svn.orig/targets/gigabyte/m57sli/Config.lb 2008-01-18 11:50:03.000000000 -0700 ++++ svn/targets/gigabyte/m57sli/Config.lb 2008-01-18 13:33:03.000000000 -0700 +@@ -22,82 +22,30 @@ target m57sli mainboard gigabyte/m57sli @@ -24,7 +24,7 @@ option ROM_IMAGE_SIZE=0x20000 -# option ROM_IMAGE_SIZE=0x15800 option XIP_ROM_SIZE=0x40000 - option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" -# payload ../../../payloads/tg3--ide_disk.zelf -# payload ../../../payloads/filo.elf -# payload ../../../payloads/filo_mem.elf @@ -54,7 +54,7 @@ option ROM_IMAGE_SIZE=0x20000 -# option ROM_IMAGE_SIZE=0x15800 option XIP_ROM_SIZE=0x40000 - option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" -# payload ../../../payloads/tg3--ide_disk.zelf -# payload ../../../payloads/filo.elf -# payload ../../../payloads/filo_mem.elf @@ -85,13 +85,12 @@ - option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=FAILOVER_SIZE - option XIP_ROM_SIZE=FAILOVER_SIZE -- option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" +- option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" + option USE_FAILOVER_IMAGE=1 + option USE_FALLBACK_IMAGE=0 + option ROM_IMAGE_SIZE=FAILOVER_SIZE + option XIP_ROM_SIZE=FAILOVER_SIZE -+ option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" ++ option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" end --#buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" - buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" "failover" + #buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" Modified: buildrom-devel/packages/coreboot-v2/patches/m57sli-kernel-and-lab-Config.lb.patch =================================================================== --- buildrom-devel/packages/coreboot-v2/patches/m57sli-kernel-and-lab-Config.lb.patch 2008-01-18 18:39:21 UTC (rev 100) +++ buildrom-devel/packages/coreboot-v2/patches/m57sli-kernel-and-lab-Config.lb.patch 2008-01-29 15:53:02 UTC (rev 101) @@ -95,7 +95,7 @@ option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" end --#buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" --buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" "failover" +-#buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +-buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" + -+buildrom ./linuxbios.rom ROM_SIZE "fallback" "failover" ++buildrom ./coreboot.rom ROM_SIZE "fallback" "failover" Modified: buildrom-devel/packages/coreboot-v2/patches/qemu-payload.patch =================================================================== --- buildrom-devel/packages/coreboot-v2/patches/qemu-payload.patch 2008-01-18 18:39:21 UTC (rev 100) +++ buildrom-devel/packages/coreboot-v2/patches/qemu-payload.patch 2008-01-29 15:53:02 UTC (rev 101) @@ -1,7 +1,7 @@ Index: svn/targets/emulation/qemu-i386/Config.lb =================================================================== ---- svn/targets/emulation/qemu-i386/Config.lb (revision 2950) -+++ svn/targets/emulation/qemu-i386/Config.lb (working copy) +--- svn.orig/targets/emulation/qemu-i386/Config.lb 2008-01-18 11:50:03.000000000 -0700 ++++ svn/targets/emulation/qemu-i386/Config.lb 2008-01-18 13:40:00.000000000 -0700 @@ -4,6 +4,8 @@ mainboard emulation/qemu-i386 @@ -14,7 +14,7 @@ @@ -13,8 +15,8 @@ romimage "image" option ROM_IMAGE_SIZE=0x10000 - option LINUXBIOS_EXTRA_VERSION="-GRUB2" + option COREBOOT_EXTRA_VERSION="-GRUB2" - payload /home/stepan/core.img + payload ../payload.elf end Modified: buildrom-devel/packages/coreboot-v2/patches/serengeti_cheetah-lab.patch =================================================================== --- buildrom-devel/packages/coreboot-v2/patches/serengeti_cheetah-lab.patch 2008-01-18 18:39:21 UTC (rev 100) +++ buildrom-devel/packages/coreboot-v2/patches/serengeti_cheetah-lab.patch 2008-01-29 15:53:02 UTC (rev 101) @@ -93,6 +93,6 @@ -end - - --buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" "failover" --#buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" +-buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" +-#buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./serengeti_cheetah.rom ROM_SIZE "fallback" Modified: buildrom-devel/packages/coreboot-v2/patches/serengeti_cheetah-payload.patch =================================================================== --- buildrom-devel/packages/coreboot-v2/patches/serengeti_cheetah-payload.patch 2008-01-18 18:39:21 UTC (rev 100) +++ buildrom-devel/packages/coreboot-v2/patches/serengeti_cheetah-payload.patch 2008-01-29 15:53:02 UTC (rev 101) @@ -1,27 +1,11 @@ Index: svn/targets/amd/serengeti_cheetah/Config.lb =================================================================== ---- svn/targets/amd/serengeti_cheetah/Config.lb (revision 2880) -+++ svn/targets/amd/serengeti_cheetah/Config.lb (working copy) -@@ -5,71 +5,22 @@ - target serengeti_cheetah - mainboard amd/serengeti_cheetah - --# serengeti_leopard - romimage "normal" --# 48K for SCSI FW --# option ROM_SIZE = 475136 --# 48K for SCSI FW and 48K for ATI ROM --# option ROM_SIZE = 425984 --# 64K for Etherboot --# option ROM_SIZE = 458752 - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=0 --# option ROM_IMAGE_SIZE=0x13800 --# option ROM_IMAGE_SIZE=0x18800 - option ROM_IMAGE_SIZE=0x20000 --# option ROM_IMAGE_SIZE=0x15800 +--- svn.orig/targets/amd/serengeti_cheetah/Config.lb 2008-01-18 11:50:04.000000000 -0700 ++++ svn/targets/amd/serengeti_cheetah/Config.lb 2008-01-28 13:48:15.000000000 -0700 +@@ -21,23 +21,7 @@ + # option ROM_IMAGE_SIZE=0x15800 option XIP_ROM_SIZE=0x40000 - option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" -# payload ../../../payloads/tg3--ide_disk.zelf -# payload ../../../payloads/filo.elf -# payload ../../../payloads/filo_mem.elf @@ -43,14 +27,10 @@ end romimage "fallback" - option USE_FAILOVER_IMAGE=0 - option USE_FALLBACK_IMAGE=1 --# option ROM_IMAGE_SIZE=0x13800 --# option ROM_IMAGE_SIZE=0x19800 - option ROM_IMAGE_SIZE=0x20000 --# option ROM_IMAGE_SIZE=0x15800 +@@ -49,27 +33,7 @@ + # option ROM_IMAGE_SIZE=0x15800 option XIP_ROM_SIZE=0x40000 - option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" -# payload ../../../payloads/tg3--ide_disk.zelf -# payload ../../../payloads/filo.elf -# payload ../../../payloads/filo_mem.elf @@ -76,10 +56,10 @@ end romimage "failover" -@@ -81,5 +32,4 @@ +@@ -81,5 +45,4 @@ end --buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" "failover" --#buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" +-buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" +-#buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +buildrom ./serengeti_cheetah.rom ROM_SIZE "normal" "fallback" "failover" Modified: buildrom-devel/packages/coreboot-v2/patches/supermicro-h8dmr-filo-and-etherboot-Config.lb.patch =================================================================== --- buildrom-devel/packages/coreboot-v2/patches/supermicro-h8dmr-filo-and-etherboot-Config.lb.patch 2008-01-18 18:39:21 UTC (rev 100) +++ buildrom-devel/packages/coreboot-v2/patches/supermicro-h8dmr-filo-and-etherboot-Config.lb.patch 2008-01-29 15:53:02 UTC (rev 101) @@ -1,5 +1,7 @@ ---- LinuxBIOSv2/targets/supermicro/h8dmr/Config.lb 2007-11-30 10:42:05.000000000 -0500 -+++ LinuxBIOSv2/targets/supermicro/h8dmr/Config.lb 2007-11-30 11:21:15.000000000 -0500 +Index: svn/targets/supermicro/h8dmr/Config.lb +=================================================================== +--- svn.orig/targets/supermicro/h8dmr/Config.lb 2008-01-18 13:09:01.000000000 -0700 ++++ svn/targets/supermicro/h8dmr/Config.lb 2008-01-18 13:09:04.000000000 -0700 @@ -22,73 +22,25 @@ target h8dmr mainboard supermicro/h8dmr @@ -26,7 +28,7 @@ -# option ROM_IMAGE_SIZE=0x15800 - option XIP_ROM_SIZE=0x40000 + option XIP_ROM_SIZE=0x20000 - option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" -# payload ../../../payloads/tg3--ide_disk.zelf -# payload ../../../payloads/filo.elf -# payload ../../../payloads/filo_mem.elf @@ -56,7 +58,7 @@ -# option ROM_IMAGE_SIZE=0x15800 - option XIP_ROM_SIZE=0x40000 + option XIP_ROM_SIZE=0x20000 - option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" -# payload ../../../payloads/tg3--ide_disk.zelf -# payload ../../../payloads/filo.elf -# payload ../../../payloads/filo_mem.elf @@ -83,9 +85,3 @@ end romimage "failover" -@@ -99,5 +51,4 @@ - option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" - end - --#buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" - buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" "failover" Modified: buildrom-devel/packages/coreboot-v2/patches/supermicro-h8dmr-kernel-and-lab-Config.lb.patch =================================================================== --- buildrom-devel/packages/coreboot-v2/patches/supermicro-h8dmr-kernel-and-lab-Config.lb.patch 2008-01-18 18:39:21 UTC (rev 100) +++ buildrom-devel/packages/coreboot-v2/patches/supermicro-h8dmr-kernel-and-lab-Config.lb.patch 2008-01-29 15:53:02 UTC (rev 101) @@ -96,7 +96,7 @@ + option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover" end --#buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" --buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" "failover" +-#buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" +-buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover" + -+buildrom ./linuxbios.rom ROM_SIZE "fallback" "failover" ++buildrom ./coreboot.rom ROM_SIZE "fallback" "failover" Modified: buildrom-devel/packages/coreboot-v2/patches/tyan-s2882-filo-Config.lb.patch =================================================================== --- buildrom-devel/packages/coreboot-v2/patches/tyan-s2882-filo-Config.lb.patch 2008-01-18 18:39:21 UTC (rev 100) +++ buildrom-devel/packages/coreboot-v2/patches/tyan-s2882-filo-Config.lb.patch 2008-01-29 15:53:02 UTC (rev 101) @@ -1,7 +1,7 @@ -Index: LinuxBIOSv2/targets/tyan/s2882/Config.lb +Index: svn/targets/tyan/s2882/Config.lb =================================================================== ---- LinuxBIOSv2/targets/tyan/s2882/Config.lb (revision 2867) -+++ LinuxBIOSv2/targets/tyan/s2882/Config.lb (working copy) +--- svn.orig/targets/tyan/s2882/Config.lb 2008-01-18 11:50:04.000000000 -0700 ++++ svn/targets/tyan/s2882/Config.lb 2008-01-18 13:45:33.000000000 -0700 @@ -7,45 +7,21 @@ # Tyan s2882 @@ -20,7 +20,7 @@ option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option XIP_ROM_SIZE=0x20000 - option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" -# payload ../../../payloads/tg3--ide_disk.zelf -# payload ../../../payloads/filo.elf -# payload ../../../payloads/filo_mem.elf @@ -40,7 +40,7 @@ option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option XIP_ROM_SIZE=0x20000 - option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" -# payload ../../../payloads/tg3--ide_disk.zelf -# payload ../../../payloads/filo.elf -# payload ../../../payloads/filo_mem.elf @@ -53,4 +53,4 @@ + payload ../payload.elf end - buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" + buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" Modified: buildrom-devel/packages/coreboot-v2/patches/tyan-s2882-kernel-and-lab-Config.lb.patch =================================================================== --- buildrom-devel/packages/coreboot-v2/patches/tyan-s2882-kernel-and-lab-Config.lb.patch 2008-01-18 18:39:21 UTC (rev 100) +++ buildrom-devel/packages/coreboot-v2/patches/tyan-s2882-kernel-and-lab-Config.lb.patch 2008-01-29 15:53:02 UTC (rev 101) @@ -58,5 +58,5 @@ + payload ../payload.elf end --buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" -+buildrom ./linuxbios.rom ROM_SIZE "fallback" +-buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" ++buildrom ./coreboot.rom ROM_SIZE "fallback" Modified: buildrom-devel/packages/coreboot-v2/patches/tyan-s2891-filo-Config.lb.patch =================================================================== --- buildrom-devel/packages/coreboot-v2/patches/tyan-s2891-filo-Config.lb.patch 2008-01-18 18:39:21 UTC (rev 100) +++ buildrom-devel/packages/coreboot-v2/patches/tyan-s2891-filo-Config.lb.patch 2008-01-29 15:53:02 UTC (rev 101) @@ -1,7 +1,7 @@ -Index: targets/tyan/s2891/Config.lb +Index: svn/targets/tyan/s2891/Config.lb =================================================================== ---- LinuxBIOSv2/targets/tyan/s2891/Config.lb (revision 2742) -+++ LinuxBIOSv2/targets/tyan/s2891/Config.lb (working copy) +--- svn.orig/targets/tyan/s2891/Config.lb 2008-01-18 11:50:04.000000000 -0700 ++++ svn/targets/tyan/s2891/Config.lb 2008-01-18 13:48:08.000000000 -0700 @@ -7,55 +7,21 @@ # Tyan s2891 @@ -23,7 +23,7 @@ option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option XIP_ROM_SIZE=0x20000 - option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal" -# payload ../../../payloads/tg3--ide_disk.zelf -# payload ../../../payloads/filo.elf -# payload ../../../payloads/filo_mem.elf @@ -47,7 +47,7 @@ option ROM_IMAGE_SIZE=0x20000 - option XIP_ROM_SIZE=0x20000 + option XIP_ROM_SIZE=0x20000 - option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" + option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback" -# payload ../../../payloads/tg3--ide_disk.zelf -# payload ../../../payloads/filo.elf -# payload ../../../payloads/filo_mem.elf @@ -63,4 +63,4 @@ + payload ../payload.elf end - buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" + buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" Modified: buildrom-devel/packages/coreboot-v2/patches/tyan-s2891-kernel-and-lab-Config.lb.patch =================================================================== --- buildrom-devel/packages/coreboot-v2/patches/tyan-s2891-kernel-and-lab-Config.lb.patch 2008-01-18 18:39:21 UTC (rev 100) +++ buildrom-devel/packages/coreboot-v2/patches/tyan-s2891-kernel-and-lab-Config.lb.patch 2008-01-29 15:53:02 UTC (rev 101) @@ -66,5 +66,5 @@ + payload ../payload.elf end --buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" -+buildrom ./linuxbios.rom ROM_SIZE "fallback" +-buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" ++buildrom ./coreboot.rom ROM_SIZE "fallback"

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coreboot January 2008