I have a question. Is there any place I can look that will explain the relationship between the options for ROM_SIZE, etc.. in the Config.lb file? -- /********************* Marc Karasek MTS Sun Microsystems mailto:marc.karasek@sun.com ph:770.360.6415 *********************/
Marc Karasek wrote:
I have a question. Is there any place I can look that will explain the relationship between the options for ROM_SIZE, etc.. in the Config.lb file?
I tried to show that stuff in this picture. http://www.coreboot.org/Anatomy_of_a_Failover_coreboot_v2_Image Marc -- Marc Jones Senior Firmware Engineer (970) 226-9684 Office mailto:Marc.Jones@amd.com http://www.amd.com/embeddedprocessors
So where does XIP_ROM_SIZE fit into this picture? /********************* Marc Karasek MTS Sun Microsystems mailto:marc.karasek@sun.com ph:770.360.6415 *********************/ Marc Jones wrote:
Marc Karasek wrote:
I have a question. Is there any place I can look that will explain the relationship between the options for ROM_SIZE, etc.. in the Config.lb file?
I tried to show that stuff in this picture. http://www.coreboot.org/Anatomy_of_a_Failover_coreboot_v2_Image
Marc
It is a K8 only value used to set the cache for CAR/XIP. It doesn't change the ROM image. Marc Marc Karasek wrote:
So where does XIP_ROM_SIZE fit into this picture?
/********************* Marc Karasek MTS Sun Microsystems mailto:marc.karasek@sun.com ph:770.360.6415 *********************/
Marc Jones wrote:
Marc Karasek wrote:
I have a question. Is there any place I can look that will explain the relationship between the options for ROM_SIZE, etc.. in the Config.lb file?
I tried to show that stuff in this picture. http://www.coreboot.org/Anatomy_of_a_Failover_coreboot_v2_Image
Marc
-- Marc Jones Senior Firmware Engineer (970) 226-9684 Office mailto:Marc.Jones@amd.com http://www.amd.com/embeddedprocessors
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