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May 9, 2007
Author: uwe
Date: 2007-05-09 17:11:03 +0200 (Wed, 09 May 2007)
New Revision: 2644
Modified:
trunk/LinuxBIOSv2/src/mainboard/asi/mb_5blmp/Options.lb
Log:
Uncomment compression config variables. This should fix the abuild
problems with the asi/mb_5bmlp (trivial).
Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de>
Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de>
Modified: trunk/LinuxBIOSv2/src/mainboard/asi/mb_5blmp/Options.lb
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/asi/mb_5blmp/Options.lb 2007-05-09 10:17:44 UTC (rev 2643)
+++ trunk/LinuxBIOSv2/src/mainboard/asi/mb_5blmp/Options.lb 2007-05-09 15:11:03 UTC (rev 2644)
@@ -18,9 +18,9 @@
uses ROM_SECTION_SIZE
uses ROM_SECTION_OFFSET
uses CONFIG_ROM_PAYLOAD_START
-# uses CONFIG_COMPRESS
-# uses CONFIG_COMPRESSED_PAYLOAD_NRV2B
-# uses CONFIG_COMPRESSED_PAYLOAD_LZMA
+uses CONFIG_COMPRESS
+uses CONFIG_COMPRESSED_PAYLOAD_NRV2B
+uses CONFIG_COMPRESSED_PAYLOAD_LZMA
uses PAYLOAD_SIZE
uses _ROMBASE
uses _RAMBASE
1
0

May 9, 2007
Is that mainboard supported? - DTK PRM-0080I E1
Northbridge: 440BX
Southbridge: Intel FW82371EB
CPU: Celeron 500 (Using a slot/370 adapter)
lspci:
00:00.0 Host bridge: Intel Corporation 440BX/ZX/DX - 82443BX/ZX/DX Host
bridge (rev 03)
00:01.0 PCI bridge: Intel Corporation 440BX/ZX/DX - 82443BX/ZX/DX AGP
bridge (rev 03)
00:07.0 ISA bridge: Intel Corporation 82371AB/EB/MB PIIX4 ISA (rev 02)
00:07.1 IDE interface: Intel Corporation 82371AB/EB/MB PIIX4 IDE (rev 01)
00:07.2 USB Controller: Intel Corporation 82371AB/EB/MB PIIX4 USB (rev 01)
00:07.3 Bridge: Intel Corporation 82371AB/EB/MB PIIX4 ACPI (rev 02)
01:00.0 VGA compatible controller: nVidia Corporation NV18 [GeForce4 MX
440 AGP 8x] (rev a2)
Super I/O chip: Winbond W83977EF-AW
Type of BIOS device: Winbond W29C020C-90B
Thanks
--
Simon Comeau Martel
simon(a)comeau.info
4
5
Dear LinuxBIOS readers!
This is the automated build check service of LinuxBIOS.
The developer "uwe" checked in revision 2643 to
the LinuxBIOS source repository and caused the following
changes:
Change Log:
Fix coding style of flashrom by running indent on all files:
indent -npro -kr -i8 -ts8 -sob -l80 -ss -ncs *.[ch]
Some minor fixups were required, and maybe a few more cosmetic
changeѕ are needed.
Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de>
Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de>
Build Log:
Compilation of arima:hdama is still broken
Compilation of artecgroup:dbe61 is still broken
Configuration of asi:mb_5blmp is still broken
Compilation of ibm:e325 is still broken
Compilation of ibm:e326 is still broken
Compilation of iwill:dk8s2 is still broken
Compilation of iwill:dk8x is still broken
If something broke during this checkin please be a pain
in uwe's neck until the issue is fixed.
If this issue is not fixed within 24h the revision will
be backed out.
Yours truely,
LinuxBIOS automatic build system
1
0
Author: uwe
Date: 2007-05-09 12:26:19 +0200 (Wed, 09 May 2007)
New Revision: 317
Modified:
LinuxBIOSv3/README
Log:
Short installation instructions for LinuxBIOSv3 (trivial).
Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de>
Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de>
Modified: LinuxBIOSv3/README
===================================================================
--- LinuxBIOSv3/README 2007-05-06 18:52:16 UTC (rev 316)
+++ LinuxBIOSv3/README 2007-05-09 10:26:19 UTC (rev 317)
@@ -39,6 +39,38 @@
* http://www.linuxbios.org/Supported_Chipsets_and_Devices
+Building and Installing
+-----------------------
+
+Note: Currently only the x86 QEMU target is supported in LinuxBIOSv3.
+
+1) Build a payload:
+
+ For example: FILO.
+
+2) Configure LinuxBIOS:
+
+ $ make menuconfig
+
+ Select at least the desired mainboard vendor, the mainboard device,
+ the size of your ROM chip, and a payload.
+
+3) Build the LinuxBIOS ROM image:
+
+ $ make
+
+ The generated ROM image is build/linuxbios.rom.
+
+4) You can now test the LinuxBIOS image using:
+
+ $ qemu -L build -hda /dev/zero -serial stdio
+
+ If you have a full QEMU image with a Linux distribution installed,
+ you can boot that Linux kernel by using a proper FILO payload and typing:
+
+ $ qemu -L build -hda /tmp/qemu.img -serial stdio
+
+
Website and Mailing List
------------------------
1
0
Author: uwe
Date: 2007-05-09 12:17:44 +0200 (Wed, 09 May 2007)
New Revision: 2643
Modified:
trunk/LinuxBIOSv2/util/flashrom/82802ab.c
trunk/LinuxBIOSv2/util/flashrom/board_enable.c
trunk/LinuxBIOSv2/util/flashrom/chipset_enable.c
trunk/LinuxBIOSv2/util/flashrom/flash.h
trunk/LinuxBIOSv2/util/flashrom/flashrom.c
trunk/LinuxBIOSv2/util/flashrom/jedec.c
trunk/LinuxBIOSv2/util/flashrom/layout.c
trunk/LinuxBIOSv2/util/flashrom/lbtable.c
trunk/LinuxBIOSv2/util/flashrom/linuxbios_tables.h
trunk/LinuxBIOSv2/util/flashrom/m29f400bt.c
trunk/LinuxBIOSv2/util/flashrom/m29f400bt.h
trunk/LinuxBIOSv2/util/flashrom/msys_doc.c
trunk/LinuxBIOSv2/util/flashrom/sharplhf00l04.c
trunk/LinuxBIOSv2/util/flashrom/sst28sf040.c
trunk/LinuxBIOSv2/util/flashrom/sst49lfxxxc.c
Log:
Fix coding style of flashrom by running indent on all files:
indent -npro -kr -i8 -ts8 -sob -l80 -ss -ncs *.[ch]
Some minor fixups were required, and maybe a few more cosmetic
change?\209?\149 are needed.
Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de>
Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de>
Modified: trunk/LinuxBIOSv2/util/flashrom/82802ab.c
===================================================================
--- trunk/LinuxBIOSv2/util/flashrom/82802ab.c 2007-05-09 08:11:52 UTC (rev 2642)
+++ trunk/LinuxBIOSv2/util/flashrom/82802ab.c 2007-05-09 10:17:44 UTC (rev 2643)
@@ -52,9 +52,9 @@
uint8_t id1, id2;
#if 0
- *(volatile uint8_t *) (bios + 0x5555) = 0xAA;
- *(volatile uint8_t *) (bios + 0x2AAA) = 0x55;
- *(volatile uint8_t *) (bios + 0x5555) = 0x90;
+ *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
+ *(volatile uint8_t *)(bios + 0x5555) = 0x90;
#endif
*bios = 0xff;
@@ -62,13 +62,13 @@
*bios = 0x90;
myusec_delay(10);
- id1 = *(volatile uint8_t *) bios;
- id2 = *(volatile uint8_t *) (bios + 0x01);
+ id1 = *(volatile uint8_t *)bios;
+ id2 = *(volatile uint8_t *)(bios + 0x01);
#if 1
- *(volatile uint8_t *) (bios + 0x5555) = 0xAA;
- *(volatile uint8_t *) (bios + 0x2AAA) = 0x55;
- *(volatile uint8_t *) (bios + 0x5555) = 0xF0;
+ *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
+ *(volatile uint8_t *)(bios + 0x5555) = 0xF0;
#endif
myusec_delay(10);
@@ -82,7 +82,7 @@
fd_mem, (off_t) (0 - 0x400000 - size));
if (bios == MAP_FAILED) {
// it's this part but we can't map it ...
- perror("Error MMAP memory using " MEM_DEV );
+ perror("Error MMAP memory using " MEM_DEV);
exit(1);
}
@@ -101,7 +101,7 @@
*bios = 0x70;
if ((*bios & 0x80) == 0) { // it's busy
- while ((*bios & 0x80) == 0);
+ while ((*bios & 0x80) == 0) ;
}
status = *bios;
@@ -111,21 +111,20 @@
*bios = 0x90;
myusec_delay(10);
- id1 = *(volatile uint8_t *) bios;
- id2 = *(volatile uint8_t *) (bios + 0x01);
+ id1 = *(volatile uint8_t *)bios;
+ id2 = *(volatile uint8_t *)(bios + 0x01);
// this is needed to jam it out of "read id" mode
- *(volatile uint8_t *) (bios + 0x5555) = 0xAA;
- *(volatile uint8_t *) (bios + 0x2AAA) = 0x55;
- *(volatile uint8_t *) (bios + 0x5555) = 0xF0;
+ *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
+ *(volatile uint8_t *)(bios + 0x5555) = 0xF0;
return status;
}
int erase_82802ab_block(struct flashchip *flash, int offset)
{
volatile uint8_t *bios = flash->virt_addr + offset;
- volatile uint8_t *wrprotect =
- flash->virt_addr_2 + offset + 2;
+ volatile uint8_t *wrprotect = flash->virt_addr_2 + offset + 2;
uint8_t status;
// clear status register
@@ -138,8 +137,8 @@
//printf("write protect is 0x%x\n", *(wrprotect));
// now start it
- *(volatile uint8_t *) (bios) = 0x20;
- *(volatile uint8_t *) (bios) = 0xd0;
+ *(volatile uint8_t *)(bios) = 0x20;
+ *(volatile uint8_t *)(bios) = 0xd0;
myusec_delay(10);
// now let's see what the register is
status = wait_82802ab(flash->virt_addr);
@@ -160,8 +159,8 @@
return (0);
}
-void write_page_82802ab(volatile uint8_t *bios, uint8_t *src, volatile uint8_t *dst,
- int page_size)
+void write_page_82802ab(volatile uint8_t *bios, uint8_t *src,
+ volatile uint8_t *dst, int page_size)
{
int i;
@@ -177,8 +176,8 @@
int write_82802ab(struct flashchip *flash, uint8_t *buf)
{
int i;
- int total_size = flash->total_size * 1024, page_size =
- flash->page_size;
+ int total_size = flash->total_size * 1024;
+ int page_size = flash->page_size;
volatile uint8_t *bios = flash->virt_addr;
erase_82802ab(flash);
@@ -191,8 +190,7 @@
printf("%04d at address: 0x%08x", i, i * page_size);
write_page_82802ab(bios, buf + i * page_size,
bios + i * page_size, page_size);
- printf
- ("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
+ printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
}
printf("\n");
protect_82802ab(bios);
Modified: trunk/LinuxBIOSv2/util/flashrom/board_enable.c
===================================================================
--- trunk/LinuxBIOSv2/util/flashrom/board_enable.c 2007-05-09 08:11:52 UTC (rev 2642)
+++ trunk/LinuxBIOSv2/util/flashrom/board_enable.c 2007-05-09 10:17:44 UTC (rev 2643)
@@ -30,38 +30,33 @@
#define W836_DATA 0x2F
/* Enter extended functions */
-static void
-w836xx_ext_enter(void)
+static void w836xx_ext_enter(void)
{
outb(0x87, W836_INDEX);
outb(0x87, W836_INDEX);
}
/* Leave extended functions */
-static void
-w836xx_ext_leave(void)
+static void w836xx_ext_leave(void)
{
outb(0xAA, W836_INDEX);
}
/* General functions for read/writing WB SuperIOs */
-static unsigned char
-wbsio_read(unsigned char index)
+static unsigned char wbsio_read(unsigned char index)
{
outb(index, W836_INDEX);
return inb(W836_DATA);
}
-static void
-wbsio_write(unsigned char index, unsigned char data)
+static void wbsio_write(unsigned char index, unsigned char data)
{
outb(index, W836_INDEX);
outb(data, W836_DATA);
}
static void
-wbsio_mask(unsigned char index, unsigned char data,
- unsigned char mask)
+wbsio_mask(unsigned char index, unsigned char data, unsigned char mask)
{
unsigned char tmp;
@@ -83,7 +78,7 @@
w836xx_ext_enter();
/* Is this the w83627hf? */
- if (wbsio_read(0x20) != 0x52) { /* SIO device ID register */
+ if (wbsio_read(0x20) != 0x52) { /* SIO device ID register */
fprintf(stderr, "\nERROR: %s: W83627HF: Wrong ID: 0x%02X.\n",
name, wbsio_read(0x20));
w836xx_ext_leave();
@@ -93,15 +88,15 @@
/* PIN89S: WDTO/GP24 multiplex -> GPIO24 */
wbsio_mask(0x2B, 0x10, 0x10);
- wbsio_write(0x07, 0x08); /* Select logical device 8: GPIO port 2 */
+ wbsio_write(0x07, 0x08); /* Select logical device 8: GPIO port 2 */
- wbsio_mask(0x30, 0x01, 0x01); /* Activate logical device. */
+ wbsio_mask(0x30, 0x01, 0x01); /* Activate logical device. */
- wbsio_mask(0xF0, 0x00, 0x10); /* GPIO24 -> output */
+ wbsio_mask(0xF0, 0x00, 0x10); /* GPIO24 -> output */
- wbsio_mask(0xF2, 0x00, 0x10); /* Clear GPIO24 inversion */
+ wbsio_mask(0xF2, 0x00, 0x10); /* Clear GPIO24 inversion */
- wbsio_mask(0xF1, 0x10, 0x10); /* Raise GPIO24 */
+ wbsio_mask(0xF1, 0x10, 0x10); /* Raise GPIO24 */
w836xx_ext_leave();
@@ -116,30 +111,30 @@
static int board_via_epia_m(const char *name)
{
- struct pci_dev *dev;
- unsigned int base;
- uint8_t val;
+ struct pci_dev *dev;
+ unsigned int base;
+ uint8_t val;
- dev = pci_dev_find(0x1106, 0x3177); /* VT8235 ISA bridge */
- if (!dev) {
- fprintf(stderr, "\nERROR: VT8235 ISA Bridge not found.\n");
- return -1;
- }
+ dev = pci_dev_find(0x1106, 0x3177); /* VT8235 ISA bridge */
+ if (!dev) {
+ fprintf(stderr, "\nERROR: VT8235 ISA Bridge not found.\n");
+ return -1;
+ }
- /* GPIO12-15 -> output */
- val = pci_read_byte(dev, 0xE4);
- val |= 0x10;
- pci_write_byte(dev, 0xE4, val);
+ /* GPIO12-15 -> output */
+ val = pci_read_byte(dev, 0xE4);
+ val |= 0x10;
+ pci_write_byte(dev, 0xE4, val);
- /* Get Power Management IO address. */
- base = pci_read_word(dev, 0x88) & 0xFF80;
+ /* Get Power Management IO address. */
+ base = pci_read_word(dev, 0x88) & 0xFF80;
- /* enable GPIO15 which is connected to write protect. */
- val = inb(base + 0x4D);
- val |= 0x80;
- outb(val, base + 0x4D);
+ /* enable GPIO15 which is connected to write protect. */
+ val = inb(base + 0x4D);
+ val |= 0x80;
+ outb(val, base + 0x4D);
- return 0;
+ return 0;
}
/*
@@ -149,29 +144,29 @@
static int board_asus_a7v8x_mx(const char *name)
{
- struct pci_dev *dev;
- uint8_t val;
+ struct pci_dev *dev;
+ uint8_t val;
- dev = pci_dev_find(0x1106, 0x3177); /* VT8235 ISA bridge */
- if (!dev) {
- fprintf(stderr, "\nERROR: VT8235 ISA Bridge not found.\n");
- return -1;
- }
+ dev = pci_dev_find(0x1106, 0x3177); /* VT8235 ISA bridge */
+ if (!dev) {
+ fprintf(stderr, "\nERROR: VT8235 ISA Bridge not found.\n");
+ return -1;
+ }
- /* This bit is marked reserved actually */
- val = pci_read_byte(dev, 0x59);
- val &= 0x7F;
- pci_write_byte(dev, 0x59, val);
+ /* This bit is marked reserved actually */
+ val = pci_read_byte(dev, 0x59);
+ val &= 0x7F;
+ pci_write_byte(dev, 0x59, val);
/* Raise ROM MEMW# line on Winbond w83697 SuperIO */
- w836xx_ext_enter();
+ w836xx_ext_enter();
- if (!(wbsio_read(0x24) & 0x02)) /* flash rom enabled? */
- wbsio_mask(0x24, 0x08, 0x08); /* enable MEMW# */
+ if (!(wbsio_read(0x24) & 0x02)) /* flash rom enabled? */
+ wbsio_mask(0x24, 0x08, 0x08); /* enable MEMW# */
w836xx_ext_leave();
- return 0;
+ return 0;
}
/*
@@ -185,39 +180,39 @@
*/
struct board_pciid_enable {
- /* Any device, but make it sensible, like the isa bridge. */
- uint16_t first_vendor;
- uint16_t first_device;
- uint16_t first_card_vendor;
- uint16_t first_card_device;
+ /* Any device, but make it sensible, like the isa bridge. */
+ uint16_t first_vendor;
+ uint16_t first_device;
+ uint16_t first_card_vendor;
+ uint16_t first_card_device;
- /* Any device, but make it sensible, like
+ /* Any device, but make it sensible, like
* the host bridge. May be NULL
*/
- uint16_t second_vendor;
- uint16_t second_device;
- uint16_t second_card_vendor;
- uint16_t second_card_device;
+ uint16_t second_vendor;
+ uint16_t second_device;
+ uint16_t second_card_vendor;
+ uint16_t second_card_device;
- /* From linuxbios table */
- char *lb_vendor;
- char *lb_part;
+ /* From linuxbios table */
+ char *lb_vendor;
+ char *lb_part;
- char *name;
- int (*enable)(const char *name);
+ char *name;
+ int (*enable) (const char *name);
};
struct board_pciid_enable board_pciid_enables[] = {
- { 0x1022, 0x7468, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- "iwill", "dk8_htx", "IWILL DK8-HTX", w83627hf_gpio24_raise },
- { 0x1022, 0x746B, 0x1022, 0x36C0, 0x0000, 0x0000, 0x0000, 0x0000,
- "AGAMI", "ARUMA", "agami Aruma", w83627hf_gpio24_raise },
- { 0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01,
- NULL, NULL, "VIA EPIA M/MII/...", board_via_epia_m },
- { 0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118,
- NULL, NULL, "ASUS A7V8-MX SE", board_asus_a7v8x_mx },
+ {0x1022, 0x7468, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+ "iwill", "dk8_htx", "IWILL DK8-HTX", w83627hf_gpio24_raise},
+ {0x1022, 0x746B, 0x1022, 0x36C0, 0x0000, 0x0000, 0x0000, 0x0000,
+ "AGAMI", "ARUMA", "agami Aruma", w83627hf_gpio24_raise},
+ {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01,
+ NULL, NULL, "VIA EPIA M/MII/...", board_via_epia_m},
+ {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118,
+ NULL, NULL, "ASUS A7V8-MX SE", board_asus_a7v8x_mx},
- { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL } /* Keep this */
+ {0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL} /* Keep this */
};
/*
@@ -225,27 +220,27 @@
* Require main pci-ids to match too as extra safety.
*
*/
-static struct board_pciid_enable *
-board_match_linuxbios_name(char *vendor, char *part)
+static struct board_pciid_enable *board_match_linuxbios_name(char *vendor,
+ char *part)
{
- struct board_pciid_enable *board = board_pciid_enables;
+ struct board_pciid_enable *board = board_pciid_enables;
- for (; board->name; board++) {
- if (!board->lb_vendor || strcmp(board->lb_vendor, vendor))
- continue;
+ for (; board->name; board++) {
+ if (!board->lb_vendor || strcmp(board->lb_vendor, vendor))
+ continue;
- if (!board->lb_part || strcmp(board->lb_part, part))
- continue;
+ if (!board->lb_part || strcmp(board->lb_part, part))
+ continue;
- if (!pci_dev_find(board->first_vendor, board->first_device))
- continue;
+ if (!pci_dev_find(board->first_vendor, board->first_device))
+ continue;
- if (board->second_vendor &&
- !pci_dev_find(board->second_vendor, board->second_device))
- continue;
- return board;
- }
- return NULL;
+ if (board->second_vendor &&
+ !pci_dev_find(board->second_vendor, board->second_device))
+ continue;
+ return board;
+ }
+ return NULL;
}
/*
@@ -254,35 +249,35 @@
*/
static struct board_pciid_enable *board_match_pci_card_ids(void)
{
- struct board_pciid_enable *board = board_pciid_enables;
+ struct board_pciid_enable *board = board_pciid_enables;
- for (; board->name; board++) {
- if (!board->first_card_vendor || !board->first_card_device)
- continue;
+ for (; board->name; board++) {
+ if (!board->first_card_vendor || !board->first_card_device)
+ continue;
- if (!pci_card_find(board->first_vendor, board->first_device,
- board->first_card_vendor,
- board->first_card_device))
- continue;
+ if (!pci_card_find(board->first_vendor, board->first_device,
+ board->first_card_vendor,
+ board->first_card_device))
+ continue;
- if (board->second_vendor) {
- if (board->second_card_vendor) {
- if (!pci_card_find(board->second_vendor,
- board->second_device,
- board->second_card_vendor,
- board->second_card_device))
- continue;
- } else {
- if (!pci_dev_find(board->second_vendor,
- board->second_device))
- continue;
- }
- }
+ if (board->second_vendor) {
+ if (board->second_card_vendor) {
+ if (!pci_card_find(board->second_vendor,
+ board->second_device,
+ board->second_card_vendor,
+ board->second_card_device))
+ continue;
+ } else {
+ if (!pci_dev_find(board->second_vendor,
+ board->second_device))
+ continue;
+ }
+ }
- return board;
- }
+ return board;
+ }
- return NULL;
+ return NULL;
}
/*
@@ -290,25 +285,25 @@
*/
int board_flash_enable(char *vendor, char *part)
{
- struct board_pciid_enable *board = NULL;
- int ret = 0;
+ struct board_pciid_enable *board = NULL;
+ int ret = 0;
- if (vendor && part)
- board = board_match_linuxbios_name(vendor, part);
+ if (vendor && part)
+ board = board_match_linuxbios_name(vendor, part);
- if (!board)
- board = board_match_pci_card_ids();
+ if (!board)
+ board = board_match_pci_card_ids();
- if (board) {
- printf("Found board \"%s\": Enabling flash write... ",
- board->name);
+ if (board) {
+ printf("Found board \"%s\": Enabling flash write... ",
+ board->name);
- ret = board->enable(board->name);
- if (ret)
- printf("Failed!\n");
- else
- printf("OK.\n");
- }
+ ret = board->enable(board->name);
+ if (ret)
+ printf("Failed!\n");
+ else
+ printf("OK.\n");
+ }
- return ret;
+ return ret;
}
Modified: trunk/LinuxBIOSv2/util/flashrom/chipset_enable.c
===================================================================
--- trunk/LinuxBIOSv2/util/flashrom/chipset_enable.c 2007-05-09 08:11:52 UTC (rev 2642)
+++ trunk/LinuxBIOSv2/util/flashrom/chipset_enable.c 2007-05-09 10:17:44 UTC (rev 2643)
@@ -75,20 +75,21 @@
static int enable_flash_piix4(struct pci_dev *dev, char *name)
{
uint16_t old, new;
- uint16_t xbcs = 0x4e; /* X-Bus Chip Select register. */
+ uint16_t xbcs = 0x4e; /* X-Bus Chip Select register. */
old = pci_read_word(dev, xbcs);
/* Set bit 9: 1-Meg Extended BIOS Enable (PCI master accesses to
- FFF00000-FFF7FFFF are forwarded to ISA).
- Set bit 7: Extended BIOS Enable (PCI master accesses to
- FFF80000-FFFDFFFF are forwarded to ISA).
- Set bit 6: Lower BIOS Enable (PCI master, or ISA master accesses to
- the lower 64-Kbyte BIOS block (E0000-EFFFF) at the top
- of 1 Mbyte, or the aliases at the top of 4 Gbyte
- (FFFE0000-FFFEFFFF) result in the generation of BIOSCS#.
- Note: Accesses to FFFF0000-FFFFFFFF are always forwarded to ISA.
- Set bit 2: BIOSCS# Write Enable (1=enable, 0=disable). */
+ * FFF00000-FFF7FFFF are forwarded to ISA).
+ * Set bit 7: Extended BIOS Enable (PCI master accesses to
+ * FFF80000-FFFDFFFF are forwarded to ISA).
+ * Set bit 6: Lower BIOS Enable (PCI master, or ISA master accesses to
+ * the lower 64-Kbyte BIOS block (E0000-EFFFF) at the top
+ * of 1 Mbyte, or the aliases at the top of 4 Gbyte
+ * (FFFE0000-FFFEFFFF) result in the generation of BIOSCS#.
+ * Note: Accesses to FFFF0000-FFFFFFFF are always forwarded to ISA.
+ * Set bit 2: BIOSCS# Write Enable (1=enable, 0=disable).
+ */
new = old | 0x2c4;
if (new == old)
@@ -113,7 +114,7 @@
*/
/* Note: the ICH0-ICH5 BIOS_CNTL register is actually 16 bit wide, but
- * just treating it as 8 bit wide seems to work fine in practice.
+ * just treating it as 8 bit wide seems to work fine in practice.
*/
/* see ie. page 375 of "Intel ICH7 External Design Specification"
@@ -130,8 +131,7 @@
pci_write_byte(dev, bios_cntl, new);
if (pci_read_byte(dev, bios_cntl) != new) {
- printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n",
- bios_cntl, new, name);
+ printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", bios_cntl, new, name);
return -1;
}
return 0;
@@ -150,23 +150,22 @@
/*
*
*/
-static int
-enable_flash_vt823x(struct pci_dev *dev, char *name)
+static int enable_flash_vt823x(struct pci_dev *dev, char *name)
{
uint8_t val;
- /* ROM Write enable */
+ /* ROM Write enable */
val = pci_read_byte(dev, 0x40);
val |= 0x10;
pci_write_byte(dev, 0x40, val);
if (pci_read_byte(dev, 0x40) != val) {
printf("\nWARNING: Failed to enable ROM Write on \"%s\"\n",
- name);
+ name);
return -1;
}
- return 0;
+ return 0;
}
static int enable_flash_cs5530(struct pci_dev *dev, char *name)
@@ -178,8 +177,7 @@
new = pci_read_byte(dev, 0x52);
if (new != 0xee) {
- printf("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n",
- 0x52, new, name);
+ printf("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x52, new, name);
return -1;
}
@@ -189,7 +187,6 @@
return 0;
}
-
static int enable_flash_sc1100(struct pci_dev *dev, char *name)
{
uint8_t new;
@@ -199,8 +196,7 @@
new = pci_read_byte(dev, 0x52);
if (new != 0xee) {
- printf("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n",
- 0x52, new, name);
+ printf("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x52, new, name);
return -1;
}
return 0;
@@ -221,8 +217,7 @@
newer = pci_read_byte(dev, 0x45);
if (newer != new) {
- printf("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n",
- 0x45, new, name);
+ printf("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x45, new, name);
printf("Stuck at 0x%x\n", newer);
return -1;
}
@@ -233,6 +228,7 @@
{
/* register 4e.b gets or'ed with one */
uint8_t old, new;
+
/* if it fails, it fails. There are so many variations of broken mobos
* that it is hard to argue that we should quit at this point.
*/
@@ -243,8 +239,7 @@
if (new != old) {
pci_write_byte(dev, 0x43, new);
if (pci_read_byte(dev, 0x43) != new) {
- printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n",
- 0x43, new, name);
+ printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x43, new, name);
}
}
@@ -255,8 +250,7 @@
pci_write_byte(dev, 0x40, new);
if (pci_read_byte(dev, 0x40) != new) {
- printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n",
- 0x40, new, name);
+ printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x40, new, name);
return -1;
}
return 0;
@@ -264,47 +258,46 @@
static int enable_flash_ck804(struct pci_dev *dev, char *name)
{
- /* register 4e.b gets or'ed with one */
- uint8_t old, new;
- /* if it fails, it fails. There are so many variations of broken mobos
- * that it is hard to argue that we should quit at this point.
- */
+ /* register 4e.b gets or'ed with one */
+ uint8_t old, new;
- /* dump_pci_device(dev); */
+ /* if it fails, it fails. There are so many variations of broken mobos
+ * that it is hard to argue that we should quit at this point.
+ */
- old = pci_read_byte(dev, 0x88);
- new = old | 0xc0;
- if (new != old) {
- pci_write_byte(dev, 0x88, new);
- if (pci_read_byte(dev, 0x88) != new) {
- printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n",
- 0x88, new, name);
- }
- }
+ /* dump_pci_device(dev); */
- old = pci_read_byte(dev, 0x6d);
- new = old | 0x01;
- if (new == old)
- return 0;
- pci_write_byte(dev, 0x6d, new);
+ old = pci_read_byte(dev, 0x88);
+ new = old | 0xc0;
+ if (new != old) {
+ pci_write_byte(dev, 0x88, new);
+ if (pci_read_byte(dev, 0x88) != new) {
+ printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x88, new, name);
+ }
+ }
- if (pci_read_byte(dev, 0x6d) != new) {
- printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n",
- 0x6d, new, name);
- return -1;
- }
- return 0;
+ old = pci_read_byte(dev, 0x6d);
+ new = old | 0x01;
+ if (new == old)
+ return 0;
+ pci_write_byte(dev, 0x6d, new);
+
+ if (pci_read_byte(dev, 0x6d) != new) {
+ printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x6d, new, name);
+ return -1;
+ }
+ return 0;
}
static int enable_flash_sb400(struct pci_dev *dev, char *name)
{
- uint8_t tmp;
+ uint8_t tmp;
struct pci_filter f;
struct pci_dev *smbusdev;
/* then look for the smbus device */
- pci_filter_init((struct pci_access *) 0, &f);
+ pci_filter_init((struct pci_access *)0, &f);
f.vendor = 0x1002;
f.device = 0x4372;
@@ -314,26 +307,26 @@
}
}
- if(!smbusdev) {
+ if (!smbusdev) {
fprintf(stderr, "ERROR: SMBus device not found. aborting\n");
exit(1);
}
/* enable some smbus stuff */
- tmp=pci_read_byte(smbusdev, 0x79);
- tmp|=0x01;
+ tmp = pci_read_byte(smbusdev, 0x79);
+ tmp |= 0x01;
pci_write_byte(smbusdev, 0x79, tmp);
/* change southbridge */
- tmp=pci_read_byte(dev, 0x48);
- tmp|=0x21;
+ tmp = pci_read_byte(dev, 0x48);
+ tmp |= 0x21;
pci_write_byte(dev, 0x48, tmp);
/* now become a bit silly. */
- tmp=inb(0xc6f);
- outb(tmp,0xeb);
+ tmp = inb(0xc6f);
outb(tmp, 0xeb);
- tmp|=0x40;
+ outb(tmp, 0xeb);
+ tmp |= 0x40;
outb(tmp, 0xc6f);
outb(tmp, 0xeb);
outb(tmp, 0xeb);
@@ -343,38 +336,39 @@
static int enable_flash_mcp55(struct pci_dev *dev, char *name)
{
- /* register 4e.b gets or'ed with one */
- unsigned char old, new, byte;
- unsigned short word;
+ /* register 4e.b gets or'ed with one */
+ unsigned char old, new, byte;
+ unsigned short word;
- /* if it fails, it fails. There are so many variations of broken mobos
- * that it is hard to argue that we should quit at this point.
- */
+ /* if it fails, it fails. There are so many variations of broken mobos
+ * that it is hard to argue that we should quit at this point.
+ */
- /* dump_pci_device(dev); */
+ /* dump_pci_device(dev); */
- /* Set the 4MB enable bit bit */
- byte = pci_read_byte(dev, 0x88);
- byte |= 0xff; /* 256K */
- pci_write_byte(dev, 0x88, byte);
- byte = pci_read_byte(dev, 0x8c);
- byte |= 0xff; /* 1M */
- pci_write_byte(dev, 0x8c, byte);
- word = pci_read_word(dev, 0x90);
- word |= 0x7fff; /* 15M */
- pci_write_word(dev, 0x90, word);
+ /* Set the 4MB enable bit bit */
+ byte = pci_read_byte(dev, 0x88);
+ byte |= 0xff; /* 256K */
+ pci_write_byte(dev, 0x88, byte);
+ byte = pci_read_byte(dev, 0x8c);
+ byte |= 0xff; /* 1M */
+ pci_write_byte(dev, 0x8c, byte);
+ word = pci_read_word(dev, 0x90);
+ word |= 0x7fff; /* 15M */
+ pci_write_word(dev, 0x90, word);
- old = pci_read_byte(dev, 0x6d);
- new = old | 0x01;
- if (new == old)
- return 0;
- pci_write_byte(dev, 0x6d, new);
+ old = pci_read_byte(dev, 0x6d);
+ new = old | 0x01;
+ if (new == old)
+ return 0;
+ pci_write_byte(dev, 0x6d, new);
- if (pci_read_byte(dev, 0x6d) != new) {
- printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n",
- 0x6d, new, name);
- return -1;
- }
+ if (pci_read_byte(dev, 0x6d) != new) {
+ printf
+ ("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n",
+ 0x6d, new, name);
+ return -1;
+ }
return 0;
@@ -410,61 +404,60 @@
{0x1106, 0x8231, "VT8231", enable_flash_vt823x},
{0x1106, 0x3177, "VT8235", enable_flash_vt823x},
{0x1106, 0x3227, "VT8237", enable_flash_vt823x},
- {0x1106, 0x8324, "CX700" , enable_flash_vt823x},
+ {0x1106, 0x8324, "CX700", enable_flash_vt823x},
{0x1106, 0x0686, "VT82C686", enable_flash_amd8111},
{0x1078, 0x0100, "CS5530", enable_flash_cs5530},
{0x100b, 0x0510, "SC1100", enable_flash_sc1100},
{0x1039, 0x0008, "SIS5595", enable_flash_sis5595},
{0x1022, 0x7468, "AMD8111", enable_flash_amd8111},
/* this fallthrough looks broken. */
- {0x10de, 0x0050, "NVIDIA CK804", enable_flash_ck804}, /* LPC */
- {0x10de, 0x0051, "NVIDIA CK804", enable_flash_ck804}, /* Pro */
- {0x10de, 0x00d3, "NVIDIA CK804", enable_flash_ck804}, /* Slave, should not be here, to fix known bug for A01. */
+ {0x10de, 0x0050, "NVIDIA CK804", enable_flash_ck804}, /* LPC */
+ {0x10de, 0x0051, "NVIDIA CK804", enable_flash_ck804}, /* Pro */
+ {0x10de, 0x00d3, "NVIDIA CK804", enable_flash_ck804}, /* Slave, should not be here, to fix known bug for A01. */
- {0x10de, 0x0260, "NVidia MCP51", enable_flash_ck804},
- {0x10de, 0x0261, "NVidia MCP51", enable_flash_ck804},
- {0x10de, 0x0262, "NVidia MCP51", enable_flash_ck804},
- {0x10de, 0x0263, "NVidia MCP51", enable_flash_ck804},
+ {0x10de, 0x0260, "NVidia MCP51", enable_flash_ck804},
+ {0x10de, 0x0261, "NVidia MCP51", enable_flash_ck804},
+ {0x10de, 0x0262, "NVidia MCP51", enable_flash_ck804},
+ {0x10de, 0x0263, "NVidia MCP51", enable_flash_ck804},
- {0x10de, 0x0360, "NVIDIA MCP55", enable_flash_mcp55}, /* Gigabyte m57sli-s4 */
- {0x10de, 0x0361, "NVIDIA MCP55", enable_flash_mcp55}, /* LPC */
- {0x10de, 0x0362, "NVIDIA MCP55", enable_flash_mcp55}, /* LPC */
- {0x10de, 0x0363, "NVIDIA MCP55", enable_flash_mcp55}, /* LPC */
- {0x10de, 0x0364, "NVIDIA MCP55", enable_flash_mcp55}, /* LPC */
- {0x10de, 0x0365, "NVIDIA MCP55", enable_flash_mcp55}, /* LPC */
- {0x10de, 0x0366, "NVIDIA MCP55", enable_flash_mcp55}, /* LPC */
- {0x10de, 0x0367, "NVIDIA MCP55", enable_flash_mcp55}, /* Pro */
+ {0x10de, 0x0360, "NVIDIA MCP55", enable_flash_mcp55}, /* Gigabyte m57sli-s4 */
+ {0x10de, 0x0361, "NVIDIA MCP55", enable_flash_mcp55}, /* LPC */
+ {0x10de, 0x0362, "NVIDIA MCP55", enable_flash_mcp55}, /* LPC */
+ {0x10de, 0x0363, "NVIDIA MCP55", enable_flash_mcp55}, /* LPC */
+ {0x10de, 0x0364, "NVIDIA MCP55", enable_flash_mcp55}, /* LPC */
+ {0x10de, 0x0365, "NVIDIA MCP55", enable_flash_mcp55}, /* LPC */
+ {0x10de, 0x0366, "NVIDIA MCP55", enable_flash_mcp55}, /* LPC */
+ {0x10de, 0x0367, "NVIDIA MCP55", enable_flash_mcp55}, /* Pro */
- {0x1002, 0x4377, "ATI SB400", enable_flash_sb400}, /* ATI Technologies Inc IXP SB400 PCI-ISA Bridge (rev 80) */
+ {0x1002, 0x4377, "ATI SB400", enable_flash_sb400}, /* ATI Technologies Inc IXP SB400 PCI-ISA Bridge (rev 80) */
};
/*
*
*/
-int
-chipset_flash_enable(void)
+int chipset_flash_enable(void)
{
- struct pci_dev *dev = 0;
- int ret = -2; /* nothing! */
- int i;
+ struct pci_dev *dev = 0;
+ int ret = -2; /* nothing! */
+ int i;
/* now let's try to find the chipset we have ... */
for (i = 0; i < sizeof(enables) / sizeof(enables[0]); i++) {
- dev = pci_dev_find(enables[i].vendor, enables[i].device);
- if (dev)
- break;
- }
+ dev = pci_dev_find(enables[i].vendor, enables[i].device);
+ if (dev)
+ break;
+ }
- if (dev) {
- printf("Found chipset \"%s\": Enabling flash write... ",
- enables[i].name);
+ if (dev) {
+ printf("Found chipset \"%s\": Enabling flash write... ",
+ enables[i].name);
- ret = enables[i].doit(dev, enables[i].name);
- if (ret)
- printf("Failed!\n");
- else
- printf("OK.\n");
+ ret = enables[i].doit(dev, enables[i].name);
+ if (ret)
+ printf("Failed!\n");
+ else
+ printf("OK.\n");
}
- return ret;
+ return ret;
}
Modified: trunk/LinuxBIOSv2/util/flashrom/flash.h
===================================================================
--- trunk/LinuxBIOSv2/util/flashrom/flash.h 2007-05-09 08:11:52 UTC (rev 2642)
+++ trunk/LinuxBIOSv2/util/flashrom/flash.h 2007-05-09 10:17:44 UTC (rev 2643)
@@ -132,13 +132,13 @@
void myusec_calibrate_delay();
/* pci handling for board/chipset_enable */
-struct pci_access *pacc; /* For board and chipset_enable */
+struct pci_access *pacc; /* For board and chipset_enable */
struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
-struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
- uint16_t card_vendor, uint16_t card_device);
+struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
+ uint16_t card_vendor, uint16_t card_device);
-int board_flash_enable(char *vendor, char *part); /* board_enable.c */
-int chipset_flash_enable(void); /* chipset_enable.c */
+int board_flash_enable(char *vendor, char *part); /* board_enable.c */
+int chipset_flash_enable(void); /* chipset_enable.c */
/* physical memory mapping device */
Modified: trunk/LinuxBIOSv2/util/flashrom/flashrom.c
===================================================================
--- trunk/LinuxBIOSv2/util/flashrom/flashrom.c 2007-05-09 08:11:52 UTC (rev 2642)
+++ trunk/LinuxBIOSv2/util/flashrom/flashrom.c 2007-05-09 10:17:44 UTC (rev 2643)
@@ -51,54 +51,52 @@
#include "debug.h"
char *chip_to_probe = NULL;
-struct pci_access *pacc; /* For board and chipset_enable */
+struct pci_access *pacc; /* For board and chipset_enable */
int exclude_start_page, exclude_end_page;
-int force=0, verbose=0;
+int force = 0, verbose = 0;
int fd_mem;
/*
*
*/
-struct pci_dev *
-pci_dev_find(uint16_t vendor, uint16_t device)
+struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device)
{
- struct pci_dev *temp;
- struct pci_filter filter;
+ struct pci_dev *temp;
+ struct pci_filter filter;
- pci_filter_init(NULL, &filter);
- filter.vendor = vendor;
- filter.device = device;
+ pci_filter_init(NULL, &filter);
+ filter.vendor = vendor;
+ filter.device = device;
- for (temp = pacc->devices; temp; temp = temp->next)
- if (pci_filter_match(&filter, temp))
- return temp;
+ for (temp = pacc->devices; temp; temp = temp->next)
+ if (pci_filter_match(&filter, temp))
+ return temp;
- return NULL;
+ return NULL;
}
/*
*
*/
-struct pci_dev *
-pci_card_find(uint16_t vendor, uint16_t device,
- uint16_t card_vendor, uint16_t card_device)
+struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
+ uint16_t card_vendor, uint16_t card_device)
{
- struct pci_dev *temp;
- struct pci_filter filter;
+ struct pci_dev *temp;
+ struct pci_filter filter;
- pci_filter_init(NULL, &filter);
- filter.vendor = vendor;
- filter.device = device;
+ pci_filter_init(NULL, &filter);
+ filter.vendor = vendor;
+ filter.device = device;
- for (temp = pacc->devices; temp; temp = temp->next)
- if (pci_filter_match(&filter, temp)) {
- if ((card_vendor == pci_read_word(temp, 0x2C)) &&
- (card_device == pci_read_word(temp, 0x2E)))
- return temp;
- }
+ for (temp = pacc->devices; temp; temp = temp->next)
+ if (pci_filter_match(&filter, temp)) {
+ if ((card_vendor == pci_read_word(temp, 0x2C)) &&
+ (card_device == pci_read_word(temp, 0x2E)))
+ return temp;
+ }
- return NULL;
+ return NULL;
}
struct flashchip *probe_flash(struct flashchip *flash)
@@ -111,8 +109,8 @@
flash++;
continue;
}
- printf_debug("Probing for %s, %d KB\n",
- flash->name, flash->total_size);
+ printf_debug("Probing for %s, %d KB\n",
+ flash->name, flash->total_size);
size = flash->total_size * 1024;
@@ -132,11 +130,11 @@
if (getpagesize() > size) {
size = getpagesize();
printf("WARNING: size: %d -> %ld (page size)\n",
- flash->total_size * 1024, (unsigned long) size);
+ flash->total_size * 1024, (unsigned long)size);
}
bios = mmap(0, size, PROT_WRITE | PROT_READ, MAP_SHARED,
- fd_mem, (off_t)flash_baseaddr );
+ fd_mem, (off_t) flash_baseaddr);
if (bios == MAP_FAILED) {
perror("Error: Can't mmap " MEM_DEV ".");
exit(1);
@@ -148,7 +146,7 @@
flash->name, flash_baseaddr);
return flash;
}
- munmap((void *) bios, size);
+ munmap((void *)bios, size);
flash++;
}
@@ -162,11 +160,12 @@
volatile uint8_t *bios = flash->virt_addr;
printf("Verifying flash ");
-
- if(verbose) printf("address: 0x00000000\b\b\b\b\b\b\b\b\b\b");
-
+
+ if (verbose)
+ printf("address: 0x00000000\b\b\b\b\b\b\b\b\b\b");
+
for (idx = 0; idx < total_size; idx++) {
- if (verbose && ( (idx & 0xfff) == 0xfff ))
+ if (verbose && ((idx & 0xfff) == 0xfff))
printf("0x%08x", idx);
if (*(bios + idx) != *(buf + idx)) {
@@ -176,38 +175,37 @@
printf("- FAILED\n");
return 1;
}
-
- if (verbose && ( (idx & 0xfff) == 0xfff ))
+
+ if (verbose && ((idx & 0xfff) == 0xfff))
printf("\b\b\b\b\b\b\b\b\b\b");
}
- if (verbose)
+ if (verbose)
printf("\b\b\b\b\b\b\b\b\b\b ");
-
+
printf("- VERIFIED \n");
return 0;
}
-
void usage(const char *name)
{
printf("usage: %s [-rwvEVfh] [-c chipname] [-s exclude_start]\n", name);
printf(" [-e exclude_end] [-m vendor:part] [-l file.layout] [-i imagename] [file]\n");
- printf(" -r | --read: read flash and save into file\n"
- " -w | --write: write file into flash (default when\n"
- " file is specified)\n"
- " -v | --verify: verify flash against file\n"
- " -E | --erase: erase flash device\n"
- " -V | --verbose: more verbose output\n"
- " -c | --chip <chipname>: probe only for specified flash chip\n"
- " -s | --estart <addr>: exclude start position\n"
- " -e | --eend <addr>: exclude end postion\n"
- " -m | --mainboard <vendor:part>: override mainboard settings\n"
- " -f | --force: force write without checking image\n"
- " -l | --layout <file.layout>: read rom layout from file\n"
- " -i | --image <name>: only flash image name from flash layout\n"
- "\n"
- " If no file is specified, then all that happens\n"
- " is that flash info is dumped.\n\n");
+ printf
+ (" -r | --read: read flash and save into file\n"
+ " -w | --write: write file into flash (default when\n"
+ " file is specified)\n"
+ " -v | --verify: verify flash against file\n"
+ " -E | --erase: erase flash device\n"
+ " -V | --verbose: more verbose output\n"
+ " -c | --chip <chipname>: probe only for specified flash chip\n"
+ " -s | --estart <addr>: exclude start position\n"
+ " -e | --eend <addr>: exclude end postion\n"
+ " -m | --mainboard <vendor:part>: override mainboard settings\n"
+ " -f | --force: force write without checking image\n"
+ " -l | --layout <file.layout>: read rom layout from file\n"
+ " -i | --image <name>: only flash image name from flash layout\n"
+ "\n" " If no file is specified, then all that happens\n"
+ " is that flash info is dumped.\n\n");
exit(1);
}
@@ -219,46 +217,42 @@
struct flashchip *flash;
int opt;
int option_index = 0;
- int read_it = 0,
- write_it = 0,
- erase_it = 0,
- verify_it = 0;
+ int read_it = 0, write_it = 0, erase_it = 0, verify_it = 0;
int ret = 0;
- static struct option long_options[]= {
- { "read", 0, 0, 'r' },
- { "write", 0, 0, 'w' },
- { "erase", 0, 0, 'E' },
- { "verify", 0, 0, 'v' },
- { "chip", 1, 0, 'c' },
- { "estart", 1, 0, 's' },
- { "eend", 1, 0, 'e' },
- { "mainboard", 1, 0, 'm' },
- { "verbose", 0, 0, 'V' },
- { "force", 0, 0, 'f' },
- { "layout", 1, 0, 'l' },
- { "image", 1, 0, 'i' },
- { "help", 0, 0, 'h' },
- { 0, 0, 0, 0 }
+ static struct option long_options[] = {
+ {"read", 0, 0, 'r'},
+ {"write", 0, 0, 'w'},
+ {"erase", 0, 0, 'E'},
+ {"verify", 0, 0, 'v'},
+ {"chip", 1, 0, 'c'},
+ {"estart", 1, 0, 's'},
+ {"eend", 1, 0, 'e'},
+ {"mainboard", 1, 0, 'm'},
+ {"verbose", 0, 0, 'V'},
+ {"force", 0, 0, 'f'},
+ {"layout", 1, 0, 'l'},
+ {"image", 1, 0, 'i'},
+ {"help", 0, 0, 'h'},
+ {0, 0, 0, 0}
};
-
+
char *filename = NULL;
+ unsigned int exclude_start_position = 0, exclude_end_position = 0; // [x,y)
+ char *tempstr = NULL, *tempstr2 = NULL;
- unsigned int exclude_start_position=0, exclude_end_position=0; // [x,y)
- char *tempstr=NULL, *tempstr2=NULL;
-
if (argc > 1) {
/* Yes, print them. */
int i;
- printf_debug ("The arguments are:\n");
+ printf_debug("The arguments are:\n");
for (i = 1; i < argc; ++i)
- printf_debug ("%s\n", argv[i]);
+ printf_debug("%s\n", argv[i]);
}
setbuf(stdout, NULL);
- while ((opt = getopt_long(argc, argv, "rwvVEfc:s:e:m:l:i:h", long_options,
- &option_index)) != EOF) {
+ while ((opt = getopt_long(argc, argv, "rwvVEfc:s:e:m:l:i:h",
+ long_options, &option_index)) != EOF) {
switch (opt) {
case 'r':
read_it = 1;
@@ -280,34 +274,34 @@
break;
case 's':
tempstr = strdup(optarg);
- sscanf(tempstr,"%x",&exclude_start_position);
+ sscanf(tempstr, "%x", &exclude_start_position);
break;
case 'e':
tempstr = strdup(optarg);
- sscanf(tempstr,"%x",&exclude_end_position);
+ sscanf(tempstr, "%x", &exclude_end_position);
break;
case 'm':
tempstr = strdup(optarg);
strtok(tempstr, ":");
- tempstr2=strtok(NULL, ":");
+ tempstr2 = strtok(NULL, ":");
if (tempstr2) {
- lb_vendor=tempstr;
- lb_part=tempstr2;
+ lb_vendor = tempstr;
+ lb_part = tempstr2;
} else {
printf("warning: ignored wrong format of"
- " mainboard: %s\n", tempstr);
+ " mainboard: %s\n", tempstr);
}
break;
case 'f':
- force=1;
+ force = 1;
break;
case 'l':
- tempstr=strdup(optarg);
+ tempstr = strdup(optarg);
if (read_romlayout(tempstr))
exit(1);
break;
case 'i':
- tempstr=strdup(optarg);
+ tempstr = strdup(optarg);
find_romentry(tempstr);
break;
case 'h':
@@ -325,17 +319,18 @@
if (optind < argc)
filename = argv[optind++];
- /* First get full io access */
+ /* First get full io access */
#if defined (__sun) && (defined(__i386) || defined(__amd64))
- if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0){
+ if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) {
#else
if (iopl(3) != 0) {
#endif
- fprintf(stderr, "ERROR: iopl failed: \"%s\"\n", strerror(errno));
+ fprintf(stderr, "ERROR: iopl failed: \"%s\"\n",
+ strerror(errno));
exit(1);
}
- /* Initialize PCI access for flash enables */
+ /* Initialize PCI access for flash enables */
pacc = pci_alloc(); /* Get the pci_access structure */
/* Set all options you want -- here we stick with the defaults */
pci_init(pacc); /* Initialize the PCI library */
@@ -343,7 +338,8 @@
/* Open the memory device. A lot of functions need it */
if ((fd_mem = open(MEM_DEV, O_RDWR)) < 0) {
- perror("Error: Can not access memory using " MEM_DEV ". You need to be root.");
+ perror("Error: Can not access memory using " MEM_DEV
+ ". You need to be root.");
exit(1);
}
@@ -357,14 +353,14 @@
/* try to enable it. Failure IS an option, since not all motherboards
* really need this to be done, etc., etc.
*/
- ret = chipset_flash_enable();
- if (ret == -2)
- printf("WARNING: No chipset found. Flash detection "
- "will most likely fail.\n");
+ ret = chipset_flash_enable();
+ if (ret == -2) {
+ printf("WARNING: No chipset found. Flash detection "
+ "will most likely fail.\n");
+ }
- board_flash_enable(lb_vendor, lb_part);
+ board_flash_enable(lb_vendor, lb_part);
-
if ((flash = probe_flash(flashchips)) == NULL) {
printf("No EEPROM/flash device found.\n");
exit(1);
@@ -380,11 +376,11 @@
size = flash->total_size * 1024;
buf = (uint8_t *) calloc(size, sizeof(char));
-
+
if (erase_it) {
printf("Erasing flash chip\n");
flash->erase(flash);
- exit(0);
+ exit(0);
} else if (read_it) {
if ((image = fopen(filename, "w")) == NULL) {
perror(filename);
@@ -392,13 +388,13 @@
}
printf("Reading Flash...");
if (flash->read == NULL)
- memcpy(buf, (const char *) flash->virt_addr, size);
+ memcpy(buf, (const char *)flash->virt_addr, size);
else
flash->read(flash, buf);
if (exclude_end_position - exclude_start_position > 0)
- memset(buf+exclude_start_position, 0,
- exclude_end_position-exclude_start_position);
+ memset(buf + exclude_start_position, 0,
+ exclude_end_position - exclude_start_position);
fwrite(buf, sizeof(char), size, image);
fclose(image);
@@ -414,7 +410,7 @@
perror(filename);
exit(1);
}
- if(image_stat.st_size!=flash->total_size*1024) {
+ if (image_stat.st_size != flash->total_size * 1024) {
fprintf(stderr, "Error: Image size doesnt match\n");
exit(1);
}
@@ -430,26 +426,26 @@
* it to the rom layout feature below and drop exclude range
* completely once all flash chips can do rom layouts. stepan
*/
-
+
// ////////////////////////////////////////////////////////////
if (exclude_end_position - exclude_start_position > 0)
- memcpy(buf+exclude_start_position,
- (const char *) flash->virt_addr+exclude_start_position,
- exclude_end_position-exclude_start_position);
+ memcpy(buf + exclude_start_position,
+ (const char *)flash->virt_addr + exclude_start_position,
+ exclude_end_position - exclude_start_position);
- exclude_start_page = exclude_start_position/flash->page_size;
- if ((exclude_start_position%flash->page_size) != 0) {
+ exclude_start_page = exclude_start_position / flash->page_size;
+ if ((exclude_start_position % flash->page_size) != 0) {
exclude_start_page++;
}
- exclude_end_page = exclude_end_position/flash->page_size;
+ exclude_end_page = exclude_end_position / flash->page_size;
// ////////////////////////////////////////////////////////////
// This should be moved into each flash part's code to do it
// cleanly. This does the job.
- handle_romentries(buf, (uint8_t *)flash->virt_addr);
-
+ handle_romentries(buf, (uint8_t *) flash->virt_addr);
+
// ////////////////////////////////////////////////////////////
-
+
if (write_it)
ret |= flash->write(flash, buf);
Modified: trunk/LinuxBIOSv2/util/flashrom/jedec.c
===================================================================
--- trunk/LinuxBIOSv2/util/flashrom/jedec.c 2007-05-09 08:11:52 UTC (rev 2642)
+++ trunk/LinuxBIOSv2/util/flashrom/jedec.c 2007-05-09 10:17:44 UTC (rev 2643)
@@ -39,23 +39,23 @@
uint8_t id1, id2;
/* Issue JEDEC Product ID Entry command */
- *(volatile uint8_t *) (bios + 0x5555) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
myusec_delay(10);
- *(volatile uint8_t *) (bios + 0x2AAA) = 0x55;
+ *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
myusec_delay(10);
- *(volatile uint8_t *) (bios + 0x5555) = 0x90;
+ *(volatile uint8_t *)(bios + 0x5555) = 0x90;
myusec_delay(10);
/* Read product ID */
- id1 = *(volatile uint8_t *) bios;
- id2 = *(volatile uint8_t *) (bios + 0x01);
+ id1 = *(volatile uint8_t *)bios;
+ id2 = *(volatile uint8_t *)(bios + 0x01);
/* Issue JEDEC Product ID Exit command */
- *(volatile uint8_t *) (bios + 0x5555) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
myusec_delay(10);
- *(volatile uint8_t *) (bios + 0x2AAA) = 0x55;
+ *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
myusec_delay(10);
- *(volatile uint8_t *) (bios + 0x5555) = 0xF0;
+ *(volatile uint8_t *)(bios + 0x5555) = 0xF0;
myusec_delay(10);
printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, id1, id2);
@@ -68,18 +68,18 @@
int erase_sector_jedec(volatile uint8_t *bios, unsigned int page)
{
/* Issue the Sector Erase command */
- *(volatile uint8_t *) (bios + 0x5555) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
myusec_delay(10);
- *(volatile uint8_t *) (bios + 0x2AAA) = 0x55;
+ *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
myusec_delay(10);
- *(volatile uint8_t *) (bios + 0x5555) = 0x80;
+ *(volatile uint8_t *)(bios + 0x5555) = 0x80;
myusec_delay(10);
- *(volatile uint8_t *) (bios + 0x5555) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
myusec_delay(10);
- *(volatile uint8_t *) (bios + 0x2AAA) = 0x55;
+ *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
myusec_delay(10);
- *(volatile uint8_t *) (bios + page) = 0x30;
+ *(volatile uint8_t *)(bios + page) = 0x30;
myusec_delay(10);
/* wait for Toggle bit ready */
@@ -91,18 +91,18 @@
int erase_block_jedec(volatile uint8_t *bios, unsigned int block)
{
/* Issue the Sector Erase command */
- *(volatile uint8_t *) (bios + 0x5555) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
myusec_delay(10);
- *(volatile uint8_t *) (bios + 0x2AAA) = 0x55;
+ *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
myusec_delay(10);
- *(volatile uint8_t *) (bios + 0x5555) = 0x80;
+ *(volatile uint8_t *)(bios + 0x5555) = 0x80;
myusec_delay(10);
- *(volatile uint8_t *) (bios + 0x5555) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
myusec_delay(10);
- *(volatile uint8_t *) (bios + 0x2AAA) = 0x55;
+ *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
myusec_delay(10);
- *(volatile uint8_t *) (bios + block) = 0x50;
+ *(volatile uint8_t *)(bios + block) = 0x50;
myusec_delay(10);
/* wait for Toggle bit ready */
@@ -116,18 +116,18 @@
volatile uint8_t *bios = flash->virt_addr;
/* Issue the JEDEC Chip Erase command */
- *(volatile uint8_t *) (bios + 0x5555) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
myusec_delay(10);
- *(volatile uint8_t *) (bios + 0x2AAA) = 0x55;
+ *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
myusec_delay(10);
- *(volatile uint8_t *) (bios + 0x5555) = 0x80;
+ *(volatile uint8_t *)(bios + 0x5555) = 0x80;
myusec_delay(10);
- *(volatile uint8_t *) (bios + 0x5555) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
myusec_delay(10);
- *(volatile uint8_t *) (bios + 0x2AAA) = 0x55;
+ *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
myusec_delay(10);
- *(volatile uint8_t *) (bios + 0x5555) = 0x10;
+ *(volatile uint8_t *)(bios + 0x5555) = 0x10;
myusec_delay(10);
toggle_ready_jedec(bios);
@@ -144,14 +144,14 @@
retry:
/* Issue JEDEC Data Unprotect comand */
- *(volatile uint8_t *) (bios + 0x5555) = 0xAA;
- *(volatile uint8_t *) (bios + 0x2AAA) = 0x55;
- *(volatile uint8_t *) (bios + 0x5555) = 0xA0;
+ *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
+ *(volatile uint8_t *)(bios + 0x5555) = 0xA0;
/* transfer data from source to destination */
for (i = start_index; i < page_size; i++) {
/* If the data is 0xFF, don't program it */
- if (*src != 0xFF )
+ if (*src != 0xFF)
*dst = *src;
dst++;
src++;
@@ -163,21 +163,21 @@
src = s;
ok = 1;
for (i = 0; i < page_size; i++) {
- if ( *dst != *src )
- {
+ if (*dst != *src) {
ok = 0;
break;
}
dst++;
src++;
}
-
+
if (!ok && tried++ < MAX_REFLASH_TRIES) {
start_index = i;
- goto retry;
- }
+ goto retry;
+ }
if (!ok) {
- fprintf( stderr, " page %d failed!\n", (unsigned int)(d-bios)/page_size );
+ fprintf(stderr, " page %d failed!\n",
+ (unsigned int)(d - bios) / page_size);
}
return (!ok);
}
@@ -194,20 +194,20 @@
retry:
/* Issue JEDEC Byte Program command */
- *(volatile uint8_t *) (bios + 0x5555) = 0xAA;
- *(volatile uint8_t *) (bios + 0x2AAA) = 0x55;
- *(volatile uint8_t *) (bios + 0x5555) = 0xA0;
+ *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
+ *(volatile uint8_t *)(bios + 0x5555) = 0xA0;
/* transfer data from source to destination */
*dst = *src;
toggle_ready_jedec(bios);
if (*dst != *src && tried++ < MAX_REFLASH_TRIES) {
- goto retry;
- }
+ goto retry;
+ }
if (tried >= MAX_REFLASH_TRIES)
- ok=0;
+ ok = 0;
return (!ok);
}
@@ -233,13 +233,13 @@
volatile uint8_t *bios = flash->virt_addr;
erase_chip_jedec(flash);
- // dumb check if erase was successful.
- for (i=0; i < total_size; i++) {
- if (bios[i] != (uint8_t)0xff) {
- printf("ERASE FAILED\n");
- return -1;
- }
- }
+ // dumb check if erase was successful.
+ for (i = 0; i < total_size; i++) {
+ if (bios[i] != (uint8_t) 0xff) {
+ printf("ERASE FAILED\n");
+ return -1;
+ }
+ }
printf("Programming Page: ");
for (i = 0; i < total_size / page_size; i++) {
Modified: trunk/LinuxBIOSv2/util/flashrom/layout.c
===================================================================
--- trunk/LinuxBIOSv2/util/flashrom/layout.c 2007-05-09 08:11:52 UTC (rev 2642)
+++ trunk/LinuxBIOSv2/util/flashrom/layout.c 2007-05-09 10:17:44 UTC (rev 2643)
@@ -6,9 +6,9 @@
#include "lbtable.h"
#include "debug.h"
-char * mainboard_vendor=NULL;
-char * mainboard_part=NULL;
-int romimages=0;
+char *mainboard_vendor = NULL;
+char *mainboard_part = NULL;
+int romimages = 0;
extern int force;
@@ -25,131 +25,132 @@
static char *def_name = "DEFAULT";
-
int show_id(uint8_t *bios, int size)
{
unsigned int *walk;
+ walk = (unsigned int *)(bios + size - 0x10);
+ walk--;
- walk=(unsigned int *)(bios+size-0x10);
- walk--;
-
- if((*walk)==0 || ((*walk)&0x3ff) != 0) {
+ if ((*walk) == 0 || ((*walk) & 0x3ff) != 0) {
/* We might have an Nvidia chipset bios
* which stores the id information at a
* different location.
*/
- walk=(unsigned int *)(bios+size-0x80);
- walk--;
+ walk = (unsigned int *)(bios + size - 0x80);
+ walk--;
}
-
- if((*walk)==0 || ((*walk)&0x3ff) != 0) {
+
+ if ((*walk) == 0 || ((*walk) & 0x3ff) != 0) {
printf("Flash image seems to be a legacy BIOS. Disabling checks.\n");
- mainboard_vendor=def_name;
- mainboard_part=def_name;
+ mainboard_vendor = def_name;
+ mainboard_part = def_name;
return 0;
}
-
+
printf_debug("LinuxBIOS last image size "
"(not rom size) is %d bytes.\n", *walk);
-
- walk--; mainboard_part=strdup((const char *)(bios+size-*walk));
- walk--; mainboard_vendor=strdup((const char *)(bios+size-*walk));
+
+ walk--;
+ mainboard_part = strdup((const char *)(bios + size - *walk));
+ walk--;
+ mainboard_vendor = strdup((const char *)(bios + size - *walk));
printf_debug("MANUFACTURER: %s\n", mainboard_vendor);
printf_debug("MAINBOARD ID: %s\n", mainboard_part);
-
/*
* If lb_vendor is not set, the linuxbios table was
* not found. Nor was -mVENDOR:PART specified
*/
- if(!lb_vendor || !lb_part) {
+ if (!lb_vendor || !lb_part) {
printf("Note: If the following flash access fails, "
- "you might need to specify -m <vendor>:<mainboard>\n");
+ "you might need to specify -m <vendor>:<mainboard>\n");
return 0;
}
-
+
/* These comparisons are case insensitive to make things
* a little less user^Werror prone.
*/
- if(!strcasecmp(mainboard_vendor, lb_vendor) &&
- !strcasecmp(mainboard_part, lb_part)) {
+ if (!strcasecmp(mainboard_vendor, lb_vendor) &&
+ !strcasecmp(mainboard_part, lb_part)) {
printf_debug("This firmware image matches "
"this motherboard.\n");
} else {
- if(force) {
+ if (force) {
printf("WARNING: This firmware image does not "
- "seem to fit to this machine - forcing it.\n");
+ "seem to fit to this machine - forcing it.\n");
} else {
printf("ERROR: Your firmware image (%s:%s) does not "
- "appear to\n be correct for the detected "
- "mainboard (%s:%s)\n\nOverride with --force if you "
- "are absolutely sure that you\nare using a correct "
- "image for this mainboard or override\nthe detected "
- "values with --mainboard <vendor>:<mainboard>.\n\n",
- mainboard_vendor, mainboard_part, lb_vendor, lb_part);
+ "appear to\n be correct for the detected "
+ "mainboard (%s:%s)\n\nOverride with --force if you "
+ "are absolutely sure that you\nare using a correct "
+ "image for this mainboard or override\nthe detected "
+ "values with --mainboard <vendor>:<mainboard>.\n\n",
+ mainboard_vendor, mainboard_part, lb_vendor,
+ lb_part);
exit(1);
}
}
-
+
return 0;
}
-int read_romlayout(char *name)
+int read_romlayout(char *name)
{
FILE *romlayout;
char tempstr[256];
int i;
- romlayout=fopen (name, "r");
-
- if(!romlayout) {
- fprintf(stderr, "ERROR: Could not open rom layout (%s).\n",
- name);
+ romlayout = fopen(name, "r");
+
+ if (!romlayout) {
+ fprintf(stderr, "ERROR: Could not open rom layout (%s).\n",
+ name);
return -1;
}
-
- while(!feof(romlayout)) {
+
+ while (!feof(romlayout)) {
char *tstr1, *tstr2;
- fscanf(romlayout,"%s %s\n", tempstr, rom_entries[romimages].name);
+ fscanf(romlayout, "%s %s\n", tempstr,
+ rom_entries[romimages].name);
#if 0
// fscanf does not like arbitrary comments like that :( later
- if (tempstr[0]=='#') {
+ if (tempstr[0] == '#') {
continue;
}
#endif
- tstr1=strtok(tempstr,":");
- tstr2=strtok(NULL,":");
- rom_entries[romimages].start=strtol(tstr1, (char **)NULL, 16);
- rom_entries[romimages].end=strtol(tstr2, (char **)NULL, 16);
- rom_entries[romimages].included=0;
+ tstr1 = strtok(tempstr, ":");
+ tstr2 = strtok(NULL, ":");
+ rom_entries[romimages].start = strtol(tstr1, (char **)NULL, 16);
+ rom_entries[romimages].end = strtol(tstr2, (char **)NULL, 16);
+ rom_entries[romimages].included = 0;
romimages++;
}
-
- for(i=0; i<romimages; i++) {
- printf_debug("romlayout %08x - %08x named %s\n",
- rom_entries[i].start,
- rom_entries[i].end,
- rom_entries[i].name);
+
+ for (i = 0; i < romimages; i++) {
+ printf_debug("romlayout %08x - %08x named %s\n",
+ rom_entries[i].start,
+ rom_entries[i].end, rom_entries[i].name);
}
fclose(romlayout);
- return 0;
+ return 0;
}
int find_romentry(char *name)
{
int i;
- if(!romimages) return -1;
+ if (!romimages)
+ return -1;
printf("Looking for \"%s\"... ", name);
-
- for (i=0; i<romimages; i++) {
- if(!strcmp(rom_entries[i].name, name)) {
- rom_entries[i].included=1;
+
+ for (i = 0; i < romimages; i++) {
+ if (!strcmp(rom_entries[i].name, name)) {
+ rom_entries[i].included = 1;
printf("found.\n");
return i;
}
@@ -178,15 +179,14 @@
// flash. Same thing if you specify -i normal -i all only
// normal will be updated and the rest will be kept.
-
- for (i=0; i<romimages; i++) {
-
- if (rom_entries[i].included)
+ for (i = 0; i < romimages; i++) {
+
+ if (rom_entries[i].included)
continue;
-
- memcpy (buffer+rom_entries[i].start,
- content+rom_entries[i].start,
- rom_entries[i].end-rom_entries[i].start);
+
+ memcpy(buffer + rom_entries[i].start,
+ content + rom_entries[i].start,
+ rom_entries[i].end - rom_entries[i].start);
}
return 0;
Modified: trunk/LinuxBIOSv2/util/flashrom/lbtable.c
===================================================================
--- trunk/LinuxBIOSv2/util/flashrom/lbtable.c 2007-05-09 08:11:52 UTC (rev 2642)
+++ trunk/LinuxBIOSv2/util/flashrom/lbtable.c 2007-05-09 10:17:44 UTC (rev 2643)
@@ -11,13 +11,13 @@
#include "linuxbios_tables.h"
#include "debug.h"
-char *lb_part=NULL, *lb_vendor=NULL;
+char *lb_part = NULL, *lb_vendor = NULL;
static unsigned long compute_checksum(void *addr, unsigned long length)
{
uint8_t *ptr;
volatile union {
- uint8_t byte[2];
+ uint8_t byte[2];
uint16_t word;
} value;
unsigned long sum;
@@ -27,7 +27,7 @@
*/
sum = 0;
ptr = addr;
- for(i = 0; i < length; i++) {
+ for (i = 0; i < length; i++) {
unsigned long value;
value = ptr[i];
if (i & 1) {
@@ -50,10 +50,9 @@
(((char *)rec) < (((char *)head) + sizeof(*head) + head->table_bytes)) && \
(rec->size >= 1) && \
((((char *)rec) + rec->size) <= (((char *)head) + sizeof(*head) + head->table_bytes)); \
- rec = (struct lb_record *)(((char *)rec) + rec->size))
-
+ rec = (struct lb_record *)(((char *)rec) + rec->size))
-static int count_lb_records(struct lb_header *head)
+static int count_lb_records(struct lb_header *head)
{
struct lb_record *rec;
int count;
@@ -64,18 +63,20 @@
return count;
}
-
-static struct lb_header *find_lb_table(void *base, unsigned long start, unsigned long end)
+static struct lb_header *find_lb_table(void *base, unsigned long start,
+ unsigned long end)
{
unsigned long addr;
/* For now be stupid.... */
- for(addr = start; addr < end; addr += 16) {
- struct lb_header *head = (struct lb_header *)(((char*)base) + addr);
- struct lb_record *recs = (struct lb_record *)(((char*)base) + addr + sizeof(*head));
+ for (addr = start; addr < end; addr += 16) {
+ struct lb_header *head =
+ (struct lb_header *)(((char *)base) + addr);
+ struct lb_record *recs =
+ (struct lb_record *)(((char *)base) + addr + sizeof(*head));
if (memcmp(head->signature, "LBIO", 4) != 0)
continue;
- printf_debug( "Found canidate at: %08lx-%08lx\n",
- addr, addr + head->table_bytes);
+ printf_debug("Found canidate at: %08lx-%08lx\n",
+ addr, addr + head->table_bytes);
if (head->header_bytes != sizeof(*head)) {
fprintf(stderr, "Header bytes of %d are incorrect\n",
head->header_bytes);
@@ -86,12 +87,12 @@
head->table_entries);
continue;
}
- if (compute_checksum((uint8_t *)head, sizeof(*head)) != 0) {
+ if (compute_checksum((uint8_t *) head, sizeof(*head)) != 0) {
fprintf(stderr, "bad header checksum\n");
continue;
}
if (compute_checksum(recs, head->table_bytes)
- != head->table_checksum) {
+ != head->table_checksum) {
fprintf(stderr, "bad table checksum: %04x\n",
head->table_checksum);
continue;
@@ -111,21 +112,20 @@
rec = (struct lb_mainboard *)ptr;
max_size = rec->size - sizeof(*rec);
printf("vendor id: %.*s part id: %.*s\n",
- max_size - rec->vendor_idx,
- rec->strings + rec->vendor_idx,
- max_size - rec->part_number_idx,
- rec->strings + rec->part_number_idx);
- snprintf(vendor, 255, "%.*s", max_size - rec->vendor_idx,
- rec->strings + rec->vendor_idx);
+ max_size - rec->vendor_idx,
+ rec->strings + rec->vendor_idx,
+ max_size - rec->part_number_idx,
+ rec->strings + rec->part_number_idx);
+ snprintf(vendor, 255, "%.*s", max_size - rec->vendor_idx,
+ rec->strings + rec->vendor_idx);
snprintf(part, 255, "%.*s", max_size - rec->part_number_idx,
- rec->strings + rec->part_number_idx);
+ rec->strings + rec->part_number_idx);
- if(lb_part) {
- printf("overwritten by command line, vendor id: %s part id: %s\n",
- lb_vendor, lb_part);
+ if (lb_part) {
+ printf("overwritten by command line, vendor id: %s part id: %s\n", lb_vendor, lb_part);
} else {
- lb_part=strdup(part);
- lb_vendor=strdup(vendor);
+ lb_part = strdup(part);
+ lb_vendor = strdup(vendor);
}
}
@@ -134,33 +134,35 @@
return (struct lb_record *)(((char *)rec) + rec->size);
}
-static void search_lb_records(struct lb_record *rec, struct lb_record *last,
- unsigned long addr)
+static void search_lb_records(struct lb_record *rec, struct lb_record *last,
+ unsigned long addr)
{
struct lb_record *next;
int count;
count = 0;
- for(next = next_record(rec); (rec < last) && (next <= last);
- rec = next, addr += rec->size) {
+ for (next = next_record(rec); (rec < last) && (next <= last);
+ rec = next, addr += rec->size) {
next = next_record(rec);
count++;
- if(rec->tag == LB_TAG_MAINBOARD) {
- find_mainboard(rec,addr);
+ if (rec->tag == LB_TAG_MAINBOARD) {
+ find_mainboard(rec, addr);
break;
}
}
}
-int linuxbios_init(void)
+int linuxbios_init(void)
{
uint8_t *low_1MB;
struct lb_header *lb_table;
struct lb_record *rec, *last;
-
- low_1MB = mmap(0, 1024*1024, PROT_READ, MAP_SHARED, fd_mem, 0x00000000);
+
+ low_1MB = mmap(0, 1024 * 1024, PROT_READ, MAP_SHARED, fd_mem,
+ 0x00000000);
if (low_1MB == MAP_FAILED) {
- fprintf(stderr, "Can not mmap " MEM_DEV " at %08lx errno(%d):%s\n",
+ fprintf(stderr,
+ "Can not mmap " MEM_DEV " at %08lx errno(%d):%s\n",
0x00000000UL, errno, strerror(errno));
exit(-2);
}
@@ -168,19 +170,19 @@
if (!lb_table)
lb_table = find_lb_table(low_1MB, 0x00000, 0x1000);
if (!lb_table)
- lb_table = find_lb_table(low_1MB, 0xf0000, 1024*1024);
+ lb_table = find_lb_table(low_1MB, 0xf0000, 1024 * 1024);
if (lb_table) {
unsigned long addr;
addr = ((char *)lb_table) - ((char *)low_1MB);
printf_debug("lb_table found at address %p\n", lb_table);
- rec = (struct lb_record *)(((char *)lb_table) + lb_table->header_bytes);
+ rec = (struct lb_record *)(((char *)lb_table) + lb_table->header_bytes);
last = (struct lb_record *)(((char *)rec) + lb_table->table_bytes);
printf_debug("LinuxBIOS header(%d) checksum: %04x table(%d) checksum: %04x entries: %d\n",
- lb_table->header_bytes, lb_table->header_checksum,
- lb_table->table_bytes, lb_table->table_checksum, lb_table->table_entries);
+ lb_table->header_bytes, lb_table->header_checksum,
+ lb_table->table_bytes, lb_table->table_checksum,
+ lb_table->table_entries);
search_lb_records(rec, last, addr + lb_table->header_bytes);
- }
- else {
+ } else {
printf("No LinuxBIOS table found.\n");
return -1;
}
Modified: trunk/LinuxBIOSv2/util/flashrom/linuxbios_tables.h
===================================================================
--- trunk/LinuxBIOSv2/util/flashrom/linuxbios_tables.h 2007-05-09 08:11:52 UTC (rev 2642)
+++ trunk/LinuxBIOSv2/util/flashrom/linuxbios_tables.h 2007-05-09 10:17:44 UTC (rev 2643)
@@ -50,25 +50,22 @@
static inline uint64_t unpack_lb64(struct lb_uint64 value)
{
- uint64_t result;
- result = value.hi;
- result = (result << 32) + value.lo;
- return result;
+ uint64_t result;
+ result = value.hi;
+ result = (result << 32) + value.lo;
+ return result;
}
static inline struct lb_uint64 pack_lb64(uint64_t value)
{
- struct lb_uint64 result;
- result.lo = (value >> 0) & 0xffffffff;
- result.hi = (value >> 32) & 0xffffffff;
- return result;
+ struct lb_uint64 result;
+ result.lo = (value >> 0) & 0xffffffff;
+ result.hi = (value >> 32) & 0xffffffff;
+ return result;
}
-
-
-struct lb_header
-{
- uint8_t signature[4]; /* LBIO */
+struct lb_header {
+ uint8_t signature[4]; /* LBIO */
uint32_t header_bytes;
uint32_t header_checksum;
uint32_t table_bytes;
@@ -117,9 +114,9 @@
struct lb_mainboard {
uint32_t tag;
uint32_t size;
- uint8_t vendor_idx;
- uint8_t part_number_idx;
- uint8_t strings[0];
+ uint8_t vendor_idx;
+ uint8_t part_number_idx;
+ uint8_t strings[0];
};
#define LB_TAG_VERSION 0x0004
@@ -135,16 +132,16 @@
struct lb_string {
uint32_t tag;
uint32_t size;
- uint8_t string[0];
+ uint8_t string[0];
};
/* The following structures are for the cmos definitions table */
#define LB_TAG_CMOS_OPTION_TABLE 200
/* cmos header record */
struct cmos_option_table {
- uint32_t tag; /* CMOS definitions table type */
- uint32_t size; /* size of the entire table */
- uint32_t header_length; /* length of header */
+ uint32_t tag; /* CMOS definitions table type */
+ uint32_t size; /* size of the entire table */
+ uint32_t header_length; /* length of header */
};
/* cmos entry record
@@ -156,31 +153,30 @@
*/
#define LB_TAG_OPTION 201
struct cmos_entries {
- uint32_t tag; /* entry type */
- uint32_t size; /* length of this record */
- uint32_t bit; /* starting bit from start of image */
- uint32_t length; /* length of field in bits */
- uint32_t config; /* e=enumeration, h=hex, r=reserved */
- uint32_t config_id; /* a number linking to an enumeration record */
+ uint32_t tag; /* entry type */
+ uint32_t size; /* length of this record */
+ uint32_t bit; /* starting bit from start of image */
+ uint32_t length; /* length of field in bits */
+ uint32_t config; /* e=enumeration, h=hex, r=reserved */
+ uint32_t config_id; /* a number linking to an enumeration record */
#define CMOS_MAX_NAME_LENGTH 32
- uint8_t name[CMOS_MAX_NAME_LENGTH]; /* name of entry in ascii,
- variable length int aligned */
+ uint8_t name[CMOS_MAX_NAME_LENGTH]; /* name of entry in ascii,
+ variable length int aligned */
};
-
/* cmos enumerations record
This record is variable length. The text field may be
shorter than CMOS_MAX_TEXT_LENGTH.
*/
#define LB_TAG_OPTION_ENUM 202
struct cmos_enums {
- uint32_t tag; /* enumeration type */
- uint32_t size; /* length of this record */
- uint32_t config_id; /* a number identifying the config id */
- uint32_t value; /* the value associated with the text */
+ uint32_t tag; /* enumeration type */
+ uint32_t size; /* length of this record */
+ uint32_t config_id; /* a number identifying the config id */
+ uint32_t value; /* the value associated with the text */
#define CMOS_MAX_TEXT_LENGTH 32
- uint8_t text[CMOS_MAX_TEXT_LENGTH]; /* enum description in ascii,
- variable length int aligned */
+ uint8_t text[CMOS_MAX_TEXT_LENGTH]; /* enum description in ascii,
+ variable length int aligned */
};
/* cmos defaults record
@@ -188,16 +184,16 @@
*/
#define LB_TAG_OPTION_DEFAULTS 203
struct cmos_defaults {
- uint32_t tag; /* default type */
- uint32_t size; /* length of this record */
- uint32_t name_length; /* length of the following name field */
- uint8_t name[CMOS_MAX_NAME_LENGTH]; /* name identifying the default */
+ uint32_t tag; /* default type */
+ uint32_t size; /* length of this record */
+ uint32_t name_length; /* length of the following name field */
+ uint8_t name[CMOS_MAX_NAME_LENGTH]; /* name identifying the default */
#define CMOS_IMAGE_BUFFER_SIZE 128
- uint8_t default_set[CMOS_IMAGE_BUFFER_SIZE]; /* default settings */
+ uint8_t default_set[CMOS_IMAGE_BUFFER_SIZE]; /* default settings */
};
#define LB_TAG_OPTION_CHECKSUM 204
-struct cmos_checksum {
+struct cmos_checksum {
uint32_t tag;
uint32_t size;
/* In practice everything is byte aligned, but things are measured
@@ -211,6 +207,4 @@
#define CHECKSUM_PCBIOS 1
};
-
-
-#endif /* LINUXBIOS_TABLES_H */
+#endif /* LINUXBIOS_TABLES_H */
Modified: trunk/LinuxBIOSv2/util/flashrom/m29f400bt.c
===================================================================
--- trunk/LinuxBIOSv2/util/flashrom/m29f400bt.c 2007-05-09 08:11:52 UTC (rev 2642)
+++ trunk/LinuxBIOSv2/util/flashrom/m29f400bt.c 2007-05-09 10:17:44 UTC (rev 2643)
@@ -32,24 +32,23 @@
volatile uint8_t *bios = flash->virt_addr;
uint8_t id1, id2;
- *(volatile uint8_t *) (bios + 0xAAA) = 0xAA;
- *(volatile uint8_t *) (bios + 0x555) = 0x55;
- *(volatile uint8_t *) (bios + 0xAAA) = 0x90;
+ *(volatile uint8_t *)(bios + 0xAAA) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x555) = 0x55;
+ *(volatile uint8_t *)(bios + 0xAAA) = 0x90;
myusec_delay(10);
- id1 = *(volatile uint8_t *) bios;
- id2 = *(volatile uint8_t *) (bios + 0x02);
+ id1 = *(volatile uint8_t *)bios;
+ id2 = *(volatile uint8_t *)(bios + 0x02);
- *(volatile uint8_t *) (bios + 0xAAA) = 0xAA;
- *(volatile uint8_t *) (bios + 0x555) = 0x55;
- *(volatile uint8_t *) (bios + 0xAAA) = 0xF0;
+ *(volatile uint8_t *)(bios + 0xAAA) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x555) = 0x55;
+ *(volatile uint8_t *)(bios + 0xAAA) = 0xF0;
myusec_delay(10);
printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, id1, id2);
-
if (id1 == flash->manufacture_id && id2 == flash->model_id)
return 1;
@@ -60,13 +59,13 @@
{
volatile uint8_t *bios = flash->virt_addr;
- *(volatile uint8_t *) (bios + 0xAAA) = 0xAA;
- *(volatile uint8_t *) (bios + 0x555) = 0x55;
- *(volatile uint8_t *) (bios + 0xAAA) = 0x80;
+ *(volatile uint8_t *)(bios + 0xAAA) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x555) = 0x55;
+ *(volatile uint8_t *)(bios + 0xAAA) = 0x80;
- *(volatile uint8_t *) (bios + 0xAAA) = 0xAA;
- *(volatile uint8_t *) (bios + 0x555) = 0x55;
- *(volatile uint8_t *) (bios + 0xAAA) = 0x10;
+ *(volatile uint8_t *)(bios + 0xAAA) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x555) = 0x55;
+ *(volatile uint8_t *)(bios + 0xAAA) = 0x10;
myusec_delay(10);
toggle_ready_m29f400bt(bios);
@@ -77,12 +76,12 @@
int block_erase_m29f400bt(volatile uint8_t *bios, volatile uint8_t *dst)
{
- *(volatile uint8_t *) (bios + 0xAAA) = 0xAA;
- *(volatile uint8_t *) (bios + 0x555) = 0x55;
- *(volatile uint8_t *) (bios + 0xAAA) = 0x80;
+ *(volatile uint8_t *)(bios + 0xAAA) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x555) = 0x55;
+ *(volatile uint8_t *)(bios + 0xAAA) = 0x80;
- *(volatile uint8_t *) (bios + 0xAAA) = 0xAA;
- *(volatile uint8_t *) (bios + 0x555) = 0x55;
+ *(volatile uint8_t *)(bios + 0xAAA) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x555) = 0x55;
//*(volatile uint8_t *) (bios + 0xAAA) = 0x10;
*dst = 0x30;
@@ -95,8 +94,8 @@
int write_m29f400bt(struct flashchip *flash, uint8_t *buf)
{
int i;
- int total_size = flash->total_size * 1024, page_size =
- flash->page_size;
+ int total_size = flash->total_size * 1024;
+ int page_size = flash->page_size;
volatile uint8_t *bios = flash->virt_addr;
//erase_m29f400bt (flash);
@@ -122,29 +121,24 @@
block_erase_m29f400bt(bios, bios + i * page_size);
write_page_m29f400bt(bios, buf + i * page_size,
bios + i * page_size, page_size);
- printf
- ("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
+ printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
}
printf("%04d at address: 0x%08x\n", 7, 0x70000);
block_erase_m29f400bt(bios, bios + 0x70000);
- write_page_m29f400bt(bios, buf + 0x70000, bios + 0x70000,
- 32 * 1024);
+ write_page_m29f400bt(bios, buf + 0x70000, bios + 0x70000, 32 * 1024);
printf("%04d at address: 0x%08x\n", 8, 0x78000);
block_erase_m29f400bt(bios, bios + 0x78000);
- write_page_m29f400bt(bios, buf + 0x78000, bios + 0x78000,
- 8 * 1024);
+ write_page_m29f400bt(bios, buf + 0x78000, bios + 0x78000, 8 * 1024);
printf("%04d at address: 0x%08x\n", 9, 0x7a000);
block_erase_m29f400bt(bios, bios + 0x7a000);
- write_page_m29f400bt(bios, buf + 0x7a000, bios + 0x7a000,
- 8 * 1024);
+ write_page_m29f400bt(bios, buf + 0x7a000, bios + 0x7a000, 8 * 1024);
printf("%04d at address: 0x%08x\n", 10, 0x7c000);
block_erase_m29f400bt(bios, bios + 0x7c000);
- write_page_m29f400bt(bios, buf + 0x7c000, bios + 0x7c000,
- 16 * 1024);
+ write_page_m29f400bt(bios, buf + 0x7c000, bios + 0x7c000, 16 * 1024);
printf("\n");
//protect_m29f400bt (bios);
@@ -174,23 +168,19 @@
*********************************/
printf("%04d at address: 0x%08x\n", 7, 0x00000);
block_erase_m29f400bt(bios, bios + 0x00000);
- write_page_m29f400bt(bios, buf + 0x00000, bios + 0x00000,
- 64 * 1024);
+ write_page_m29f400bt(bios, buf + 0x00000, bios + 0x00000, 64 * 1024);
printf("%04d at address: 0x%08x\n", 7, 0x10000);
block_erase_m29f400bt(bios, bios + 0x10000);
- write_page_m29f400bt(bios, buf + 0x10000, bios + 0x10000,
- 64 * 1024);
+ write_page_m29f400bt(bios, buf + 0x10000, bios + 0x10000, 64 * 1024);
printf("%04d at address: 0x%08x\n", 7, 0x20000);
block_erase_m29f400bt(bios, bios + 0x20000);
- write_page_m29f400bt(bios, buf + 0x20000, bios + 0x20000,
- 64 * 1024);
+ write_page_m29f400bt(bios, buf + 0x20000, bios + 0x20000, 64 * 1024);
printf("%04d at address: 0x%08x\n", 7, 0x30000);
block_erase_m29f400bt(bios, bios + 0x30000);
- write_page_m29f400bt(bios, buf + 0x30000, bios + 0x30000,
- 64 * 1024);
+ write_page_m29f400bt(bios, buf + 0x30000, bios + 0x30000, 64 * 1024);
printf("\n");
//protect_m29f400bt (bios);
Modified: trunk/LinuxBIOSv2/util/flashrom/m29f400bt.h
===================================================================
--- trunk/LinuxBIOSv2/util/flashrom/m29f400bt.h 2007-05-09 08:11:52 UTC (rev 2642)
+++ trunk/LinuxBIOSv2/util/flashrom/m29f400bt.h 2007-05-09 10:17:44 UTC (rev 2643)
@@ -5,10 +5,10 @@
extern int probe_m29f400bt(struct flashchip *flash);
extern int erase_m29f400bt(struct flashchip *flash);
-extern int block_erase_m29f400bt(volatile uint8_t *bios, volatile uint8_t *dst);
+extern int block_erase_m29f400bt(volatile uint8_t *bios,
+ volatile uint8_t *dst);
extern int write_m29f400bt(struct flashchip *flash, uint8_t *buf);
-extern int write_linuxbios_m29f400bt(struct flashchip *flash,
- uint8_t *buf);
+extern int write_linuxbios_m29f400bt(struct flashchip *flash, uint8_t *buf);
extern __inline__ void toggle_ready_m29f400bt(volatile uint8_t *dst)
{
@@ -44,23 +44,24 @@
extern __inline__ void protect_m29f400bt(volatile uint8_t *bios)
{
- *(volatile uint8_t *) (bios + 0xAAA) = 0xAA;
- *(volatile uint8_t *) (bios + 0x555) = 0x55;
- *(volatile uint8_t *) (bios + 0xAAA) = 0xA0;
+ *(volatile uint8_t *)(bios + 0xAAA) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x555) = 0x55;
+ *(volatile uint8_t *)(bios + 0xAAA) = 0xA0;
usleep(200);
}
-extern __inline__ void write_page_m29f400bt(volatile uint8_t *bios, uint8_t *src,
+extern __inline__ void write_page_m29f400bt(volatile uint8_t *bios,
+ uint8_t *src,
volatile uint8_t *dst,
int page_size)
{
int i;
for (i = 0; i < page_size; i++) {
- *(volatile uint8_t *) (bios + 0xAAA) = 0xAA;
- *(volatile uint8_t *) (bios + 0x555) = 0x55;
- *(volatile uint8_t *) (bios + 0xAAA) = 0xA0;
+ *(volatile uint8_t *)(bios + 0xAAA) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x555) = 0x55;
+ *(volatile uint8_t *)(bios + 0xAAA) = 0xA0;
/* transfer data from source to destination */
*dst = *src;
Modified: trunk/LinuxBIOSv2/util/flashrom/msys_doc.c
===================================================================
--- trunk/LinuxBIOSv2/util/flashrom/msys_doc.c 2007-05-09 08:11:52 UTC (rev 2642)
+++ trunk/LinuxBIOSv2/util/flashrom/msys_doc.c 2007-05-09 10:17:44 UTC (rev 2643)
@@ -19,27 +19,18 @@
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-
-
#include <stdio.h>
#include <unistd.h>
#include "flash.h"
#include "msys_doc.h"
#include "debug.h"
-
-
-
static int doc_wait(volatile uint8_t *bios, int timeout);
static uint8_t doc_read_chipid(volatile uint8_t *bios);
static uint8_t doc_read_docstatus(volatile uint8_t *bios);
static uint8_t doc_read_cdsncontrol(volatile uint8_t *bios);
static void doc_write_cdsncontrol(volatile uint8_t *bios, uint8_t data);
-
-
-
-
int probe_md2802(struct flashchip *flash)
{
volatile uint8_t *bios = flash->virt_addr;
@@ -72,11 +63,9 @@
printf("%s: switching off write protection ...\n", __FUNCTION__);
doc_write_cdsncontrol(bios, doc_read_cdsncontrol(bios) & (~0x08));
- printf("%s: switching off write protection ... done\n",
- __FUNCTION__);
+ printf("%s: switching off write protection ... done\n", __FUNCTION__);
printf("%s:\n", __FUNCTION__);
-
chipid = doc_read_chipid(bios);
#ifndef MSYSTEMS_DOC_NO_55AA_CHECKING
id_0x55 = doc_read(bios, IPL_0x0000);
@@ -140,9 +129,8 @@
printf("\n%s: toggle result: %d/%d\n", __FUNCTION__, toggle_a,
toggle_b);
- if (chipid == flash->model_id
- && ((toggle_a == 5 && toggle_b == 0)
- || (toggle_a == 0 && toggle_b == 5))
+ if (chipid == flash->model_id && ((toggle_a == 5 && toggle_b == 0)
+ || (toggle_a == 0 && toggle_b == 5))
#ifndef MSYSTEMS_DOC_NO_55AA_CHECKING
&& id_0x55 == 0x55 && id_0xAA == 0xaa
#endif /* !MSYSTEMS_DOC_NO_55AA_CHECKING */
@@ -153,37 +141,31 @@
return (0);
} /* int probe_md2802(struct flashchip *flash) */
-
-
int read_md2802(struct flashchip *flash, uint8_t *buf)
{
return (0);
} /* int read_md2802(struct flashchip *flash, uint8_t *buf) */
-
-
int erase_md2802(struct flashchip *flash)
{
volatile uint8_t *bios = flash->virt_addr;
return (1);
- *(volatile uint8_t *) (bios + 0x5555) = 0xAA;
- *(volatile uint8_t *) (bios + 0x2AAA) = 0x55;
- *(volatile uint8_t *) (bios + 0x5555) = 0x80;
+ *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
+ *(volatile uint8_t *)(bios + 0x5555) = 0x80;
- *(volatile uint8_t *) (bios + 0x5555) = 0xAA;
- *(volatile uint8_t *) (bios + 0x2AAA) = 0x55;
- *(volatile uint8_t *) (bios + 0x5555) = 0x10;
+ *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
+ *(volatile uint8_t *)(bios + 0x5555) = 0x10;
} /* int erase_md2802(struct flashchip *flash) */
-
-
int write_md2802(struct flashchip *flash, uint8_t *buf)
{
int i;
- int total_size = flash->total_size * 1024, page_size =
- flash->page_size;
+ int total_size = flash->total_size * 1024;
+ int page_size = flash->page_size;
volatile uint8_t *bios = flash->virt_addr;
return (1);
@@ -205,11 +187,6 @@
return 0;
} /* int write_md2802(struct flashchip *flash, uint8_t *buf) */
-
-
-
-
-
/*
wait timeout msec for doc to become ready
return:
@@ -237,8 +214,6 @@
return (0);
} /* static int doc_wait(volatile uint8_t *bios, int timeout) */
-
-
static uint8_t doc_read_docstatus(volatile uint8_t *bios)
{
doc_read(bios, CDSNSlowIO);
@@ -247,8 +222,6 @@
return (doc_read(bios, _DOCStatus));
} /* static uint8_t doc_read_docstatus(volatile uint8_t *bios) */
-
-
static uint8_t doc_read_chipid(volatile uint8_t *bios)
{
doc_read(bios, CDSNSlowIO);
@@ -257,8 +230,6 @@
return (doc_read(bios, _ChipID));
} /* static uint8_t doc_read_chipid(volatile uint8_t *bios) */
-
-
static uint8_t doc_read_cdsncontrol(volatile uint8_t *bios)
{
uint8_t value;
@@ -273,8 +244,6 @@
return (value);
} /* static uint8_t doc_read_chipid(volatile char *bios) */
-
-
static void doc_write_cdsncontrol(volatile uint8_t *bios, uint8_t data)
{
doc_write(data, bios, _CDSNControl);
Modified: trunk/LinuxBIOSv2/util/flashrom/sharplhf00l04.c
===================================================================
--- trunk/LinuxBIOSv2/util/flashrom/sharplhf00l04.c 2007-05-09 08:11:52 UTC (rev 2642)
+++ trunk/LinuxBIOSv2/util/flashrom/sharplhf00l04.c 2007-05-09 10:17:44 UTC (rev 2643)
@@ -51,9 +51,9 @@
uint8_t id1, id2;
#if 0
- *(volatile uint8_t *) (bios + 0x5555) = 0xAA;
- *(volatile uint8_t *) (bios + 0x2AAA) = 0x55;
- *(volatile uint8_t *) (bios + 0x5555) = 0x90;
+ *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
+ *(volatile uint8_t *)(bios + 0x5555) = 0x90;
#endif
*bios = 0xff;
@@ -61,13 +61,13 @@
*bios = 0x90;
myusec_delay(10);
- id1 = *(volatile uint8_t *) bios;
- id2 = *(volatile uint8_t *) (bios + 0x01);
+ id1 = *(volatile uint8_t *)bios;
+ id2 = *(volatile uint8_t *)(bios + 0x01);
#if 1
- *(volatile uint8_t *) (bios + 0x5555) = 0xAA;
- *(volatile uint8_t *) (bios + 0x2AAA) = 0x55;
- *(volatile uint8_t *) (bios + 0x5555) = 0xF0;
+ *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
+ *(volatile uint8_t *)(bios + 0x5555) = 0xF0;
#endif
myusec_delay(10);
@@ -86,7 +86,8 @@
}
flash->virt_addr_2 = bios;
- printf("bios %p, *bios 0x%x, bios[1] 0x%x\n", bios, *bios, bios[1]);
+ printf("bios %p, *bios 0x%x, bios[1] 0x%x\n", bios, *bios,
+ bios[1]);
return 1;
}
@@ -101,7 +102,7 @@
*bios = 0x70;
if ((*bios & 0x80) == 0) { // it's busy
- while ((*bios & 0x80) == 0);
+ while ((*bios & 0x80) == 0) ;
}
status = *bios;
@@ -111,21 +112,20 @@
*bios = 0x90;
myusec_delay(10);
- id1 = *(volatile uint8_t *) bios;
- id2 = *(volatile uint8_t *) (bios + 0x01);
+ id1 = *(volatile uint8_t *)bios;
+ id2 = *(volatile uint8_t *)(bios + 0x01);
// this is needed to jam it out of "read id" mode
- *(volatile uint8_t *) (bios + 0x5555) = 0xAA;
- *(volatile uint8_t *) (bios + 0x2AAA) = 0x55;
- *(volatile uint8_t *) (bios + 0x5555) = 0xF0;
+ *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
+ *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
+ *(volatile uint8_t *)(bios + 0x5555) = 0xF0;
return status;
}
int erase_lhf00l04_block(struct flashchip *flash, int offset)
{
volatile uint8_t *bios = flash->virt_addr + offset;
- volatile uint8_t *wrprotect =
- flash->virt_addr_2 + offset + 2;
+ volatile uint8_t *wrprotect = flash->virt_addr_2 + offset + 2;
uint8_t status;
// clear status register
@@ -140,8 +140,8 @@
printf("write protect is 0x%x\n", *(wrprotect));
// now start it
- *(volatile uint8_t *) (bios) = 0x20;
- *(volatile uint8_t *) (bios) = 0xd0;
+ *(volatile uint8_t *)(bios) = 0x20;
+ *(volatile uint8_t *)(bios) = 0xd0;
myusec_delay(10);
// now let's see what the register is
status = wait_lhf00l04(flash->virt_addr);
@@ -162,8 +162,8 @@
return (0);
}
-void write_page_lhf00l04(volatile uint8_t *bios, uint8_t *src, volatile uint8_t *dst,
- int page_size)
+void write_page_lhf00l04(volatile uint8_t *bios, uint8_t *src,
+ volatile uint8_t *dst, int page_size)
{
int i;
@@ -179,8 +179,8 @@
int write_lhf00l04(struct flashchip *flash, uint8_t *buf)
{
int i;
- int total_size = flash->total_size * 1024, page_size =
- flash->page_size;
+ int total_size = flash->total_size * 1024;
+ int page_size = flash->page_size;
volatile uint8_t *bios = flash->virt_addr;
erase_lhf00l04(flash);
@@ -192,9 +192,8 @@
for (i = 0; i < total_size / page_size; i++) {
printf("%04d at address: 0x%08x", i, i * page_size);
write_page_lhf00l04(bios, buf + i * page_size,
- bios + i * page_size, page_size);
- printf
- ("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
+ bios + i * page_size, page_size);
+ printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
}
printf("\n");
protect_lhf00l04(bios);
Modified: trunk/LinuxBIOSv2/util/flashrom/sst28sf040.c
===================================================================
--- trunk/LinuxBIOSv2/util/flashrom/sst28sf040.c 2007-05-09 08:11:52 UTC (rev 2642)
+++ trunk/LinuxBIOSv2/util/flashrom/sst28sf040.c 2007-05-09 10:17:44 UTC (rev 2643)
@@ -43,13 +43,13 @@
/* ask compiler not to optimize this */
volatile uint8_t tmp;
- tmp = *(volatile uint8_t *) (bios + 0x1823);
- tmp = *(volatile uint8_t *) (bios + 0x1820);
- tmp = *(volatile uint8_t *) (bios + 0x1822);
- tmp = *(volatile uint8_t *) (bios + 0x0418);
- tmp = *(volatile uint8_t *) (bios + 0x041B);
- tmp = *(volatile uint8_t *) (bios + 0x0419);
- tmp = *(volatile uint8_t *) (bios + 0x040A);
+ tmp = *(volatile uint8_t *)(bios + 0x1823);
+ tmp = *(volatile uint8_t *)(bios + 0x1820);
+ tmp = *(volatile uint8_t *)(bios + 0x1822);
+ tmp = *(volatile uint8_t *)(bios + 0x0418);
+ tmp = *(volatile uint8_t *)(bios + 0x041B);
+ tmp = *(volatile uint8_t *)(bios + 0x0419);
+ tmp = *(volatile uint8_t *)(bios + 0x040A);
}
static __inline__ void unprotect_28sf040(volatile uint8_t *bios)
@@ -57,13 +57,13 @@
/* ask compiler not to optimize this */
volatile uint8_t tmp;
- tmp = *(volatile uint8_t *) (bios + 0x1823);
- tmp = *(volatile uint8_t *) (bios + 0x1820);
- tmp = *(volatile uint8_t *) (bios + 0x1822);
- tmp = *(volatile uint8_t *) (bios + 0x0418);
- tmp = *(volatile uint8_t *) (bios + 0x041B);
- tmp = *(volatile uint8_t *) (bios + 0x0419);
- tmp = *(volatile uint8_t *) (bios + 0x041A);
+ tmp = *(volatile uint8_t *)(bios + 0x1823);
+ tmp = *(volatile uint8_t *)(bios + 0x1820);
+ tmp = *(volatile uint8_t *)(bios + 0x1822);
+ tmp = *(volatile uint8_t *)(bios + 0x0418);
+ tmp = *(volatile uint8_t *)(bios + 0x041B);
+ tmp = *(volatile uint8_t *)(bios + 0x0419);
+ tmp = *(volatile uint8_t *)(bios + 0x041A);
}
static __inline__ int erase_sector_28sf040(volatile uint8_t *bios,
@@ -116,9 +116,9 @@
*bios = READ_ID;
myusec_delay(10);
- id1 = *(volatile uint8_t *) bios;
+ id1 = *(volatile uint8_t *)bios;
myusec_delay(10);
- id2 = *(volatile uint8_t *) (bios + 0x01);
+ id2 = *(volatile uint8_t *)(bios + 0x01);
*bios = RESET;
myusec_delay(10);
@@ -150,8 +150,8 @@
int write_28sf040(struct flashchip *flash, uint8_t *buf)
{
int i;
- int total_size = flash->total_size * 1024, page_size =
- flash->page_size;
+ int total_size = flash->total_size * 1024;
+ int page_size = flash->page_size;
volatile uint8_t *bios = flash->virt_addr;
unprotect_28sf040(bios);
Modified: trunk/LinuxBIOSv2/util/flashrom/sst49lfxxxc.c
===================================================================
--- trunk/LinuxBIOSv2/util/flashrom/sst49lfxxxc.c 2007-05-09 08:11:52 UTC (rev 2642)
+++ trunk/LinuxBIOSv2/util/flashrom/sst49lfxxxc.c 2007-05-09 10:17:44 UTC (rev 2643)
@@ -50,9 +50,8 @@
#define STATUS_ESS (1 << 6)
#define STATUS_WSMS (1 << 7)
-
static __inline__ int write_lockbits_49lfxxxc(volatile uint8_t *bios, int size,
- unsigned char bits)
+ unsigned char bits)
{
int i, left = size;
unsigned long address;
@@ -63,24 +62,23 @@
*(bios + (i * 65536) + 2) = bits;
}
address = i * 65536;
- //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) );
+ //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) );
*(bios + address + 2) = bits;
address += 32768;
- //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) );
+ //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) );
*(bios + address + 2) = bits;
address += 8192;
- //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) );
+ //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) );
*(bios + address + 2) = bits;
address += 8192;
- //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) );
+ //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) );
*(bios + address + 2) = bits;
-
return (0);
}
static __inline__ int erase_sector_49lfxxxc(volatile uint8_t *bios,
- unsigned long address)
+ unsigned long address)
{
unsigned char status;
@@ -88,21 +86,21 @@
*(bios + address) = ERASE;
do {
- status = *bios;
+ status = *bios;
if (status & (STATUS_ESS | STATUS_BPS)) {
- printf("sector erase FAILED at address=0x%08lx status=0x%01x\n", (unsigned long)bios + address, status);
+ printf("sector erase FAILED at address=0x%08lx status=0x%01x\n", (unsigned long)bios + address, status);
*bios = CLEAR_STATUS;
- return(-1);
+ return (-1);
}
- } while (!(status & STATUS_WSMS));
+ } while (!(status & STATUS_WSMS));
return (0);
}
static __inline__ int write_sector_49lfxxxc(volatile uint8_t *bios,
- uint8_t *src,
- volatile uint8_t *dst,
- unsigned int page_size)
+ uint8_t *src,
+ volatile uint8_t *dst,
+ unsigned int page_size)
{
int i;
unsigned char status;
@@ -122,9 +120,9 @@
do {
status = *bios;
if (status & (STATUS_ESS | STATUS_BPS)) {
- printf("sector write FAILED at address=0x%08lx status=0x%01x\n", (unsigned long)dst, status);
+ printf("sector write FAILED at address=0x%08lx status=0x%01x\n", (unsigned long)dst, status);
*bios = CLEAR_STATUS;
- return(-1);
+ return (-1);
}
} while (!(status & STATUS_WSMS));
}
@@ -141,8 +139,8 @@
*bios = RESET;
*bios = READ_ID;
- id1 = *(volatile uint8_t *) bios;
- id2 = *(volatile uint8_t *) (bios + 0x01);
+ id1 = *(volatile uint8_t *)bios;
+ id2 = *(volatile uint8_t *)(bios + 0x01);
*bios = RESET;
@@ -170,8 +168,8 @@
write_lockbits_49lfxxxc(bios2, total_size, 0);
for (i = 0; i < total_size; i += flash->page_size)
- if (erase_sector_49lfxxxc(bios, i) != 0 )
- return (-1);
+ if (erase_sector_49lfxxxc(bios, i) != 0)
+ return (-1);
*bios = RESET;
return (0);
@@ -180,11 +178,10 @@
int write_49lfxxxc(struct flashchip *flash, uint8_t *buf)
{
int i;
- int total_size = flash->total_size * 1024, page_size =
- flash->page_size;
+ int total_size = flash->total_size * 1024;
+ int page_size = flash->page_size;
volatile uint8_t *bios = flash->virt_addr;
-
write_lockbits_49lfxxxc(flash->virt_addr_2, total_size, 0);
printf("Programming Page: ");
for (i = 0; i < total_size / page_size; i++) {
@@ -194,7 +191,7 @@
/* write to the sector */
printf("%04d at address: 0x%08x", i, i * page_size);
write_sector_49lfxxxc(bios, buf + i * page_size,
- bios + i * page_size, page_size);
+ bios + i * page_size, page_size);
printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
}
printf("\n");
1
0

[LinuxBIOS] [PATCH] SIO PC87338 support, 440bx bug fix, VMWare mainboard support
by Ceri Coburn May 9, 2007
by Ceri Coburn May 9, 2007
May 9, 2007
Added initial support for the national semiconductor's PC87338 Super I/O
Fixed bug in northbridge.c for the 440bx - calculating top of RAM was
incorrect
Added initial support for VMWare workstation.
Separated DRB register setting into separate function
Now setting PAM registers for 440bx to exclude majority of BIOS area
VMware Does not fully boot a payload yet
Signed-off-by: Ceri Coburn ceri.coburn(a)gmail.com
---
Note on VMWare - The build of the vmware mainboard rom will not work
directly out of the box with any release of Workstation because ESCD
configuration information it copied into the loaded ROM overwriting portions
of the bios code. Ideally a hole needs to be created for this, or an update
from VMWare to allow the position of ESCD config to be specified or turned
off.
I had to separate the DRB register setting from the sdram_set_spd_registers
function because VMWare pre populates the DRB registers within the
configuration space because it hasn't emulated SPD for the RAM correctly (as
far as I can tell). So any 440bx based
Other issues with VMWare are that it has issues executing the SCSI
controller ROM ("NOT IMPLEMENTED" assertion error within VMWare, i'm
guessing something in the emulator code is executing, which VMWare hasn't
implemented), so remove SCSI controllers from the virtual machine config,
and that FILO times out when reading sector 0 of the IDE disk, could be some
config error in the southbridge config for IDE.
Ceri.
2
2
Dear LinuxBIOS readers!
This is the automated build check service of LinuxBIOS.
The developer "uwe" checked in revision 2642 to
the LinuxBIOS source repository and caused the following
changes:
Change Log:
This patch uses auto.c from Uwe's tyan s1846 for both boards, with some
minor changes, to bring them up to par. It also should remove (but might
just clean out) the irq_tables.c from both boards, because they were
just copied from Via Epia to begin with, and weren't usable. As far as I
can tell, these are the only changes needed to the targets for now,
aside from fixups to reset.c when the time comes. Both have been build
tested, but not checked on hardware since I don't have it. I have left
Uwe as the copyright holder since the only changes I've made are trivial.
Signed-off-by: Corey Osgood <corey_osgood(a)verizon.net>
Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de>
Build Log:
Compilation of arima:hdama is still broken
Compilation of artecgroup:dbe61 is still broken
Configuration of asi:mb_5blmp is still broken
Compilation of ibm:e325 is still broken
Compilation of ibm:e326 is still broken
Compilation of iwill:dk8s2 is still broken
Compilation of iwill:dk8x is still broken
If something broke during this checkin please be a pain
in uwe's neck until the issue is fixed.
If this issue is not fixed within 24h the revision will
be backed out.
Yours truely,
LinuxBIOS automatic build system
1
0

[LinuxBIOS] r2642 - in trunk/LinuxBIOSv2/src/mainboard: asus/p2b bitworks/ims
by svn@openbios.org May 9, 2007
by svn@openbios.org May 9, 2007
May 9, 2007
Author: uwe
Date: 2007-05-09 10:11:52 +0200 (Wed, 09 May 2007)
New Revision: 2642
Removed:
trunk/LinuxBIOSv2/src/mainboard/asus/p2b/irq_tables.c
trunk/LinuxBIOSv2/src/mainboard/bitworks/ims/irq_tables.c
Modified:
trunk/LinuxBIOSv2/src/mainboard/asus/p2b/auto.c
trunk/LinuxBIOSv2/src/mainboard/bitworks/ims/auto.c
Log:
This patch uses auto.c from Uwe's tyan s1846 for both boards, with some
minor changes, to bring them up to par. It also should remove (but might
just clean out) the irq_tables.c from both boards, because they were
just copied from Via Epia to begin with, and weren't usable. As far as I
can tell, these are the only changes needed to the targets for now,
aside from fixups to reset.c when the time comes. Both have been build
tested, but not checked on hardware since I don't have it. I have left
Uwe as the copyright holder since the only changes I've made are trivial.
Signed-off-by: Corey Osgood <corey_osgood(a)verizon.net>
Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de>
Modified: trunk/LinuxBIOSv2/src/mainboard/asus/p2b/auto.c
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/asus/p2b/auto.c 2007-05-09 07:52:14 UTC (rev 2641)
+++ trunk/LinuxBIOSv2/src/mainboard/asus/p2b/auto.c 2007-05-09 08:11:52 UTC (rev 2642)
@@ -1,3 +1,23 @@
+/*
+ * This file is part of the LinuxBIOS project.
+ *
+ * Copyright (C) 2007 Uwe Hermann <uwe(a)hermann-uwe.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
#define ASSEMBLY 1
#include <stdint.h>
@@ -17,8 +37,6 @@
#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-/*
- */
void udelay(int usecs)
{
int i;
@@ -29,82 +47,41 @@
#include "debug.c"
#include "lib/delay.c"
-
-static void memreset_setup(void)
-{
-}
-
-/*
- static void memreset(int controllers, const struct mem_controller *ctrl)
- {
- }
-*/
-
-
-static void enable_mainboard_devices(void)
-{
- device_t dev;
- /* dev 0 for southbridge */
-
- dev = pci_locate_device(PCI_ID(0x1106,0x8231), 0);
-
- if (dev == PCI_DEV_INVALID) {
- die("Southbridge not found!!!\n");
- }
- pci_write_config8(dev, 0x50, 7);
- pci_write_config8(dev, 0x51, 0xff);
-#if 0
- // This early setup switches IDE into compatibility mode before PCI gets
- // // a chance to assign I/Os
- // movl $CONFIG_ADDR(0, 0x89, 0x42), %eax
- // // movb $0x09, %dl
- // movb $0x00, %dl
- // PCI_WRITE_CONFIG_BYTE
- //
-#endif
- /* we do this here as in V2, we can not yet do raw operations
- * to pci!
- */
- dev += 0x100; /* ICKY */
-
- pci_write_config8(dev, 0x42, 0);
-}
-
static void enable_shadow_ram(void)
{
- device_t dev = 0; /* no need to look up 0:0.0 */
- unsigned char shadowreg;
- /* dev 0 for southbridge */
- shadowreg = pci_read_config8(dev, 0x63);
+ uint8_t shadowreg;
+ /* dev 0 for northbridge */
+ shadowreg = pci_read_config8(0, 0x59);
/* 0xf0000-0xfffff */
shadowreg |= 0x30;
- pci_write_config8(dev, 0x63, shadowreg);
+ pci_write_config8(0, 0x59, shadowreg);
}
+/* TODO: fix raminit.c to use smbus_read_byte */
static inline int spd_read_byte(unsigned device, unsigned address)
{
- unsigned char c;
+ uint8_t c;
c = smbus_read_byte(device, address);
return c;
}
-
#include "northbridge/intel/i440bx/raminit.c"
#include "northbridge/intel/i440bx/debug.c"
#include "sdram/generic_sdram.c"
static void main(unsigned long bist)
{
- static const struct mem_controller cpu[] = {
+ static const struct mem_controller memctrl[] = {
{
+ .d0 = PCI_DEV(0, 0, 0),
.channel0 = {
- (0xa << 3) | 0,
- (0xa << 3) | 1,
- (0xa << 3) | 2, (0xa << 3) | 3,
- },
+ (0xa << 3) | 0,
+ (0xa << 3) | 1,
+ (0xa << 3) | 2,
+ (0xa << 3) | 3,
+ },
}
};
- unsigned long x;
if (bist == 0) {
early_mtrr_init();
@@ -116,39 +93,27 @@
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
+ enable_shadow_ram();
+
enable_smbus();
- dump_spd_registers(&cpu[0]);
-#if 0
- enable_shadow_ram();
- /*
- memreset_setup();
- this is way more generic than we need.
- sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu);
- */
- sdram_set_registers((const struct mem_controller *) 0);
- sdram_set_spd_registers((const struct mem_controller *) 0);
- sdram_enable(0, (const struct mem_controller *) 0);
-#endif
-
- /* Check all of memory */
-#if 0
- ram_check(0x00000000, msr.lo);
-#endif
-#if 0
- static const struct {
- unsigned long lo, hi;
- } check_addrs[] = {
- /* Check 16MB of memory @ 0*/
- { 0x00000000, 0x01000000 },
-#if TOTAL_CPUS > 1
- /* Check 16MB of memory @ 2GB */
- { 0x80000000, 0x81000000 },
-#endif
- };
- int i;
- for(i = 0; i < sizeof(check_addrs)/sizeof(check_addrs[0]); i++) {
- ram_check(check_addrs[i].lo, check_addrs[i].hi);
- }
-#endif
+ dump_spd_registers(&memctrl[0]);
+
+ sdram_initialize(sizeof(memctrl) / sizeof(memctrl[0]), memctrl);
+
+ /* Check whether RAM is working.
+ *
+ * Do _not_ check the area from 640 KB - 1 MB, as that's not really
+ * RAM, but rather reserved for various other things:
+ *
+ * - 640 KB - 768 KB: Video Buffer Area
+ * - 768 KB - 896 KB: Expansion Area
+ * - 896 KB - 960 KB: Extended System BIOS Area
+ * - 960 KB - 1 MB: Memory (BIOS Area) - System BIOS Area
+ *
+ * Trying to check these areas will fail.
+ */
+ /* TODO: This is currently hardcoded to check 64 MB. */
+ ram_check(0x00000000, 0x0009ffff); /* 0 - 640 KB */
+ ram_check(0x00100000, 0x007c0000); /* 1 MB - 64 MB */
}
Deleted: trunk/LinuxBIOSv2/src/mainboard/asus/p2b/irq_tables.c
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/asus/p2b/irq_tables.c 2007-05-09 07:52:14 UTC (rev 2641)
+++ trunk/LinuxBIOSv2/src/mainboard/asus/p2b/irq_tables.c 2007-05-09 08:11:52 UTC (rev 2642)
@@ -1,32 +0,0 @@
-/* This file was generated by getpir.c, do not modify!
- (but if you do, please run checkpir on it to verify)
- Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
-
- Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
-*/
-
-#include <arch/pirq_routing.h>
-
-const struct irq_routing_table intel_irq_routing_table = {
- PIRQ_SIGNATURE, /* u32 signature */
- PIRQ_VERSION, /* u16 version */
- 32+16*5, /* there can be total 5 devices on the bus */
- 0, /* Where the interrupt router lies (bus) */
- 0x88, /* Where the interrupt router lies (dev) */
- 0x1c20, /* IRQs devoted exclusively to PCI usage */
- 0x1106, /* Vendor */
- 0x8231, /* Device */
- 0, /* Crap (miniport) */
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
- 0x5e, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */
- {
- /* 8231 ethernet */
- {0,0x90, {{0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}}, 0x1, 0},
- /* 8231 internal */
- {0,0x88, {{0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}}, 0x2, 0},
- /* PCI slot */
- {0,0xa0, {{0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}, {0x2, 0xdeb8}}, 0, 0},
- {0,0x50, {{0x4, 0xdeb8}, {0x3, 0xdeb8}, {0x2, 0xdeb8}, {0x1, 0xdeb8}}, 0x3, 0},
- {0,0x98, {{0x4, 0xdeb8}, {0x3, 0xdeb8}, {0x2, 0xdeb8}, {0x1, 0xdeb8}}, 0x4, 0},
- }
-};
Modified: trunk/LinuxBIOSv2/src/mainboard/bitworks/ims/auto.c
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/bitworks/ims/auto.c 2007-05-09 07:52:14 UTC (rev 2641)
+++ trunk/LinuxBIOSv2/src/mainboard/bitworks/ims/auto.c 2007-05-09 08:11:52 UTC (rev 2642)
@@ -17,8 +17,6 @@
#define SERIAL_DEV PNP_DEV(0x2e, PC87351_SP1)
-/*
- */
void udelay(int usecs)
{
int i;
@@ -29,84 +27,41 @@
#include "debug.c"
#include "lib/delay.c"
-
-static void memreset_setup(void)
-{
-}
-
-/*
- static void memreset(int controllers, const struct mem_controller *ctrl)
- {
- }
-*/
-
-
-static void enable_mainboard_devices(void)
-{
- device_t dev;
- /* dev 0 for southbridge */
-
- dev = pci_locate_device(PCI_ID(0x1106,0x8231), 0);
-
- if (dev == PCI_DEV_INVALID) {
- die("Southbridge not found!!!\n");
- }
- pci_write_config8(dev, 0x50, 7);
- pci_write_config8(dev, 0x51, 0xff);
-#if 0
- // This early setup switches IDE into compatibility mode before PCI gets
- // // a chance to assign I/Os
- // movl $CONFIG_ADDR(0, 0x89, 0x42), %eax
- // // movb $0x09, %dl
- // movb $0x00, %dl
- // PCI_WRITE_CONFIG_BYTE
- //
-#endif
- /* we do this here as in V2, we can not yet do raw operations
- * to pci!
- */
- dev += 0x100; /* ICKY */
-
- pci_write_config8(dev, 0x42, 0);
-}
-
static void enable_shadow_ram(void)
{
- device_t dev = 0; /* no need to look up 0:0.0 */
- unsigned char shadowreg;
- /* dev 0 for southbridge */
- shadowreg = pci_read_config8(dev, 0x63);
+ uint8_t shadowreg;
+ /* dev 0 for northbridge */
+ shadowreg = pci_read_config8(0, 0x59);
/* 0xf0000-0xfffff */
shadowreg |= 0x30;
- pci_write_config8(dev, 0x63, shadowreg);
+ pci_write_config8(0, 0x59, shadowreg);
}
+/* TODO: fix raminit.c to use smbus_read_byte */
static inline int spd_read_byte(unsigned device, unsigned address)
{
- int c;
+ uint8_t c;
c = smbus_read_byte(device, address);
return c;
}
-
#include "northbridge/intel/i440bx/raminit.c"
#include "northbridge/intel/i440bx/debug.c"
#include "sdram/generic_sdram.c"
static void main(unsigned long bist)
{
- static const struct mem_controller cpu[] = {
+ static const struct mem_controller memctrl[] = {
{
+ .d0 = PCI_DEV(0, 0, 0),
.channel0 = {
- (0xa << 3) | 0,
- (0xa << 3) | 1,
- (0xa << 3) | 2,
- (0xa << 3) | 3,
- },
+ (0xa << 3) | 0,
+ (0xa << 3) | 1,
+ (0xa << 3) | 2,
+ (0xa << 3) | 3,
+ },
}
};
- unsigned long x;
- int result;
if (bist == 0) {
early_mtrr_init();
@@ -117,46 +72,28 @@
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
-
- enable_smbus();
-/*
- result = spd_read_byte(cpu[0].channel0[0],0x03);
- print_debug("Result: ");
- print_debug_hex16(result);
- print_debug("\r\n");
-*/
- dump_spd_registers(&cpu[0]);
-#if 0
enable_shadow_ram();
- /*
- memreset_setup();
- this is way more generic than we need.
- sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu);
- */
- sdram_set_registers((const struct mem_controller *) 0);
- sdram_set_spd_registers((const struct mem_controller *) 0);
- sdram_enable(0, (const struct mem_controller *) 0);
-#endif
-
- /* Check all of memory */
-#if 0
- ram_check(0x00000000, msr.lo);
-#endif
-#if 0
- static const struct {
- unsigned long lo, hi;
- } check_addrs[] = {
- /* Check 16MB of memory @ 0*/
- { 0x00000000, 0x01000000 },
-#if TOTAL_CPUS > 1
- /* Check 16MB of memory @ 2GB */
- { 0x80000000, 0x81000000 },
-#endif
- };
- int i;
- for(i = 0; i < sizeof(check_addrs)/sizeof(check_addrs[0]); i++) {
- ram_check(check_addrs[i].lo, check_addrs[i].hi);
- }
-#endif
+
+ enable_smbus();
+
+ dump_spd_registers(&memctrl[0]);
+
+ sdram_initialize(sizeof(memctrl) / sizeof(memctrl[0]), memctrl);
+
+ /* Check whether RAM is working.
+ *
+ * Do _not_ check the area from 640 KB - 1 MB, as that's not really
+ * RAM, but rather reserved for various other things:
+ *
+ * - 640 KB - 768 KB: Video Buffer Area
+ * - 768 KB - 896 KB: Expansion Area
+ * - 896 KB - 960 KB: Extended System BIOS Area
+ * - 960 KB - 1 MB: Memory (BIOS Area) - System BIOS Area
+ *
+ * Trying to check these areas will fail.
+ */
+ /* TODO: This is currently hardcoded to check 64 MB. */
+ ram_check(0x00000000, 0x0009ffff); /* 0 - 640 KB */
+ ram_check(0x00100000, 0x007c0000); /* 1 MB - 64 MB */
}
Deleted: trunk/LinuxBIOSv2/src/mainboard/bitworks/ims/irq_tables.c
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/bitworks/ims/irq_tables.c 2007-05-09 07:52:14 UTC (rev 2641)
+++ trunk/LinuxBIOSv2/src/mainboard/bitworks/ims/irq_tables.c 2007-05-09 08:11:52 UTC (rev 2642)
@@ -1,32 +0,0 @@
-/* This file was generated by getpir.c, do not modify!
- (but if you do, please run checkpir on it to verify)
- Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
-
- Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
-*/
-
-#include <arch/pirq_routing.h>
-
-const struct irq_routing_table intel_irq_routing_table = {
- PIRQ_SIGNATURE, /* u32 signature */
- PIRQ_VERSION, /* u16 version */
- 32+16*5, /* there can be total 5 devices on the bus */
- 0, /* Where the interrupt router lies (bus) */
- 0x88, /* Where the interrupt router lies (dev) */
- 0x1c20, /* IRQs devoted exclusively to PCI usage */
- 0x1106, /* Vendor */
- 0x8231, /* Device */
- 0, /* Crap (miniport) */
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
- 0x5e, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */
- {
- /* 8231 ethernet */
- {0,0x90, {{0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}}, 0x1, 0},
- /* 8231 internal */
- {0,0x88, {{0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}}, 0x2, 0},
- /* PCI slot */
- {0,0xa0, {{0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}, {0x2, 0xdeb8}}, 0, 0},
- {0,0x50, {{0x4, 0xdeb8}, {0x3, 0xdeb8}, {0x2, 0xdeb8}, {0x1, 0xdeb8}}, 0x3, 0},
- {0,0x98, {{0x4, 0xdeb8}, {0x3, 0xdeb8}, {0x2, 0xdeb8}, {0x1, 0xdeb8}}, 0x4, 0},
- }
-};
1
0

[LinuxBIOS] r2641 - in trunk/LinuxBIOSv2: src/mainboard src/mainboard/asi src/mainboard/asi/mb_5blmp targets targets/asi targets/asi/mb_5blmp
by svn@openbios.org May 9, 2007
by svn@openbios.org May 9, 2007
May 9, 2007
Author: uwe
Date: 2007-05-09 09:52:14 +0200 (Wed, 09 May 2007)
New Revision: 2641
Added:
trunk/LinuxBIOSv2/src/mainboard/asi/
trunk/LinuxBIOSv2/src/mainboard/asi/mb_5blmp/
trunk/LinuxBIOSv2/src/mainboard/asi/mb_5blmp/Config.lb
trunk/LinuxBIOSv2/src/mainboard/asi/mb_5blmp/Options.lb
trunk/LinuxBIOSv2/src/mainboard/asi/mb_5blmp/auto.c
trunk/LinuxBIOSv2/src/mainboard/asi/mb_5blmp/chip.h
trunk/LinuxBIOSv2/src/mainboard/asi/mb_5blmp/irq_tables.c
trunk/LinuxBIOSv2/src/mainboard/asi/mb_5blmp/mainboard.c
trunk/LinuxBIOSv2/targets/asi/
trunk/LinuxBIOSv2/targets/asi/mb_5blmp/
trunk/LinuxBIOSv2/targets/asi/mb_5blmp/Config.lb
Log:
Add initial support for the ASI/BCom MB-5BLMP mainboard, as used in
the IGEL Winnet III thin client.
It boots a Linux kernel, but there are some problems. The login
prompt is never reached, it simply hangs at some point.
One possible reason is the IRQ table, which needs fixing.
Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan(a)coresystems.de>
Added: trunk/LinuxBIOSv2/src/mainboard/asi/mb_5blmp/Config.lb
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/asi/mb_5blmp/Config.lb (rev 0)
+++ trunk/LinuxBIOSv2/src/mainboard/asi/mb_5blmp/Config.lb 2007-05-09 07:52:14 UTC (rev 2641)
@@ -0,0 +1,209 @@
+##
+## Compute the location and size of where this firmware image
+## (linuxBIOS plus bootloader) will live in the boot rom chip.
+##
+if USE_FALLBACK_IMAGE
+ default ROM_SECTION_SIZE = FALLBACK_SIZE
+ default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
+else
+ default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
+ default ROM_SECTION_OFFSET = 0
+end
+
+##
+## Compute the start location and size size of
+## The linuxBIOS bootloader.
+##
+default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
+default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
+
+##
+## Compute where this copy of linuxBIOS will start in the boot rom
+##
+default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
+
+##
+## Compute a range of ROM that can cached to speed up linuxBIOS,
+## execution speed.
+##
+## XIP_ROM_SIZE must be a power of 2.
+## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
+##
+default XIP_ROM_SIZE=65536
+default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
+
+##
+## Set all of the defaults for an x86 architecture
+##
+
+arch i386 end
+
+##
+## Build the objects we have code for in this directory.
+##
+
+driver mainboard.o
+
+if HAVE_PIRQ_TABLE
+ object irq_tables.o
+end
+
+##
+## Romcc output
+##
+# makerule ./failover.E
+# depends "$(MAINBOARD)/failover.c ./romcc"
+# action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
+# end
+#
+# makerule ./failover.inc
+# depends "$(MAINBOARD)/failover.c ./romcc"
+# action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
+# end
+
+makerule ./auto.E
+ depends "$(MAINBOARD)/auto.c ./romcc"
+ action "./romcc -E -mcpu=i386 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
+end
+makerule ./auto.inc
+ depends "$(MAINBOARD)/auto.c ./romcc"
+ action "./romcc -mcpu=i386 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
+end
+
+##
+## Build our 16 bit and 32 bit linuxBIOS entry code
+##
+mainboardinit cpu/x86/16bit/entry16.inc
+mainboardinit cpu/x86/32bit/entry32.inc
+ldscript /cpu/x86/16bit/entry16.lds
+ldscript /cpu/x86/32bit/entry32.lds
+
+##
+## Build our reset vector (This is where linuxBIOS is entered)
+##
+if USE_FALLBACK_IMAGE
+ mainboardinit cpu/x86/16bit/reset16.inc
+ ldscript /cpu/x86/16bit/reset16.lds
+else
+ mainboardinit cpu/x86/32bit/reset32.inc
+ ldscript /cpu/x86/32bit/reset32.lds
+end
+
+### Should this be in the northbridge code?
+mainboardinit arch/i386/lib/cpu_reset.inc
+
+##
+## Include an id string (For safe flashing)
+##
+mainboardinit arch/i386/lib/id.inc
+ldscript /arch/i386/lib/id.lds
+
+###
+### This is the early phase of linuxBIOS startup
+### Things are delicate and we test to see if we should
+### failover to another image.
+###
+# if USE_FALLBACK_IMAGE
+# ldscript /arch/i386/lib/failover.lds
+# mainboardinit ./failover.inc
+# end
+
+###
+### O.k. We aren't just an intermediary anymore!
+###
+
+##
+## Setup RAM
+##
+mainboardinit cpu/x86/fpu/enable_fpu.inc
+mainboardinit cpu/amd/model_gx1/cpu_setup.inc
+mainboardinit cpu/amd/model_gx1/gx_setup.inc
+mainboardinit ./auto.inc
+
+##
+## Include the secondary Configuration files
+##
+dir /pc80
+config chip.h
+
+chip northbridge/amd/gx1 # Northbridge
+ device pci_domain 0 on
+ device pci 0.0 on end
+ chip southbridge/amd/cs5530 # Southbridge
+ device pci 12.0 on
+ chip superio/nsc/pc87351 # Super I/O
+ device pnp 2e.0 on # PIC
+ io 0x60 = 0x20
+ io 0x62 = 0xa0
+ irq 0x70 = 2
+ end
+ device pnp 2e.1 on # DMA
+ end
+ device pnp 2e.2 on # System Timer
+ io 0x60 = 0x40
+ irq 0x70 = 0
+ end
+ device pnp 2e.3 on # RTC
+ io 0x60 = 0x70
+ irq 0x70 = 8
+ end
+ device pnp 2e.4 on # Keyboard + Mouse
+ io 0x60 = 0x60
+ io 0x62 = 0x64
+ irq 0x70 = 1
+ irq 0x72 = 12
+ end
+ device pnp 2e.5 on # PC Speaker
+ end
+ device pnp 2e.6 on # Math Coprocessor (FPU)
+ io 0x60 = 0xf0
+ irq 0x70 = 13
+ end
+ device pnp 2e.7 on # System board
+ end
+ device pnp 2e.8 on # Motherboard resources
+ end
+ device pnp 2e.9 on # PCI bus
+ end
+ device pnp 2e.c on # Motherboard resources
+ end
+ device pnp 2e.d on # Motherboard resources
+ end
+ device pnp 2e.e on # COM1
+ io 0x60 = 0x3f8
+ irq 0x70 = 4
+ end
+ device pnp 2e.f off # FDC
+ end
+ device pnp 2e.10 on # Parallel port
+ io 0x60 = 0x378
+ irq 0x70 = 7
+ end
+ device pnp 2e.12 on # COM2
+ io 0x60 = 0x2f8
+ irq 0x70 = 3
+ end
+ end
+ device pci 12.1 off end # SMI
+ device pci 12.2 on end # IDE
+ device pci 12.3 off end # Audio
+ device pci 12.4 off end # Video (VGA)
+ end
+ # device pci 12.4 on # VGA (onboard)
+ # chip drivers/pci/onboard
+ # device pci 12.4 on end
+ # register "rom_address" = "0xfffc0000" # 256 KB image
+ # # register "rom_address" = "0xfff80000" # 512 KB image
+ # # register "rom_address" = "0xfff00000" # 1 MB image
+ # end
+ # end
+ device pci 0f.0 off end # Ethernet (Realtek RTL8139B)
+ device pci 13.0 on end # USB
+ end
+ end
+
+ chip cpu/amd/model_gx1 # CPU
+ end
+
+end
+
Added: trunk/LinuxBIOSv2/src/mainboard/asi/mb_5blmp/Options.lb
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/asi/mb_5blmp/Options.lb (rev 0)
+++ trunk/LinuxBIOSv2/src/mainboard/asi/mb_5blmp/Options.lb 2007-05-09 07:52:14 UTC (rev 2641)
@@ -0,0 +1,160 @@
+uses HAVE_PIRQ_TABLE
+uses USE_FALLBACK_IMAGE
+uses HAVE_FALLBACK_BOOT
+uses HAVE_HARD_RESET
+uses CONFIG_ROM_PAYLOAD
+uses IRQ_SLOT_COUNT
+uses MAINBOARD
+uses MAINBOARD_VENDOR
+uses MAINBOARD_PART_NUMBER
+uses LINUXBIOS_EXTRA_VERSION
+uses ARCH
+uses FALLBACK_SIZE
+uses STACK_SIZE
+uses HEAP_SIZE
+uses ROM_SIZE
+uses ROM_SECTION_SIZE
+uses ROM_IMAGE_SIZE
+uses ROM_SECTION_SIZE
+uses ROM_SECTION_OFFSET
+uses CONFIG_ROM_PAYLOAD_START
+# uses CONFIG_COMPRESS
+# uses CONFIG_COMPRESSED_PAYLOAD_NRV2B
+# uses CONFIG_COMPRESSED_PAYLOAD_LZMA
+uses PAYLOAD_SIZE
+uses _ROMBASE
+uses _RAMBASE
+uses XIP_ROM_SIZE
+uses XIP_ROM_BASE
+uses CROSS_COMPILE
+uses CC
+uses HOSTCC
+uses OBJCOPY
+uses DEFAULT_CONSOLE_LOGLEVEL
+uses MAXIMUM_CONSOLE_LOGLEVEL
+uses CONFIG_CONSOLE_SERIAL8250
+uses TTYS0_BAUD
+uses TTYS0_BASE
+uses TTYS0_LCS
+uses CONFIG_UDELAY_TSC
+uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
+# uses CONFIG_CONSOLE_VGA
+# uses CONFIG_PCI_ROM_RUN
+
+
+## ROM_SIZE is the size of boot ROM that this board will use.
+default ROM_SIZE = 256 * 1024
+
+###
+### Build options
+###
+
+##
+## Build code for the fallback boot
+##
+default HAVE_FALLBACK_BOOT=1
+
+##
+## Build code to reset the motherboard from linuxBIOS
+##
+default HAVE_HARD_RESET=0
+
+## Delay timer options
+##
+default CONFIG_UDELAY_TSC=1
+default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1
+
+##
+## Build code to export a programmable irq routing table
+##
+default HAVE_PIRQ_TABLE=1
+default IRQ_SLOT_COUNT=5 # TODO?
+
+##
+## Build code to export a CMOS option table
+##
+# default HAVE_OPTION_TABLE=0
+
+###
+### LinuxBIOS layout values
+###
+
+## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
+default ROM_IMAGE_SIZE = 64 * 1024
+default FALLBACK_SIZE = 128 * 1024
+
+##
+## Use a small 8K stack
+##
+default STACK_SIZE=0x2000
+
+##
+## Use a small 16K heap
+##
+default HEAP_SIZE=0x4000
+
+##
+## Only use the option table in a normal image
+##
+#default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
+# default USE_OPTION_TABLE = 0
+
+default _RAMBASE = 0x00004000
+
+default CONFIG_ROM_PAYLOAD = 1
+
+##
+## The default compiler
+##
+default CROSS_COMPILE=""
+default CC="$(CROSS_COMPILE)gcc -m32"
+default HOSTCC="gcc"
+
+##
+## The Serial Console
+##
+
+# To Enable the Serial Console
+default CONFIG_CONSOLE_SERIAL8250=1
+
+## Select the serial console baud rate
+default TTYS0_BAUD=115200
+#default TTYS0_BAUD=57600
+#default TTYS0_BAUD=38400
+#default TTYS0_BAUD=19200
+#default TTYS0_BAUD=9600
+#default TTYS0_BAUD=4800
+#default TTYS0_BAUD=2400
+#default TTYS0_BAUD=1200
+
+# Select the serial console base port
+default TTYS0_BASE=0x3f8
+
+# Select the serial protocol
+# This defaults to 8 data bits, 1 stop bit, and no parity
+default TTYS0_LCS=0x3
+
+##
+### Select the linuxBIOS loglevel
+##
+## EMERG 1 system is unusable
+## ALERT 2 action must be taken immediately
+## CRIT 3 critical conditions
+## ERR 4 error conditions
+## WARNING 5 warning conditions
+## NOTICE 6 normal but significant condition
+## INFO 7 informational
+## DEBUG 8 debug-level messages
+## SPEW 9 Way too many details
+
+## Request this level of debugging output
+default DEFAULT_CONSOLE_LOGLEVEL=9
+## At a maximum only compile in this level of debugging
+default MAXIMUM_CONSOLE_LOGLEVEL=9
+
+# VGA Console
+# default CONFIG_CONSOLE_VGA=1
+# default CONFIG_PCI_ROM_RUN=1
+
+end
+
Added: trunk/LinuxBIOSv2/src/mainboard/asi/mb_5blmp/auto.c
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/asi/mb_5blmp/auto.c (rev 0)
+++ trunk/LinuxBIOSv2/src/mainboard/asi/mb_5blmp/auto.c 2007-05-09 07:52:14 UTC (rev 2641)
@@ -0,0 +1,53 @@
+/*
+ * This file is part of the LinuxBIOS project.
+ *
+ * Copyright (C) 2007 Uwe Hermann <uwe(a)hermann-uwe.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#define ASSEMBLY 1
+
+#include <stdint.h>
+#include <device/pci_def.h>
+#include <arch/io.h>
+#include <device/pnp_def.h>
+#include <arch/romcc_io.h>
+#include <arch/hlt.h>
+#include "pc80/serial.c"
+#include "arch/i386/lib/console.c"
+#include "ram/ramtest.c"
+#include "northbridge/amd/gx1/raminit.c"
+#include "superio/nsc/pc87351/pc87351_early_serial.c"
+#include "cpu/x86/bist.h"
+
+#define SERIAL_DEV PNP_DEV(0x2e, PC87351_SP1)
+
+static void main(unsigned long bist)
+{
+ /* Initialize the serial console. */
+ pc87351_enable_serial(SERIAL_DEV, TTYS0_BASE);
+ uart_init();
+ console_init();
+
+ /* Halt if there was a built in self test failure. */
+ report_bist_failure(bist);
+
+ /* Initialize RAM. */
+ sdram_init();
+
+ /* Check whether RAM works. */
+ /* ram_check(0x00000000, 0x4000); */
+}
Added: trunk/LinuxBIOSv2/src/mainboard/asi/mb_5blmp/chip.h
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/asi/mb_5blmp/chip.h (rev 0)
+++ trunk/LinuxBIOSv2/src/mainboard/asi/mb_5blmp/chip.h 2007-05-09 07:52:14 UTC (rev 2641)
@@ -0,0 +1,25 @@
+/*
+ * This file is part of the LinuxBIOS project.
+ *
+ * Copyright (C) 2007 Uwe Hermann <uwe(a)hermann-uwe.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+extern struct chip_operations mainboard_asi_mb_5blmp_ops;
+
+struct mainboard_asi_mb_5blmp_config {
+ int nothing;
+};
Added: trunk/LinuxBIOSv2/src/mainboard/asi/mb_5blmp/irq_tables.c
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/asi/mb_5blmp/irq_tables.c (rev 0)
+++ trunk/LinuxBIOSv2/src/mainboard/asi/mb_5blmp/irq_tables.c 2007-05-09 07:52:14 UTC (rev 2641)
@@ -0,0 +1,39 @@
+/* TODO: This is currently copied from the IEI NOVA-4899R target, but it's
+ * quite surely wrong for this board. It gets me further in the boot process
+ * than using no irq_tables.c file at all, though!
+ */
+
+/* TODO: Add license header. */
+
+#include <arch/pirq_routing.h>
+
+const struct irq_routing_table intel_irq_routing_table = {
+ PIRQ_SIGNATURE, /* u32 signature */
+ PIRQ_VERSION, /* u16 version */
+ 32+16*5, /* there can be total 5 devices on the bus */
+ 0x00, /* Where the interrupt router lies (bus) */
+ (0x12<<3)|0x0, /* Where the interrupt router lies (dev) */
+ 0xe00, /* IRQs devoted exclusively to PCI usage */
+ 0x1078, /* Vendor */
+ 0x0002, /* Device */
+ 0, /* Crap (miniport) */
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
+ 0x2d, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */
+ {
+ /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
+ // USB
+ {0x00,(0x13<<3)|0x0, {{0x01, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},
+ // eth0
+ {0x00,(0x0a<<3)|0x0, {{0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},//0x3, 0x0},
+ // eth1
+ {0x00,(0x0b<<3)|0x0, {{0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x02, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},//0x2, 0x0},
+ // eth2
+ {0x00,(0x0c<<3)|0x0, {{0x04, 0xdeb8}, {0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},//0x1, 0x0},
+ // PCI slot
+ {0x00,(0x0f<<3)|0x0, {{0x04, 0xdeb8}, {0x03, 0xdeb8}, {0x02, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},
+ }
+};
+unsigned long write_pirq_routing_table(unsigned long addr)
+{
+ return copy_pirq_routing_table(addr);
+}
Added: trunk/LinuxBIOSv2/src/mainboard/asi/mb_5blmp/mainboard.c
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/asi/mb_5blmp/mainboard.c (rev 0)
+++ trunk/LinuxBIOSv2/src/mainboard/asi/mb_5blmp/mainboard.c 2007-05-09 07:52:14 UTC (rev 2641)
@@ -0,0 +1,27 @@
+/*
+ * This file is part of the LinuxBIOS project.
+ *
+ * Copyright (C) 2007 Uwe Hermann <uwe(a)hermann-uwe.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <device/device.h>
+#include "chip.h"
+
+struct chip_operations mainboard_asi_mb_5blmp_ops = {
+ CHIP_NAME("ASI/BCom MB-5BLMP Mainboard")
+};
+
Added: trunk/LinuxBIOSv2/targets/asi/mb_5blmp/Config.lb
===================================================================
--- trunk/LinuxBIOSv2/targets/asi/mb_5blmp/Config.lb (rev 0)
+++ trunk/LinuxBIOSv2/targets/asi/mb_5blmp/Config.lb 2007-05-09 07:52:14 UTC (rev 2641)
@@ -0,0 +1,43 @@
+##
+## This file is part of the LinuxBIOS project.
+##
+## Copyright (C) 2007 Uwe Hermann <uwe(a)hermann-uwe.de>
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+target mb_5blmp
+mainboard asi/mb_5blmp
+
+option ROM_SIZE = (256 * 1024)
+# option ROM_SIZE = (256 * 1024) - (32 * 1024)
+# option FALLBACK_SIZE = (256 * 1024) - (32 * 1024)
+
+romimage "normal"
+ option USE_FALLBACK_IMAGE = 0
+ option ROM_IMAGE_SIZE = 64 * 1024
+ option LINUXBIOS_EXTRA_VERSION = ".0Normal"
+ payload /tmp/filo.elf
+end
+
+romimage "fallback"
+ option USE_FALLBACK_IMAGE = 1
+ option ROM_IMAGE_SIZE = 64 * 1024
+ option LINUXBIOS_EXTRA_VERSION = ".0Fallback"
+ payload /tmp/filo.elf
+end
+
+buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback"
+# buildrom ./linuxbios.rom ROM_SIZE "fallback"
1
0
Hello
I am looking at using the Gigabyte GA-M57SLI-S4 for some servers that
we are setting up. I have one reservation with this board - the lack
of any PCI-X slots,
Having PCI-X slots brings with it a lot of options such as ability to
use existing SCSI RAID cards. Another possibiltiy is the Open
Graphics card Project, which I believe will be initially in PCI-X
format.
After some research I am led to believe that the only AM2 motherboard
with PCI-X is the ASUS M2N32-WS Professional.
With the great work being done on the Gigabyte GA-M57SLI-S4, I am
wondering how applicable this would be for the ASUS M2N32-WS board.
The motherboard is a nVIDIA nForce 590
A serial port header
It has a socketed PLCC flash chip (Award BIOS).
(It has ASUS CrashFree recovery from a USB flash disk
- if this is any use? )
For the additional $100 you get an extra GigE port, +3 SATA ports,
+1 IDE port & apparently with 590 you can use both PCIe slots at 16x.
Here are some websites:
http://www.asus.com/products4.aspx?l1=3&l2=82&l3=0&model=1207&modelmenu=1
http://www.pcstats.com/articleview.cfm?articleID=2093
So in summary I am just wondering if it would be possible to support a
consumer motherboard (AM2) with PCI-X slots.
Charles
3
2