coreboot May 2007

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[LinuxBIOS] r2655 - trunk/LinuxBIOSv2/src/northbridge/intel/i440bx
by svn＠openbios.org 10 May '07

10 May '07

Author: uwe Date: 2007-05-11 00:46:17 +0200 (Fri, 11 May 2007) New Revision: 2655 Modified: trunk/LinuxBIOSv2/src/northbridge/intel/i440bx/northbridge.c Log: Fixed a bug within the 440BX RAM size calculation. Since the DRB values on the 440BX are 8 MB units we need to shift left by 13 to get it into KB. Signed-off-by: Ceri Coburn <ceri.coburn(a)gmail.com> Signed-off-by: Roger Zauner <roger(a)eskimo.com> Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/LinuxBIOSv2/src/northbridge/intel/i440bx/northbridge.c =================================================================== --- trunk/LinuxBIOSv2/src/northbridge/intel/i440bx/northbridge.c 2007-05-10 22:21:13 UTC (rev 2654) +++ trunk/LinuxBIOSv2/src/northbridge/intel/i440bx/northbridge.c 2007-05-10 22:46:17 UTC (rev 2655) @@ -112,7 +112,8 @@ * the physical memory. The units are ticks of 8MB * i.e. 1 means 8MB. */ - tomk = ((unsigned long)pci_read_config8(mc_dev, DRB7)) << 15; + tomk = ((unsigned long)pci_read_config8(mc_dev, DRB7)) << 13; + printk_debug("Setting RAM size to %d MB\n", tomk >> 10); /* Compute the top of Low memory */ tolmk = pci_tolm >> 10; if (tolmk >= tomk) {

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[LinuxBIOS] r2654 - trunk/LinuxBIOSv2/src/cpu/amd/model_lx
by svn＠openbios.org 10 May '07

10 May '07

Author: stepan Date: 2007-05-11 00:21:13 +0200 (Fri, 11 May 2007) New Revision: 2654 Modified: trunk/LinuxBIOSv2/src/cpu/amd/model_lx/vsmsetup.c Log: indent is by no means as harmless as one might think ;-) trivial fix. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/LinuxBIOSv2/src/cpu/amd/model_lx/vsmsetup.c =================================================================== --- trunk/LinuxBIOSv2/src/cpu/amd/model_lx/vsmsetup.c 2007-05-10 19:02:19 UTC (rev 2653) +++ trunk/LinuxBIOSv2/src/cpu/amd/model_lx/vsmsetup.c 2007-05-10 22:21:13 UTC (rev 2654) @@ -142,7 +142,8 @@ /* save the stack */ " mov %%esp, __stack \n" " jmp 1f \n" - "__stack: .long 0 \n" "1:\n" + "__stack: .long 0 \n" + "1:\n" /* get devfn into %%ecx */ " movl %%esp, %%ebp \n" #if 0 @@ -389,7 +390,8 @@ "callbiosint16: \n" " push %ds \n" " push %es \n" - " push %fs \n" " push %gs \n" + " push %fs \n" + " push %gs \n" // clean up the int #. To save space we put it in the lower // byte. But the top 24 bits are junk. " andl $0xff, %eax\n" @@ -464,7 +466,8 @@ " pop %ds \n" " popal \n" " iret \n" - " .code32 \n"); + " .code32 \n" + ); } enum { @@ -510,7 +513,7 @@ // cases in a good compiler are just as good as your own tables. switch (intnumber) { - case 0...15: + case 0 ... 15: // These are not BIOS service, but the CPU-generated exceptions printk_info("biosint: Oops, exception %u\n", intnumber); if (esp < 0x1000) {

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[LinuxBIOS] r2650 build service
by LinuxBIOS information 10 May '07

10 May '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "stepan" checked in revision 2650 to the LinuxBIOS source repository and caused the following changes: Change Log: Fix the indent and whitespace to match LinuxBIOS standards Signed-off-by: Jordan Crouse <jordan.crouse(a)amd.com> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of amd:norwich has been broken Compilation of arima:hdama is still broken Compilation of artecgroup:dbe61 is still broken Compilation of digitallogic:msm800sev has been broken Compilation of ibm:e325 is still broken Compilation of ibm:e326 is still broken Compilation of iwill:dk8s2 is still broken Compilation of iwill:dk8x is still broken If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision will be backed out. Yours truely, LinuxBIOS automatic build system

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[LinuxBIOS] [PATCH] Remove unused files from norwich mainboard
by Marc Jones 10 May '07

10 May '07

This patch removes cmos.layout and auto.inc from the Norwich mainboard directory. It also fixes the dependency in Config.lb on option_table.h which includes cmos.layout. Signed-off-by: Marc Jones <marc.jones(a)amd.com> -- Marc Jones Senior Software Engineer (970) 226-9684 Office mailto:Marc.Jones@amd.com http://www.amd.com/embeddedprocessors Index: LinuxBIOSv2/src/mainboard/amd/norwich/Config.lb =================================================================== --- LinuxBIOSv2.orig/src/mainboard/amd/norwich/Config.lb 2007-05-09 17:02:51.000000000 -0600 +++ LinuxBIOSv2/src/mainboard/amd/norwich/Config.lb 2007-05-09 17:03:13.000000000 -0600 @@ -55,7 +55,7 @@ if USE_DCACHE_RAM #compile cache_as_ram.c to auto.inc makerule ./cache_as_ram_auto.inc - depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h" + depends "$(MAINBOARD)/cache_as_ram_auto.c" action "$(CC) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -S -o $@" action "perl -e 's/.rodata/.rom.data/g' -pi $@" action "perl -e 's/.text/.section .rom.text/g' -pi $@" Index: LinuxBIOSv2/src/mainboard/amd/norwich/cmos.layout =================================================================== --- LinuxBIOSv2.orig/src/mainboard/amd/norwich/cmos.layout 2007-05-09 16:56:28.000000000 -0600 +++ /dev/null 1970-01-01 00:00:00.000000000 +0000 @@ -1,75 +0,0 @@ -entries - -#start-bit length config config-ID name -#0 8 r 0 seconds -#8 8 r 0 alarm_seconds -#16 8 r 0 minutes -#24 8 r 0 alarm_minutes -#32 8 r 0 hours -#40 8 r 0 alarm_hours -#48 8 r 0 day_of_week -#56 8 r 0 day_of_month -#64 8 r 0 month -#72 8 r 0 year -#80 4 r 0 rate_select -#84 3 r 0 REF_Clock -#87 1 r 0 UIP -#88 1 r 0 auto_switch_DST -#89 1 r 0 24_hour_mode -#90 1 r 0 binary_values_enable -#91 1 r 0 square-wave_out_enable -#92 1 r 0 update_finished_enable -#93 1 r 0 alarm_interrupt_enable -#94 1 r 0 periodic_interrupt_enable -#95 1 r 0 disable_clock_updates -#96 288 r 0 temporary_filler -0 384 r 0 reserved_memory -384 1 e 4 boot_option -385 1 e 4 last_boot -386 1 e 1 ECC_memory -388 4 r 0 reboot_bits -392 3 e 5 baud_rate -400 1 e 1 power_on_after_fail -412 4 e 6 debug_level -416 4 e 7 boot_first -420 4 e 7 boot_second -424 4 e 7 boot_third -428 4 h 0 boot_index -432 8 h 0 boot_countdown -440 1 e 0 dcon_present -1008 16 h 0 check_sum - -enumerations - -#ID value text -1 0 Disable -1 1 Enable -2 0 Enable -2 1 Disable -4 0 Fallback -4 1 Normal -5 0 115200 -5 1 57600 -5 2 38400 -5 3 19200 -5 4 9600 -5 5 4800 -5 6 2400 -5 7 1200 -6 6 Notice -6 7 Info -6 8 Debug -6 9 Spew -7 0 Network -7 1 HDD -7 2 Floppy -7 8 Fallback_Network -7 9 Fallback_HDD -7 10 Fallback_Floppy -#7 3 ROM - -checksums - -checksum 392 1007 1008 - - Index: LinuxBIOSv2/src/mainboard/amd/norwich/auto.c =================================================================== --- LinuxBIOSv2.orig/src/mainboard/amd/norwich/auto.c 2007-05-10 11:22:28.000000000 -0600 +++ /dev/null 1970-01-01 00:00:00.000000000 +0000 @@ -1,106 +0,0 @@ -/* - * This file is part of the LinuxBIOS project. - * - * Copyright (C) 2007 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#define ASSEMBLY 1 - -#include <stdint.h> -#include <device/pci_def.h> -#include <arch/io.h> -#include <device/pnp_def.h> -#include <arch/romcc_io.h> -#include <arch/hlt.h> -#include "pc80/serial.c" -#include "arch/i386/lib/console.c" -#include "ram/ramtest.c" -#include "cpu/x86/bist.h" -#include "cpu/x86/msr.h" -#include <cpu/amd/lxdef.h> -#include <cpu/amd/geode_post_code.h> -#include "southbridge/amd/cs5536/cs5536.h" - -#define POST_CODE(x) outb(x, 0x80) - -#include "southbridge/amd/cs5536/cs5536_early_smbus.c" -#include "southbridge/amd/cs5536/cs5536_early_setup.c" - -static inline int spd_read_byte(unsigned device, unsigned address) -{ - return smbus_read_byte(device, address); -} - -#define ManualConf 0 /* Do automatic strapped PLL config */ -#define PLLMSRhi 0x00001490 /* manual settings for the PLL */ -#define PLLMSRlo 0x02000030 -#define DIMM0 0xA0 -#define DIMM1 0xA2 -#include "northbridge/amd/lx/raminit.h" -#include "northbridge/amd/lx/pll_reset.c" -#include "northbridge/amd/lx/raminit.c" -#include "sdram/generic_sdram.c" -#include "cpu/amd/model_lx/cpureginit.c" -#include "cpu/amd/model_lx/syspreinit.c" - -static void msr_init(void) -{ - /* Setup access to the MC for low memory. Note MC not setup yet. */ - __builtin_wrmsr(CPU_RCONF_DEFAULT, 0x10f3bf00, 0x24fffc02); - - __builtin_wrmsr(MSR_GLIU0 + 0x20, 0xfff80, 0x20000000); - __builtin_wrmsr(MSR_GLIU0 + 0x21, 0x80fffe0, 0x20000000); - - __builtin_wrmsr(MSR_GLIU1 + 0x20, 0xfff80, 0x20000000); - __builtin_wrmsr(MSR_GLIU1 + 0x21, 0x80fffe0, 0x20000000); -} - -static void mb_gpio_init(void) -{ - /* Early mainboard specific GPIO setup */ -} - -static void main(unsigned long bist) -{ - static const struct mem_controller memctrl [] = { - {.channel0 = {(0xa<<3)|0, (0xa<<3)|1}} - }; - - SystemPreInit(); - msr_init(); - - cs5536_early_setup(); - - /* NOTE: must do this AFTER the early_setup! - * it is counting on some early MSR setup - * for cs5536 - */ - /* cs5536_disable_internal_uart disable them for now, set them up later...*/ - cs5536_setup_onchipuart(); /* if debug. real setup done in chipset init via config.lb */ - mb_gpio_init(); - uart_init(); - console_init(); - - pll_reset(ManualConf); - - cpuRegInit(); - - sdram_initialize(1, memctrl); - - /* Check all of memory */ - //ram_check(0x00000000, 640*1024); -}

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[LinuxBIOS] r2649 build service
by LinuxBIOS information 10 May '07

10 May '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "stepan" checked in revision 2649 to the LinuxBIOS source repository and caused the following changes: Change Log: Fix the indent and whitespace to match LinuxBIOS standards Signed-off-by: Jordan Crouse <jordan.crouse(a)amd.com> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of arima:hdama is still broken Compilation of artecgroup:dbe61 is still broken Compilation of ibm:e325 is still broken Compilation of ibm:e326 is still broken Compilation of iwill:dk8s2 is still broken Compilation of iwill:dk8x is still broken If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision will be backed out. Yours truely, LinuxBIOS automatic build system

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[LinuxBIOS] r2648 build service
by LinuxBIOS information 10 May '07

10 May '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "stepan" checked in revision 2648 to the LinuxBIOS source repository and caused the following changes: Change Log: Fix the indent and whitespace to match LinuxBIOS standards Signed-off-by: Jordan Crouse <jordan.crouse(a)amd.com> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of arima:hdama is still broken Compilation of artecgroup:dbe61 is still broken Compilation of ibm:e325 is still broken Compilation of ibm:e326 is still broken Compilation of iwill:dk8s2 is still broken Compilation of iwill:dk8x is still broken If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision will be backed out. Yours truely, LinuxBIOS automatic build system

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[LinuxBIOS] Patch: epia MA map type
by Alex Mauer 10 May '07

10 May '07

The attached patch sets the MA map type correctly for all DIMMs I was able to find to test with the Epia. -Alex Mauer "hawke" Index: src/northbridge/via/vt8601/raminit.c =================================================================== --- src/northbridge/via/vt8601/raminit.c (revision 2639) +++ src/northbridge/via/vt8601/raminit.c (working copy) @@ -377,18 +377,18 @@ if (!size) continue; - /* Calculate the value of MA mapping type register, - * based on size of SDRAM chips. */ - size = (size & 0xffff) << (3 + 3); - /* convert module size to be in Mbits */ - size /= spd_num_chips(slot); - print_debug_hex16(size); - print_debug(" is the chip size\r\n"); - if (size < 64) - ma = 0; - else if (size < 256) - ma = 8; - else +/* Read the row densities */ + size = smbus_read_byte(0x50+slot, 0x1f); +/* Set the MA map type. + * 0xa should be another option, but when it would be used is unknown. + */ + if (size < 16 ) /* less than 64 MB per side */ + ma = 0x0; + else if (size < 32) /* less than 128MB per side */ + ma = 0x8; + else if ( size < 64) /* less than 256MB per side */ + ma = 0xc; + else /* 256MB or more per side */ ma = 0xe; print_debug_hex16(ma); print_debug(" is the MA type\r\n");

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[LinuxBIOS] r2647 build service
by LinuxBIOS information 10 May '07

10 May '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "stepan" checked in revision 2647 to the LinuxBIOS source repository and caused the following changes: Change Log: Add missing licenses to several of the files. Signed-off-by: Jordan Crouse <jordan.crouse(a)amd.com> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of arima:hdama is still broken Compilation of artecgroup:dbe61 is still broken Compilation of ibm:e325 is still broken Compilation of ibm:e326 is still broken Compilation of iwill:dk8s2 is still broken Compilation of iwill:dk8x is still broken If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision will be backed out. Yours truely, LinuxBIOS automatic build system

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[LinuxBIOS] r2653 - trunk/LinuxBIOSv2/src/northbridge/via/vt8601
by svn＠openbios.org 10 May '07

10 May '07

Author: stepan Date: 2007-05-10 21:02:19 +0200 (Thu, 10 May 2007) New Revision: 2653 Modified: trunk/LinuxBIOSv2/src/northbridge/via/vt8601/raminit.c Log: The attached patch sets the MA map type correctly for all DIMMs I was able to find to test with the Epia. Signed-off-by: Alex Mauer <hawke(a)hawkesnest.net> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/LinuxBIOSv2/src/northbridge/via/vt8601/raminit.c =================================================================== --- trunk/LinuxBIOSv2/src/northbridge/via/vt8601/raminit.c 2007-05-10 18:49:58 UTC (rev 2652) +++ trunk/LinuxBIOSv2/src/northbridge/via/vt8601/raminit.c 2007-05-10 19:02:19 UTC (rev 2653) @@ -377,18 +377,22 @@ if (!size) continue; - /* Calculate the value of MA mapping type register, - * based on size of SDRAM chips. */ - size = (size & 0xffff) << (3 + 3); - /* convert module size to be in Mbits */ - size /= spd_num_chips(slot); - print_debug_hex16(size); - print_debug(" is the chip size\r\n"); - if (size < 64) - ma = 0; - else if (size < 256) - ma = 8; - else + /* Read the row densities */ + size = smbus_read_byte(0x50+slot, 0x1f); + + /* Set the MA map type. + * + * 0xa should be another option, but when + * it would be used is unknown. + */ + + if (size < 16 ) /* less than 64 MB per side */ + ma = 0x0; + else if (size < 32) /* less than 128MB per side */ + ma = 0x8; + else if ( size < 64) /* less than 256MB per side */ + ma = 0xc; + else /* 256MB or more per side */ ma = 0xe; print_debug_hex16(ma); print_debug(" is the MA type\r\n");

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[LinuxBIOS] r2652 - trunk/LinuxBIOSv2/src/mainboard/amd/norwich
by svn＠openbios.org 10 May '07

10 May '07

Author: stepan Date: 2007-05-10 20:49:58 +0200 (Thu, 10 May 2007) New Revision: 2652 Removed: trunk/LinuxBIOSv2/src/mainboard/amd/norwich/auto.c Log: This patch removes auto.c from the Norwich mainboard directory. Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Signed-off-by: Marc Jones <marc.jones(a)amd.com> Deleted: trunk/LinuxBIOSv2/src/mainboard/amd/norwich/auto.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/amd/norwich/auto.c 2007-05-10 18:43:57 UTC (rev 2651) +++ trunk/LinuxBIOSv2/src/mainboard/amd/norwich/auto.c 2007-05-10 18:49:58 UTC (rev 2652) @@ -1,106 +0,0 @@ -/* - * This file is part of the LinuxBIOS project. - * - * Copyright (C) 2007 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#define ASSEMBLY 1 - -#include <stdint.h> -#include <device/pci_def.h> -#include <arch/io.h> -#include <device/pnp_def.h> -#include <arch/romcc_io.h> -#include <arch/hlt.h> -#include "pc80/serial.c" -#include "arch/i386/lib/console.c" -#include "ram/ramtest.c" -#include "cpu/x86/bist.h" -#include "cpu/x86/msr.h" -#include <cpu/amd/lxdef.h> -#include <cpu/amd/geode_post_code.h> -#include "southbridge/amd/cs5536/cs5536.h" - -#define POST_CODE(x) outb(x, 0x80) - -#include "southbridge/amd/cs5536/cs5536_early_smbus.c" -#include "southbridge/amd/cs5536/cs5536_early_setup.c" - -static inline int spd_read_byte(unsigned device, unsigned address) -{ - return smbus_read_byte(device, address); -} - -#define ManualConf 0 /* Do automatic strapped PLL config */ -#define PLLMSRhi 0x00001490 /* manual settings for the PLL */ -#define PLLMSRlo 0x02000030 -#define DIMM0 0xA0 -#define DIMM1 0xA2 -#include "northbridge/amd/lx/raminit.h" -#include "northbridge/amd/lx/pll_reset.c" -#include "northbridge/amd/lx/raminit.c" -#include "sdram/generic_sdram.c" -#include "cpu/amd/model_lx/cpureginit.c" -#include "cpu/amd/model_lx/syspreinit.c" - -static void msr_init(void) -{ - /* Setup access to the MC for low memory. Note MC not setup yet. */ - __builtin_wrmsr(CPU_RCONF_DEFAULT, 0x10f3bf00, 0x24fffc02); - - __builtin_wrmsr(MSR_GLIU0 + 0x20, 0xfff80, 0x20000000); - __builtin_wrmsr(MSR_GLIU0 + 0x21, 0x80fffe0, 0x20000000); - - __builtin_wrmsr(MSR_GLIU1 + 0x20, 0xfff80, 0x20000000); - __builtin_wrmsr(MSR_GLIU1 + 0x21, 0x80fffe0, 0x20000000); -} - -static void mb_gpio_init(void) -{ - /* Early mainboard specific GPIO setup */ -} - -static void main(unsigned long bist) -{ - static const struct mem_controller memctrl[] = { - {.channel0 = {(0xa << 3) | 0, (0xa << 3) | 1}} - }; - - SystemPreInit(); - msr_init(); - - cs5536_early_setup(); - - /* NOTE: must do this AFTER the early_setup! - * it is counting on some early MSR setup - * for cs5536 - */ - /* cs5536_disable_internal_uart disable them for now, set them up later... */ - cs5536_setup_onchipuart(); /* if debug. real setup done in chipset init via config.lb */ - mb_gpio_init(); - uart_init(); - console_init(); - - pll_reset(ManualConf); - - cpuRegInit(); - - sdram_initialize(1, memctrl); - - /* Check all of memory */ - //ram_check(0x00000000, 640*1024); -}

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coreboot May 2007