coreboot May 2007

coreboot@coreboot.org

98 participants
436 discussions

[LinuxBIOS] r2654 build service
by LinuxBIOS information 11 May '07

11 May '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "stepan" checked in revision 2654 to the LinuxBIOS source repository and caused the following changes: Change Log: indent is by no means as harmless as one might think ;-) trivial fix. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of amd:norwich has been fixed Compilation of arima:hdama is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2654&device=hdama&vendor=… Compilation of artecgroup:dbe61 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2654&device=dbe61&vendor=… Compilation of digitallogic:msm800sev has been fixed Compilation of ibm:e325 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2654&device=e325&vendor=i… Compilation of ibm:e326 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2654&device=e326&vendor=i… Compilation of iwill:dk8s2 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2654&device=dk8s2&vendor=… Compilation of iwill:dk8x is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2654&device=dk8x&vendor=i… If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, LinuxBIOS automatic build system

1 0

[LinuxBIOS] r2653 build service
by LinuxBIOS information 11 May '07

11 May '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "stepan" checked in revision 2653 to the LinuxBIOS source repository and caused the following changes: Change Log: The attached patch sets the MA map type correctly for all DIMMs I was able to find to test with the Epia. Signed-off-by: Alex Mauer <hawke(a)hawkesnest.net> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of amd:norwich is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2653&device=norwich&vendo… Compilation of arima:hdama is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2653&device=hdama&vendor=… Compilation of artecgroup:dbe61 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2653&device=dbe61&vendor=… Compilation of digitallogic:msm800sev is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2653&device=msm800sev&ven… Compilation of ibm:e325 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2653&device=e325&vendor=i… Compilation of ibm:e326 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2653&device=e326&vendor=i… Compilation of iwill:dk8s2 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2653&device=dk8s2&vendor=… Compilation of iwill:dk8x is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2653&device=dk8x&vendor=i… If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, LinuxBIOS automatic build system

1 0

[LinuxBIOS] [PATCH] Hide Geode UDC and OTG PCI header
by Marc Jones 11 May '07

11 May '07

This fix properly hides the UDC and OTG PCI headers when the cs5536 is setup as the host on USB port4. In client mode the headers remain available. Also fixes an outb to 0x80 to use the post_code() function. Signed-off-by: Marc Jones <marc.jones(a)amd.com> -- Marc Jones Senior Software Engineer (970) 226-9684 Office mailto:Marc.Jones@amd.com http://www.amd.com/embeddedprocessors Index: LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536.c =================================================================== --- LinuxBIOSv2.orig/src/southbridge/amd/cs5536/cs5536.c 2007-05-10 17:36:08.000000000 -0600 +++ LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536.c 2007-05-10 16:40:49.000000000 -0600 @@ -487,13 +487,13 @@ dev = dev_find_device(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_UDC, 0); if (dev) { - pci_write_config8(dev, 0x7C, 0xDEADBEEF); + pci_write_config32(dev, 0x7C, 0xDEADBEEF); } dev = dev_find_device(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_OTG, 0); if (dev) { - pci_write_config8(dev, 0x7C, 0xDEADBEEF); + pci_write_config32(dev, 0x7C, 0xDEADBEEF); } } @@ -512,7 +512,7 @@ (struct southbridge_amd_cs5536_config *)dev->chip_info; struct msrinit *csi; - outb(P80_CHIPSET_INIT, 0x80); + post_code(P80_CHIPSET_INIT); /* we hope NEVER to be in linuxbios when S3 resumes if (! IsS3Resume()) */

3 2

[LinuxBIOS] r2652 build service
by LinuxBIOS information 11 May '07

11 May '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "stepan" checked in revision 2652 to the LinuxBIOS source repository and caused the following changes: Change Log: This patch removes auto.c from the Norwich mainboard directory. Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Signed-off-by: Marc Jones <marc.jones(a)amd.com> Build Log: Compilation of amd:norwich is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2652&device=norwich&vendo… Compilation of arima:hdama is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2652&device=hdama&vendor=… Compilation of artecgroup:dbe61 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2652&device=dbe61&vendor=… Compilation of digitallogic:msm800sev is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2652&device=msm800sev&ven… Compilation of ibm:e325 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2652&device=e325&vendor=i… Compilation of ibm:e326 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2652&device=e326&vendor=i… Compilation of iwill:dk8s2 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2652&device=dk8s2&vendor=… Compilation of iwill:dk8x is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2652&device=dk8x&vendor=i… If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, LinuxBIOS automatic build system

1 0

[LinuxBIOS] r2651 build service
by LinuxBIOS information 11 May '07

11 May '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "stepan" checked in revision 2651 to the LinuxBIOS source repository and caused the following changes: Change Log: Fix the indent and whitespace to match LinuxBIOS standards Signed-off-by: Jordan Crouse <jordan.crouse(a)amd.com> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of amd:norwich is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2651&device=norwich&vendo… Compilation of arima:hdama is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2651&device=hdama&vendor=… Compilation of artecgroup:dbe61 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2651&device=dbe61&vendor=… Compilation of digitallogic:msm800sev is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2651&device=msm800sev&ven… Compilation of ibm:e325 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2651&device=e325&vendor=i… Compilation of ibm:e326 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2651&device=e326&vendor=i… Compilation of iwill:dk8s2 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2651&device=dk8s2&vendor=… Compilation of iwill:dk8x is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2651&device=dk8x&vendor=i… If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, LinuxBIOS automatic build system

1 0

[LinuxBIOS] 16p h8qm8 s4985 1207f
by Zeb Whitman 11 May '07

11 May '07

afaik supermicro h8qm8-2 ( http://www.supermicro.com/Aplus/motherboard/Opteron8000/MCP55/H8QM8-2.cfm ) and tyan s4985 ( http://www.tyan.com/product_board_detail.aspx?pid=271 ) are only quad socket 1207/ f boards on market discounting sunfire x4600-m2 query is two fold 1 what is future of quad core barcelona support on 1207 / f 2 what are odds of these boards supported i do not yet own either board but linuxbios support would sway me zw ps http://www.llnl.gov/computing/hpc/resources/OCF_resources.html#zeus http://www.appro.com/product/server_1Uxserver_opteron.asp

3 2

[LinuxBIOS] r2661 - trunk/LinuxBIOSv2/src/northbridge/intel/i440bx
by svn＠openbios.org 10 May '07

10 May '07

Author: uwe Date: 2007-05-11 01:59:20 +0200 (Fri, 11 May 2007) New Revision: 2661 Modified: trunk/LinuxBIOSv2/src/northbridge/intel/i440bx/northbridge.c Log: Fixup the 440BX northbridge.c (self-ack as this wasn't working anyway). Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/LinuxBIOSv2/src/northbridge/intel/i440bx/northbridge.c =================================================================== --- trunk/LinuxBIOSv2/src/northbridge/intel/i440bx/northbridge.c 2007-05-10 23:53:11 UTC (rev 2660) +++ trunk/LinuxBIOSv2/src/northbridge/intel/i440bx/northbridge.c 2007-05-10 23:59:20 UTC (rev 2661) @@ -96,6 +96,7 @@ pci_tolm = find_pci_tolm(&dev->link[0]); mc_dev = dev->link[0].children; + if (mc_dev) { /* Figure out which areas are/should be occupied by RAM. * This is all computed in kilobytes and converted to/from @@ -114,6 +115,7 @@ */ tomk = ((unsigned long)pci_read_config8(mc_dev, DRB7)) << 13; printk_debug("Setting RAM size to %d MB\n", tomk >> 10); + /* Compute the top of Low memory */ tolmk = pci_tolm >> 10; if (tolmk >= tomk) { @@ -121,17 +123,12 @@ */ tolmk = tomk; } - /* Write the ram configuration registers, - * preserving the reserved bits. - */ - tolm_r = pci_read_config16(mc_dev, 0xc4); - tolm_r = ((tolmk >> 10) << 3) | (tolm_r & 0xf); - pci_write_config16(mc_dev, 0xc4, tolm_r); /* Report the memory regions */ idx = 10; ram_resource(dev, idx++, 0, 640); - ram_resource(dev, idx++, 768, tolmk - 768); + // ram_resource(dev, idx++, 768, tolmk - 768); + ram_resource(dev, idx++, 1024, tolmk - 1024); } assign_resources(&dev->link[0]); }

1 0

[LinuxBIOS] EPIA and -M TSC and HARD_RESET changes from symposium 06
by Peter Stuge 10 May '07

10 May '07

Repost with some cosmetic improvements over last patch. //Peter

2 2

[LinuxBIOS] r2660 - trunk/LinuxBIOSv2/src/southbridge/amd/cs5536
by svn＠openbios.org 10 May '07

10 May '07

Author: stepan Date: 2007-05-11 01:53:11 +0200 (Fri, 11 May 2007) New Revision: 2660 Modified: trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536.c Log: This fix properly hides the UDC and OTG PCI headers when the cs5536 is setup as the host on USB port4. In client mode the headers remain available. Also fixes an outb to 0x80 to use the post_code() function. Signed-off-by: Marc Jones <marc.jones(a)amd.com> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536.c =================================================================== --- trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536.c 2007-05-10 23:50:27 UTC (rev 2659) +++ trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536.c 2007-05-10 23:53:11 UTC (rev 2660) @@ -487,13 +487,13 @@ dev = dev_find_device(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_UDC, 0); if (dev) { - pci_write_config8(dev, 0x7C, 0xDEADBEEF); + pci_write_config32(dev, 0x7C, 0xDEADBEEF); } dev = dev_find_device(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_OTG, 0); if (dev) { - pci_write_config8(dev, 0x7C, 0xDEADBEEF); + pci_write_config32(dev, 0x7C, 0xDEADBEEF); } } @@ -512,7 +512,7 @@ (struct southbridge_amd_cs5536_config *)dev->chip_info; struct msrinit *csi; - outb(P80_CHIPSET_INIT, 0x80); + post_code(P80_CHIPSET_INIT); /* we hope NEVER to be in linuxbios when S3 resumes if (! IsS3Resume()) */

1 0

[LinuxBIOS] r2659 - in trunk/LinuxBIOSv2: src/mainboard/via/epia src/mainboard/via/epia-m targets/via/epia
by svn＠openbios.org 10 May '07

10 May '07

Author: stepan Date: 2007-05-11 01:50:27 +0200 (Fri, 11 May 2007) New Revision: 2659 Removed: trunk/LinuxBIOSv2/src/mainboard/via/epia-m/reset.c trunk/LinuxBIOSv2/src/mainboard/via/epia/reset.c Modified: trunk/LinuxBIOSv2/src/mainboard/via/epia-m/Options.lb trunk/LinuxBIOSv2/src/mainboard/via/epia/Options.lb trunk/LinuxBIOSv2/targets/via/epia/Config.lb Log: Changes by Richard Smith and Peter Stuge from the LinuxBIOS symposium 2006. With CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=0, 1 million outb():s are used for timer calibration, which takes about one second. All EPIA-M boards have timer2 so we use it to boot faster. Only some EPIA boards have the Nehemiah CPU with timer2 so we default to IO calibration but add the TSC options so that they can be set in Config.lb. src/mainboard/via/epia*/reset.c is dead code (entire file within #if 0) so we set HAVE_HARD_RESET=0 for both boards. Signed-off-by: Peter Stuge <peter(a)stuge.se> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/LinuxBIOSv2/src/mainboard/via/epia/Options.lb =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/via/epia/Options.lb 2007-05-10 23:22:27 UTC (rev 2658) +++ trunk/LinuxBIOSv2/src/mainboard/via/epia/Options.lb 2007-05-10 23:50:27 UTC (rev 2659) @@ -11,6 +11,8 @@ uses HAVE_FALLBACK_BOOT uses HAVE_HARD_RESET uses CONFIG_UDELAY_IO +uses CONFIG_UDELAY_TSC +uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 uses HAVE_OPTION_TABLE uses USE_OPTION_TABLE uses CONFIG_ROM_PAYLOAD @@ -81,12 +83,15 @@ ## ## Build code to reset the motherboard from linuxBIOS ## -default HAVE_HARD_RESET=1 +default HAVE_HARD_RESET=0 ## ## use io based udelay function +## disable IO and enable TSC on Nehemiah boards ## default CONFIG_UDELAY_IO=1 +default CONFIG_UDELAY_TSC=0 +default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=0 ## ## Build code to export a programmable irq routing table Deleted: trunk/LinuxBIOSv2/src/mainboard/via/epia/reset.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/via/epia/reset.c 2007-05-10 23:22:27 UTC (rev 2658) +++ trunk/LinuxBIOSv2/src/mainboard/via/epia/reset.c 2007-05-10 23:50:27 UTC (rev 2659) @@ -1,43 +0,0 @@ -#if 0 -//#include "arch/romcc_io.h" -#include <arch/io.h> - -typedef unsigned device_t; - -#define PCI_DEV(BUS, DEV, FN) ( \ - (((BUS) & 0xFF) << 16) | \ - (((DEV) & 0x1f) << 11) | \ - (((FN) & 0x7) << 8)) - -static void pci_write_config8(device_t dev, unsigned where, unsigned char value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outb(value, 0xCFC + (addr & 3)); -} - -static void pci_write_config32(device_t dev, unsigned where, unsigned value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outl(value, 0xCFC); -} - -static unsigned pci_read_config32(device_t dev, unsigned where) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - return inl(0xCFC); -} - -#include "../../../northbridge/amd/amdk8/reset_test.c" - -void hard_reset(void) -{ - set_bios_reset(); - pci_write_config8(PCI_DEV(1, 0x04, 0), 0x47, 1); -} -#endif Modified: trunk/LinuxBIOSv2/src/mainboard/via/epia-m/Options.lb =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/via/epia-m/Options.lb 2007-05-10 23:22:27 UTC (rev 2658) +++ trunk/LinuxBIOSv2/src/mainboard/via/epia-m/Options.lb 2007-05-10 23:50:27 UTC (rev 2659) @@ -38,6 +38,7 @@ uses MAXIMUM_CONSOLE_LOGLEVEL uses CONFIG_CONSOLE_SERIAL8250 uses CONFIG_UDELAY_TSC +uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 uses CONFIG_PCI_ROM_RUN uses CONFIG_CONSOLE_VGA uses CONFIG_MAX_PCI_BUSES @@ -66,11 +67,12 @@ ## Use TSC for udelay. ## default CONFIG_UDELAY_TSC=1 +default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1 ## ## Build code to reset the motherboard from linuxBIOS ## -default HAVE_HARD_RESET=1 +default HAVE_HARD_RESET=0 ## ## Build code to export a programmable irq routing table Deleted: trunk/LinuxBIOSv2/src/mainboard/via/epia-m/reset.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/via/epia-m/reset.c 2007-05-10 23:22:27 UTC (rev 2658) +++ trunk/LinuxBIOSv2/src/mainboard/via/epia-m/reset.c 2007-05-10 23:50:27 UTC (rev 2659) @@ -1,43 +0,0 @@ -#if 0 -//#include "arch/romcc_io.h" -#include <arch/io.h> - -typedef unsigned device_t; - -#define PCI_DEV(BUS, DEV, FN) ( \ - (((BUS) & 0xFF) << 16) | \ - (((DEV) & 0x1f) << 11) | \ - (((FN) & 0x7) << 8)) - -static void pci_write_config8(device_t dev, unsigned where, unsigned char value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outb(value, 0xCFC + (addr & 3)); -} - -static void pci_write_config32(device_t dev, unsigned where, unsigned value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outl(value, 0xCFC); -} - -static unsigned pci_read_config32(device_t dev, unsigned where) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - return inl(0xCFC); -} - -#include "../../../northbridge/amd/amdk8/reset_test.c" - -void hard_reset(void) -{ - set_bios_reset(); - pci_write_config8(PCI_DEV(1, 0x04, 0), 0x47, 1); -} -#endif Modified: trunk/LinuxBIOSv2/targets/via/epia/Config.lb =================================================================== --- trunk/LinuxBIOSv2/targets/via/epia/Config.lb 2007-05-10 23:22:27 UTC (rev 2658) +++ trunk/LinuxBIOSv2/targets/via/epia/Config.lb 2007-05-10 23:50:27 UTC (rev 2659) @@ -1,6 +1,11 @@ # Sample config file for EPIA # This will make a target directory of ./epia +## uncomment these three lines if you have a Nehemiah CPU to boot 1s faster +#option CONFIG_UDELAY_IO=0 +#option CONFIG_UDELAY_TSC=1 +#option CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1 + target epia mainboard via/epia option MAXIMUM_CONSOLE_LOGLEVEL=9

1 0

← Newer
1
...
25
26
27
28
29
30
31
...
44
Older →

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

2004

2003

2002

coreboot May 2007