coreboot May 2007

coreboot@coreboot.org

98 participants
436 discussions

[LinuxBIOS] More support fixes for the IEI NOVA4899 board
by Luis Correia 14 May '07

14 May '07

Hi, with the generous help from Juergen Beisert, I've managed to prepare a much more stabler LinuxBIOS for this board. It seems that my board is the only one that uses Winbond superIO for the GX1 platform. That does explain why some of the devices were just not working at all. As for the IRQ routing nightmare, I've found a workaround by disabling one of the 3 ethernet chips. For now, it seems there is no other way of doing it, no matter how hard I try :( It must surely be a hardware design fault. This problem also existed with the original BIOS, but now, I can just disable the device and live happily with it. The changes are somewhat big, and I'll spend most of the following days producing small patches to bring the board support up to speed. What i'm seeking now is how to send these patches, one by one to the mailing list, or opening tracker issues for them? Thanks for listening, Luis Correia

2 1

[LinuxBIOS] where do board-specific superio settings belong?
by Ward Vandewege 14 May '07

14 May '07

I'm planning to add some EC initialization to the it8716f superio that I suspect to be specific for the board I'm working on (gigabyte m57sli-s4) - the offsets for the thermal sensors to make them output sane values, etc. In what file should those changes go? Somewhere under the mainboard/gigabyte/m57sli directory I presume, but where would be the best place, and from where should they be called? Thanks, Ward. -- Ward Vandewege <ward(a)fsf.org> Free Software Foundation - Senior System Administrator

5 8

Re: [LinuxBIOS] Adding IGEL-316 mainboard
by Juergen Beisert 14 May '07

14 May '07

Luis, > Boot your mainboard with your factory BIOS and dump the so called BC_* > registers and you are fine (a few registers at offset GX_BASE + 0x8400 up to Ups, my fault. The MC_* are the relevant registers for SDRAM timing, not the BC_* ones. Juergen

1 0

Re: [LinuxBIOS] Adding IGEL-316 mainboard
by Juergen Beisert 14 May '07

14 May '07

Luis, On Monday 14 May 2007 10:07, Luis Correia wrote: > > Maybe we are able to detect the SPD EEPROM on *some* boards. But never on > > all boards. There are too many individual incarnations how you can > > connect the I2C lines to your CPU (thanks to popconserve for the > > reference schematics!). Mainboard's physical behaviour (I believe) you > > never can autodetect. So we might need a filestructure you can try to > > autodetect things, or to hardcode most or all of the required settings. > > And then call ram_init with this data. Any idea? The faked-SPD alone does > > not help. > > Just to add up some extra info, on my NOVA4899 board there is an > hardware monitor chip that has I2C connections to some pins on the > SO-DIMM socket. > > I've failed to figure out where these lines are connected. The > reference schematics show the I2C bus being connected to the superIO. > But on my board they are not connected to either the CS5530 or the > SuperIO chips. I'm lost here... > > My only hope is to reverse engineer the factory BIOS, which is not a > task for the fain of heart :) Boot your mainboard with your factory BIOS and dump the so called BC_* registers and you are fine (a few registers at offset GX_BASE + 0x8400 up to GX_BASE + 0x840f. GX_BASE is on most system at 0x40000000). If you do not change your SDRAM, you can work with these values. Its much easier than to reverse engineer the BIOS code... Juergen

1 0

[LinuxBIOS] LinuxBios on a braille display ?
by Sébastien Hinderer 14 May '07

14 May '07

Dear all, I am wondering if it would be possible to run LinuxBios on a braille device. Regarded from a Linux point of view, such a device is very similar to a PC or a laptop, as you will certainly notice according to the datas provided below. If the device is supported, the idea would be to install a screen-reader (like brltty) in the BIOS, which would help when there is a problem while booting the operating system's kernel. So below are the outputs of lspci -n, lspci -v and lspci -t run on the terminal. Could someone please tell me whether there is a possibility or not to install LinuxBios on such a machine ? Thanks a lot in advance for your help, Sébastien. # lspci -n 00:00.0 0600: 1078:0001 00:02.0 0200: 1282:9102 (rev 40) 00:12.0 0601: 1078:0100 (rev 30) 00:12.1 0680: 1078:0101 00:12.2 0101: 1078:0102 00:12.3 0401: 1078:0103 00:12.4 0300: 1078:0104 00:13.0 0c03: 0e11:a0f8 (rev 06) # lspci -v 00:00.0 Host bridge: Cyrix Corporation PCI Master Flags: bus master, medium devsel, latency 0 00:02.0 Ethernet controller: Davicom Semiconductor, Inc. 21x4x DEC-Tulip compatible 10/100 Ethernet (rev 40) Subsystem: Davicom Semiconductor, Inc. Unknown device 8212 Flags: bus master, medium devsel, latency 165, IRQ 11 I/O ports at 1000 [size=256] Memory at fedfe000 (32-bit, non-prefetchable) [size=256] [virtual] Expansion ROM at 10000000 [disabled] [size=256K] Capabilities: [50] Power Management version 2 00:12.0 ISA bridge: Cyrix Corporation 5530 Legacy [Kahlua] (rev 30) Flags: bus master, medium devsel, latency 64 00:12.1 Bridge: Cyrix Corporation 5530 SMI [Kahlua] Flags: medium devsel Memory at 40012000 (32-bit, non-prefetchable) [size=256] 00:12.2 IDE interface: Cyrix Corporation 5530 IDE [Kahlua] (prog-if 80 [Master]) Flags: bus master, medium devsel, latency 0 I/O ports at 1400 [size=16] 00:12.3 Multimedia audio controller: Cyrix Corporation 5530 Audio [Kahlua] Flags: bus master, medium devsel, latency 0 Memory at 40011000 (32-bit, non-prefetchable) [size=128] 00:12.4 VGA compatible controller: Cyrix Corporation 5530 Video [Kahlua] (prog-if 00 [VGA]) Subsystem: Cyrix Corporation Unknown device 0001 Flags: medium devsel Memory at 40800000 (32-bit, non-prefetchable) [size=8M] 00:13.0 USB Controller: Compaq Computer Corporation ZFMicro Chipset USB (rev 06) (prog-if 10 [OHCI]) Subsystem: Compaq Computer Corporation ZFMicro Chipset USB Flags: bus master, medium devsel, latency 64, IRQ 9 Memory at 000e0000 (32-bit, non-prefetchable) [size=4K] # lspci -t -[0000:00]-+-00.0 +-02.0 +-12.0 +-12.1 +-12.2 +-12.3 +-12.4 \-13.0

10 46

Re: [LinuxBIOS] Steps for successsful ram init on i440bx boards
by Yuning Feng 14 May '07

14 May '07

2007/5/14, roger <roger(a)eskimo.com>: > Would it help any if I made a list of items needed for proper Intel > northbridge (and possibly southbridge/smbus) initialization? This is helpful. I think 440bx might be a good mainboard to start learning linuxbios ? Datasheets of Intel mainboards are relatively easier to obtain and 440bx is easy to get. There have been some tutorial to start, which are mainly on server boards. Server boards are more expensive and it seems their datasheets are more diffucult to obtain. I feel much more comfort while reading code if I have some hardware documentation to refer to. Maybe some day we could have a tutorial on widely used and well-documented desktop mainboard ? Just some humble opinion. Correct me if I am wrong. Thanks.

2 1

[LinuxBIOS] Booting Windows 2K / XP on QEMU - Problems - GSoC -Current Startus
by Augusto Pedroza 14 May '07

14 May '07

Hi my friends, I feel that is very important to inform this list about my efforts and also receive an important feedback. We really feel that getting the things below to work on qemu will be an important step for LinuxBIOS, since people who do not have access to proper hardware will be able to test it and contribute in some ways. I haven't had success yet but this is what I got. I am going to detail all the steps I've taken up to now. Preparing Images: 1- My first step create 2 qcow disk images, one for win2k(2G) and another one for winXP(3G), I followed these instructions: http://www.hermann-uwe.de/blog/howto-install-windows-xp-in-debian-using-qemu 2- I installed a small version of Fedora in these images and of course grub in the MBR. Preparing linuxbios: 1- My first step was to patch the as86 compiler. 2- Executed Makefile with make in the ADLO directory 3- Edited the payload option in the Config.lb file within qemu-i386 directory of LinuxBIOS to point to the payload generated by ADLO. 4- Run make and copied qemu-bios.rom to my home as bios.bin 5- Copied the vgabios-cirrus.bin to the same directory above. 6- Ran the following command : qemu -L ~ 2k_linux.cow -no-kqemu -serial stdio With win2k got the following output: LinuxBIOS-2.0.0-OpenBIOS Wed May 2 19:21:12 BRT 2007 starting... Copying LinuxBIOS to RAM. Jumping to LinuxBIOS. LinuxBIOS-2.0.0-OpenBIOS Wed May 2 19:21:12 BRT 2007 booting... Enumerating buses... Finding PCI configuration type. PCI: Using configuration type 1 PCI_DOMAIN: 0000 enabled PCI: pci_scan_bus for bus 00 PCI: 00:00.0 [8086/1237] enabled PCI: 00:01.0 [8086/7000] enabled PCI: 00:01.1 [8086/7010] enabled PCI: 00:01.3 [8086/7113] enabled PCI: 00:02.0 [1013/00b8] enabled PCI: 00:03.0 [10ec/8029] enabled PCI: pci_scan_bus returning with max=000 done Allocating resources... Reading resources... Done reading resources. Setting resources... I would set ram size to 0x20000 Kbytes PCI: 00:01.1 20 <- [0x0000001400 - 0x000000140f] io PCI: 00:02.0 10 <- [0x00fc000000 - 0x00fdffffff] prefmem PCI: 00:02.0 14 <- [0x00fe000000 - 0x00fe000fff] mem PCI: 00:03.0 10 <- [0x0000001000 - 0x00000010ff] io Done setting resources. Done allocating resources. Enabling resources... PCI: 00:00.0 subsystem <- 00/00 PCI: 00:00.0 cmd <- 140 PCI: 00:01.0 subsystem <- 00/00 PCI: 00:01.0 cmd <- 147 PCI: 00:01.1 cmd <- 141 PCI: 00:01.3 cmd <- 140 PCI: 00:02.0 cmd <- 143 PCI: 00:03.0 cmd <- 141 done. Initializing devices... Root Device init PCI: 00:00.0 init PCI: 00:01.0 init PCI: 00:01.1 init PCI: 00:01.3 init PCI: 00:02.0 init PCI: 00:03.0 init Devices initialized Copying IRQ routing tables to 0xf0000...done. Verifing copy of IRQ routing tables at 0xf0000...done Checking IRQ routing table consistency... check_pirq_routing_table() - irq_routing_table located at: 0x000f0000 done. Moving GDT to 0x500...ok Adjust low_table_end from 0x00000530 to 0x00001000 Adjust rom_table_end from 0x000f0400 to 0x00100000 Wrote linuxbios table at: 00000530 - 00000b68 checksum cf09 Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3 rom_stream: 0xfffc0000 - 0xfffeffff Found ELF candidate at offset 0 header_offset is 0 Try to load at offset 0x0 New segment addr 0x7c00 size 0x10400 offset 0x100 filesize 0x10400 (cleaned up) New segment addr 0x7c00 size 0x10400 offset 0x100 filesize 0x10400 Loading Segment: addr: 0x0000000007fdfc00 memsz: 0x000000000000e400 filesz: 0x000000000000e400 Loading Segment: addr: 0x0000000000016000 memsz: 0x0000000000002000 filesz: 0x0000000000002000 Jumping to boot code at 0x7c00 $Revision: 1.163 $ $Date: 2006/07/07 16:10:37 $ Bochs BIOS - build: 06/23/99 $Revision: 1.163 $ $Date: 2006/07/07 16:10:37 $ Options: ata0-0: PCHS=4063/16/63 translation=lba LCHS=1015/64/63 ata0 master: QEMU HARDDISK ATA-7 Hard-Disk (2000 MBytes) ata1 master: QEMU CD-ROM ATAPI-4 CD-Rom/DVD-Rom Booting from Hard Disk... int13_harddisk function 4Bh unsupported, returns fail int13_harddisk: function 41, unmapped device for ELDL=81 int13_harddisk: function 08, unmapped device for ELDL=81 *** int 15h function AX=00C0, BX=0000 not yet supported! *** int 15h function AX=5300, BX=0000 not yet supported! *** int 15h function AX=5304, BX=0000 not yet supported! int13_harddisk function 4Bh unsupported, returns fail int13_harddisk function 4Bh unsupported, returns fail int13_harddisk function 4Bh unsupported, returns fail int13_harddisk function 4Bh unsupported, returns fail *** int 15h function AX=5300, BX=0000 not yet supported! int13_harddisk: function 15, unmapped device for ELDL=81 When I pressed some keyboard keys I got the following: KBD: int09h_handler(): unknown scancode read: 0x72! KBD: int09h_handler(): unknown scancode read: 0x72! KBD: int09h_handler(): unknown scancode read: 0x75! KBD: int09h_handler(): unknown scancode read: 0x75! KBD: int09h_handler(): unknown scancode read: 0x74! KBD: int09h_handler(): unknown scancode read: 0x74 After I closer look I found out taht most of these problems were due to GRUB interupts. PS: Both images work fine with: qemu 2k_linux.cow -no-kqemu -serial stdio I appreciate any suggestion, -- Augusto Pedroza

1 0

[LinuxBIOS] Current Status of DFI P2XBL (440bx w/ w83977ew)
by roger 13 May '07

13 May '07

Current Status of DFI P2XBL (440bx w/ Winbond SuperIO W83977EW using W83977TF code. Chips similar (ie. EW is lacking one or two GP logical devices.) I get random hangs during sdram init. Attached is a log with multiple boots demonstrating the random hangs -- and this also explains the random post codes I've been getting on this box. Hey! console_init works now! -- Roger http://www.eskimo.com/~roger/index.html Key fingerprint = 8977 A252 2623 F567 70CD 1261 640F C963 1005 1D61 Wed May 9 08:17:12 PDT 2007

4 10

[LinuxBIOS] [PATCH] Initial support for the ASI/BCom MB-5BLMP / IGEL Winnet III
by Uwe Hermann 13 May '07

13 May '07

Here's a first patch for the IGEL Winnet III thin client. It allows me to boot a Linux kernel half-way to the login prompt; at some point it hangs, though, so more work is needed. This is a 233 MHz Geode GX1 based thin client with Ethernet, USB, VGA, a Disk-on-Chip, socketed DIP BIOS chip, a laptop-size RAM slot, a normal-size (PC) RAM slot (don't remember the correct name right now), and IDE connector, keyboard, mouse, sound, 2x serial port, parallel port, 1x ISA slot, 1x PCI slot. Fanless, extremely silent. Ca. 20-30 Euro via eBay. More details later, I'll write up a HOWTO for the wiki... Attached is a boot log, and some lspci and other useful output gathered from a Linux system booted using the original BIOS. Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

4 11

[LinuxBIOS] Clarification of Raminit.c
by roger 13 May '07

13 May '07

I'm kind of confused on this one... How would I specify a DRAMC or CAS setting (after referring to the 440BX intel spec pdf)? For example: --- Snip from Intel pdf --- NBXCFG—NBX Configuration Register (Device 0) Offset: 50–53h Default: bits 31–16: 0000h bits 15–0: 00S0-0000-000S-0S00b Access: Read/ Size: 32 bits ...snip... Bit 13:12 00 = 100 MHz, 11 = Reserved --- End Snip from Intel pdf --- Again, just using this as an example as values should be provided by SPD values. In i440bx/raminit.c, we set this with the following values: NBXCFG, 0x00000000, 0xff00a00c, I'm guessing the "0x00000000" & "0xff00a00c" values are calculated by somehow adding all the settings possible for NBX and somehow, the value is uniquely recognized by the Northbridge?? -- Roger http://www.eskimo.com/~roger/index.html Key fingerprint = 8977 A252 2623 F567 70CD 1261 640F C963 1005 1D61 Sun May 13 01:39:19 PDT 2007

2 2

← Newer
1
...
22
23
24
25
26
27
28
...
44
Older →

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

2004

2003

2002

coreboot May 2007