Working with Linuxbios on tyan s2850, want to use built in si3114
controller, can I use the drivers from LinuxBios sources or must use driver
from base Ami bios part?
The same question about Ati video interesting to, there is a driver in
LinusBios sources, can I use it instead of Ami bios part one?
This is most certainly incredible easy for some but I feel lost in the dark! :)
I want to use linuxbios on a custom system board based on the broadcom
blast. It boots like a charm but most of the IRQs are wrong. The
default is wrong and the getpir generated table is bogus and after
filling the irq_table.c manually there is still no change!
It seems as it doesn't matter what I put in the irq_tables.c.
I got the tip that if linuxbios is compiled with mptable enabled it
might override the irq_tables.c. I acted on that and set the "default
HAVE_MP_TABLE=0" in mainbrd Options.lb. this resulted in a system
hang. So I tried to make the irq assignment in mptable.c but I don't
understand how it works, which numbers go where?
Stefan talked about doing ACPI tables, did you mean APIC tables? How
do they look and where do they go?
It is so frustrating to have a working system that can't do anything
because of the missing irqs, how do you guys do it? I have'nt found
anyone with a similar problem on the list!
meh, my n00b C skills are kicking in again, I know this can be done in
C++, but gcc doesn't like it here. I'm trying to differentiate between
i82801 models by using a config option, in Options.lb. The config option
is "I82801_MODEL", and it would expect some short string (AA, AB, CA,
DBM, etc). Then, in i82801_device_ids.h, there's something like this for
#if I82801_MODEL == "AA"
#define I82801_PCI 0x2418 /* D30:F0, PCI Interface Hub */
#define I82801_LPC 0x2410 /* D31:F0, LPC Interface Bridge */
#define I82801_IDE 0x2411 /* D31:F1, IDE Controller */
#define I82801_USB1 0x2412 /* D31:F2, USB Controller */
#define I82801_SMBUS 0x2413 /* D31:F3, SMBUS Controller */
#define I82801_AC97 0x2415 /* D31:F5, AC'97 Audio Controller */
#define I82801_MC97 0x2416 /* D31:F6, AC'97 Modem Controller */
But, the build error:
i82801_device_ids.h:3.19: warning: Replacing undefined macro: AA with 0
arithmetic type expexted
Is there any way to get this to work, or am I stuck defining dummy
values for AA, AB, etc? Is there something requred beyond the quotes to
tell the compiler that its supposed to be a string? I've thought about
using hex strings, ie 0xAA, but it wouldn''t work for the dbm or er.
Same is true for the ich version, i82801er = ICH5R.
Is is possible to have in linuxbios several bootloaders linked in and
tried in sequence, like we have in the legacy bios?
and maybe a
pxe enabled bootloader (maybe etherboot based)
of course, if all of this exists, you may send a slapper my way :)
I tried to flash my bios with flashrom, but it can not write to the
chip, because it may be in a readonly mode.
Does anybody now a workaround ?
awdflash.exe (v8.63c) claims it is not an award bios.
Is there a hidden switch to assure awdflash to write the image ?
I do not get viruses because I do not use MS software.
If you use Outlook then please do not put my email address in your
address-book so that WHEN you get a virus it won't use my address in the
[Please always reply to the mailing list, not individual developers]
On Mon, May 21, 2007 at 12:00:37PM -0300, Otávio Alcântara wrote:
> I'm using a JTAG debugger and I can't see the initial jmp of bios. It seems
> like the linuxbios.rom is not well formatted, I mean with the original bios
> I can debug instruction by instruction, see the bios booting the machine and
> so on. Flashing the linuxbios.rom seems there is no valid instruction on
> reset vector.
Hm, sounds bad.
You didn't answer my question, though. Did you try using a null-modem
cable to see if you get serial debug output? Maybe something's wrong
with your jtag (or other) setup?
Which code exactly are you using? Please send a patch if it's modified
from what is in svn. How are you building LinuxBIOS? How big is your ROM
chip? How big is your linuxbios.rom? What's the contents of your
targets/.../Config.lb file? Which payload are you using? How did you
flash linuxbios.rom on the chip? Are you sure that worked ok?
Do you have a POST card? What does it show? Does it "hang" with a
certain value at some point?
http://www.hermann-uwe.de | http://www.holsham-traders.dehttp://www.crazy-hacks.org | http://www.unmaintained-free-software.org
Two of them:
1) building filo as payload
Compressing the ELF payload with lzma...
- problem: the filo seems to be already compressed at this point
- solution: make a fix or uncompress filo in deploy/filo-payload.elf.lzma &
2) linuxbios revision
- for norwitch target in config/platforms/norwich.conf:
Is it so badly wrong for the reason? :)
Thank you, Mr. Darmawan Salihun.
I will google the key words you gave.
I am still not quite clear about the second question. Before BIOS runs, the system must know where BIOS FLASH is attached, LPC, X-BUS or PCI? How?
??? Feng Libo @ AMD Ext: 20906
Mobile Phone: 13683249071
Office Phone: 0086-010-62801406
From: Darmawan Salihun [mailto:email@example.com]
Sent: Wednesday, May 30, 2007 7:00 PM
To: Feng, Libo
Subject: Re: [LinuxBIOS] Question about protect mode?
Feng, Libo wrote:
> I am also confused a little. The propriety BIOS runs in the real mode, how does it test the memory beyond 1MB?
The propietary BIOS such as Award-Phoenix, AMI, Insyde, etc. switches the machine to "Voodoo Mode/Flat real mode" or "Flat Protected Mode with no memory management scheme (as written by Juergen)". Use google with these keywords and you will find a lot of info in the web. LinuxBIOS is much more clean because the 32-bit mode it uses is thoroughly defined in Intel's Manual, no confusion about how to enter the processor operating mode. The propietary BIOSes use the "kludge" known as "Voodoo Mode". I'm not sure whether processor from different manufacturer will comply to it or not, because IIRC it's quite an undocumented feature.
> Another question is BIOS ROM can attach to XBUS, LPC, someone told me, even PCI, how dose the address forward to the location?
Through the chipset decoding logic. BIOS chips is partially mapped in the "legacy part" of x86 physical address space. The chipset carry out the tasks. Pay attention to the chipset datasheet as you read through (and/or disassembly) the BIOS code.
I have a question about Config.lb that I hope someone can help me with.
This is in order to get ACPI working on the EPIA board.
Ok in the mainboard Config.lb as part of the southbridge there is the
device pci 11.0 on # Southbrdge
device pnp 2e.a off end # ACPI
What I want to know is what exactly does "device pnp 2e.a off end
# ACPI" do ?
I notice that there are other device lines above this to do with com
ports and keyboard
and they have io and irq lines as part of the device. Is this needed for
the ACPI line ?
What exactly does the 2e.a refer to ?
further down there is also
device pci 11.4 on end # ACPI
this I have turned to "ON" and the ACPI is now being configured.
many thanks for any help