coreboot May 2007

coreboot@coreboot.org

98 participants
436 discussions

[LinuxBIOS] [Patch] AMD cs5536 uart disable
by Marc Jones 04 Jun '07

04 Jun '07

The UART disable code was causing a hang and was worked around with a return that skipped the disable code. This patch removes the return and fixes the UART disable code. The problem was that the disable code was ORing bits into the Legacy_IO MSR causing issues with the LPC SIOs init code that would manifest as a hang because the IO would not be decoded correctly. ANDing to clear the bits fixes the issue. Signed-off-by: Marc Jones <marc.jones(a)amd.com> -- Marc Jones Senior Software Engineer (970) 226-9684 Office mailto:Marc.Jones@amd.com http://www.amd.com/embeddedprocessors Index: cs5536.c =================================================================== --- cs5536.c (revision 2705) +++ cs5536.c (working copy) @@ -316,9 +316,6 @@ } else { /* Reset and disable COM1 */ - printk_err("Not disabling COM1 due to a bug ...\n"); - /* for now, don't do this! */ - return; msr = rdmsr(MDD_UART1_CONF); msr.lo = 1; // reset wrmsr(MDD_UART1_CONF, msr); @@ -327,7 +324,7 @@ /* Disable the IRQ */ msr = rdmsr(MDD_LEG_IO); - msr.lo |= ~(0xF << 16); + msr.lo &= ~(0xF << 16); wrmsr(MDD_LEG_IO, msr); } @@ -391,7 +388,7 @@ /* Disable the IRQ */ msr = rdmsr(MDD_LEG_IO); - msr.lo |= ~(0xF << 20); + msr.lo &= ~(0xF << 20); wrmsr(MDD_LEG_IO, msr); } }

8 13

[LinuxBIOS] Question about protect mode?
by Fu xiayin 04 Jun '07

04 Jun '07

Hello,everyone. I'm a student, and now my task is studying Linuxbios. I'm not very clear about the difference between the protect mode and the real mode. So I wonder why should Linuxbios turn into protect mode at the very beginning. And is there any difference between protect mode in Linuxbios and in linux kernel. If any, what's the main difference?

9 17

[LinuxBIOS] [PATCH] Tyan S1846: Device tree fixes
by Uwe Hermann 03 Jun '07

03 Jun '07

The static device tree of the Tyan S1846 was, um... totally bogus. I'm using the ide0_enble/ide1_enable variables now to enable IDE. Hm, what happens if those variables are not set at all in a Confib.lb file of some mainboard? Do they default to zero? Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

4 8

[LinuxBIOS] [PATCH] Lower 440BX RAM init delays
by Uwe Hermann 03 Jun '07

03 Jun '07

See patch. Tested on Tyan S1846, works fine. Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

5 8

[LinuxBIOS] [PATCH] v3: Kconfig payload options and README improvements
by Uwe Hermann 03 Jun '07

03 Jun '07

Hi, here's a patch for v3 which reworks the payload selection in 'make menuconfig'. After the patch there are two simple options you can use: - Payload file You specify a path and filename for the payload. Default: payload.elf in the current directory. _How_ you create this payload does not matter; manual building, using a pre-built image from somewhere, using buildrom or lbdistro to create one etc. etc. - No payload This will create an "empty" image without any payload. You can later add a payload from the command line using the 'lar' utility. Something like 'lar add payload.elf linuxbios.rom' will add it... This is useful for multiple purposes: - Other "payload-projects" such as GNUFI or Open Firmware etc. can use LinuxBIOS as low-level bootstrap and incorporate LinuxBIOS in their own build process. They use the "empty" LinuxBIOS image as a base and use 'lar' to insert their own GNUFI / OFW / whatever image. - Linux distributions can ship 'linuxbios' packages which come with /usr/bin/lar and "empty" pre-built images for all supported mainboards somewhere in /usr/share, e.g. /usr/share/linuxbios/images/lb_empty_asus_a8n_e.rom /usr/share/linuxbios/images/lb_empty_tyan_s2882.rom /usr/share/linuxbios/images/lb_empty_gigabyte_ga_6bxc_256k.rom /usr/share/linuxbios/images/lb_empty_gigabyte_ga_6bxc_512k.rom etc. The user can then use those pre-built images and the 'lar' tool to insert any desired payload into the "final" image before flashing it. Heck, the distributions could even ship default payloads in /usr/share/linuxbios/payloads. We definately need some more discussion on the payload handling, but I think this patch is a good start. This system is flexible enough to manage any use case you can imagine, IMO. I documented the proposed procedure in the README in the patch, comments welcome. Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

2 2

[LinuxBIOS] MSI interrupts
by Thomas Ekstrand 02 Jun '07

02 Jun '07

Hi! I have this error: --snip-- tg3: eth0: No interrupt was generated using MSI, switching to INTx mode. Please report this failure to the PCI maintainer and include system chipset information. tg3: eth1: No interrupt was generated using MSI, switching to INTx mode. Please report this failure to the PCI maintainer and include system chipset information. --snip-- How can I get the interrupt to go through MSI? Currently there are no interrupts at all. I'm running on broadcom blast based board with the bcm5780/5785 chipset regards Thomas

3 4

[LinuxBIOS] using Graphics card ram as actual ram?
by RusH 01 Jun '07

01 Jun '07

Recently I saw a tour around Wilk Elektronik fab (Polish company, they own GoodRAM brand). http://www.egielda.com.pl/?str=art&id=2902&action=all (its in Polish, sadly no interesting pictures ) There was one interesting thing - their testing lab. Currently they are using modded PC motherboards (Variable Voltage Regulator) to test modules (bad chip detection, performance). At the end of the tour Lab monkey showed of his latest monster, test setup for hot swap module testing, the key point and main feature of this beast was using PCIE Video card memory for the main program memory. Currently LinuxBios is using CAR for ram. What about using Video card memory? is that feasible? Can you setup Video memory as stack? -- Who logs in to gdm? Not I, said the duck.

4 4

[LinuxBIOS] EPIA & ACPI progress
by Ben Hewson 31 May '07

31 May '07

well I have finally had a first stab at ACPI on the EPIA board. Based vaguely on the EPIA-M stuff ( some errors in that one I think) I have some problems to sort out, such as irq 3: nobody cared (try booting with the "irqpoll" option) [<c0131f42>] __report_bad_irq+0x22/0x80 [<c013201d>] note_interrupt+0x5d/0xc0 [<c013195c>] __do_IRQ+0xdc/0x100 [<c01048ea>] do_IRQ+0x1a/0x30 [<c010322a>] common_interrupt+0x1a/0x20 [<c011acf1>] __do_softirq+0x31/0x90 [<c011ad76>] do_softirq+0x26/0x30 [<c011ae39>] irq_exit+0x39/0x40 [<c01048ef>] do_IRQ+0x1f/0x30 [<c010322a>] common_interrupt+0x1a/0x20 [<c0131bb9>] setup_irq+0xa9/0x130 [<c01dddb9>] acpi_irq+0x0/0x16 [<c01dddb9>] acpi_irq+0x0/0x16 [<c0131da4>] request_irq+0x74/0x90 [<c01dde25>] acpi_os_install_interrupt_handler+0x56/0x80 [<c01dddb9>] acpi_irq+0x0/0x16 [<c01dddb9>] acpi_irq+0x0/0x16 [<c01e2245>] acpi_ev_install_sci_handler+0x1a/0x1e [<c01e2208>] acpi_ev_sci_xrupt_handler+0x0/0x18 [<c01e1a45>] acpi_ev_install_xrupt_handlers+0x6/0x6b [<c01f2984>] acpi_enable_subsystem+0x53/0x55 [<c03b3443>] acpi_bus_init+0xc/0x89 [<c03b34fa>] acpi_init+0x3a/0x68 [<c03a679b>] do_initcalls+0x2b/0xb0 [<c01002c0>] init+0x0/0x150 [<c01002f2>] init+0x32/0x150 [<c0101375>] kernel_thread_helper+0x5/0x10 however my board did boot, although I didnt test it very much, but is does now actually switch off when I do a shutdown, which is progress. Ben

1 0

[LinuxBIOS] juergen get in touch with me:
by ron minnich 31 May '07

31 May '07

juergen127(a)kreuzholzen.de Technical details of permanent failure: PERM_FAILURE: SMTP Error (state 13): 550 Host 64.233.184.227 is listed in dnsbl.sorbs.net. thanks ron

1 0

[LinuxBIOS] Fwd: Question about protect mode?
by Darmawan Salihun 31 May '07

31 May '07

---------- Forwarded message ---------- From: Darmawan Salihun <darmawan.salihun(a)gmail.com> Date: May 31, 2007 11:21 PM Subject: Re: [LinuxBIOS] Question about protect mode? To: Juergen Beisert <juergen127(a)kreuzholzen.de> Hi Libo, On 5/31/07, Juergen Beisert <juergen127(a)kreuzholzen.de> wrote: > > Hi, > > On Thursday 31 May 2007 11:00, Yuning Feng wrote: > > To Xia-yin: Processor manual does help. Of course, explanation from > > people here is more specific. > > > > 2007/5/30, Feng, Libo < Libo.Feng(a)amd.com>: > > > Another question is BIOS ROM can attach to XBUS, LPC, someone told me, > > > even PCI, how dose the address forward to the location? > > > > To Libo and Juergen: It seems not every board can do that. Would you > > name some of them ? > > Hmm, every board *must" do it. The CPU outputs the address 0xFFFFFFF0 and > awaits to read its first instruction. The external chipset (if not a SoC) > is > responsible to generate a chip select signal to a device that contains > this > instruction(s) and to forward the "answer" from this device back to the > CPU > data bus. So every board can do it, but maybe not all variants listed > above. > Maybe only one of it, or maybe more than one of it. In the latter case you > > must select in a _chipset_specific_way_ where the device is connected that > contains the boot code. So you should not read processor's manual, you > should > read chipset's manual instead (for the case they are separate devices. On > SoCs they are combined in one silicon). > If you don't know how the chipset can decode the memory access from the processor while in real mode, you should read the "memory mapping" part of the chipset datasheet. In x86 platform, address range between 0xF_0000-0xF_FFFF ( segment 0xF000 -- real mode 16-bit) is aliased to address range just below 4Gb, i.e. 0xFFFF_0000 - 0xFFFF_FFFF. Therefore, while in real mode, the processor can still access the contents of 0xFFFF_FFF0 address by accessing address 0xF_FFF0 because both of them are the same (i.e. aliased). Read the description about PAM (Programmable Attribute Memory? -- i forgot the exact "long name" of the abbreviation) registers in Intel chipset datasheets. You should understand the concept with it, sooner or later ;-) -- -- Darmawan Salihun a.k.a Pinczakko -------------------------------------------------------------------- -= Human knowledge belongs to the world =- -- -- Darmawan Salihun a.k.a Pinczakko -------------------------------------------------------------------- -= Human knowledge belongs to the world =-

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

2004

2003

2002

coreboot May 2007