coreboot February 2007

coreboot@coreboot.org

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169 discussions

[LinuxBIOS] Xvesa on LinuxBIOS
by Alan Carvalho de Assis 25 Feb '07

25 Feb '07

Hi guys, I want place Xvesa (kdrive) inside BIOS, to get graphic mode. First I compiled Xvesa with uclibc, created a rootfs tree with it and compiled the kernel with it inside (CONFIG_INITRAMFS_SOURCE pointing to this directory). Then created a GRUB option to call this kernel image. Using the original BIOS (commercial) it goes fine. I got graphic mode running correctly from this 1.7MB kernel image (initramfs as final rootfs). It will fit in a 2MB flash. After I compiled LinuxBIOS with the original VGA BIOS ROM attached and filo as payload. LinuxBIOS started with VGA text mode and FILO call the GRUB correctly. GRUB start my kernel image but graphic mode don't start. I get this error message: "Interrupt pointer (seg 32 off 0) doesn't point at ROM" This error message is from vm86.c: http://webcvs.freedesktop.org/xserver/xserver/hw/kdrive/vesa/vm86.c?revisio… >From this source I think the interrupt pointer need point to somewhere after 0xC0000 segment, but it is pointing to wrong place (segment 0x32). I don't know why it is occuring with LinuxBIOS. All appear go fine, but just the Interrupt Pointer is wrong. There is someone running X Server (with Driver "vesa" on X config)? I verified this error occur with default X Server as with Xvesa. Cheers, Alan P.S.: I am sending the serial console log attached, maybe it give some help. LinuxBIOS-2.0.0_s2850_Fallback Sun Feb 25 16:10:36 BRT 2007 starting... SBLink=00 NC node|link=00 Ram1.00 Ram2.00 Ram3 Initializing memory: done Ram4 v_esp=000cffe4 testx = 5a5a5a5a Copying data from cache to RAM -- switching to use RAM as stack... Done testx = 5a5a5a5a Disabling cache as ram now Clearing initial memory region: Done Copying LinuxBIOS to RAM. src=fffe0000 dst=00004000 linxbios_ram.nrv2b length = 0000d7d7 linxbios_ram.bin length = 00023150 Jumping to LinuxBIOS. LinuxBIOS-2.0.0_s2850_Fallback Sun Feb 25 18:34:50 BRT 2007 booting... Enumerating buses... APIC_CLUSTER: 0 enabled PCI_DOMAIN: 0000 enabled PCI: 00:18.3 siblings=0 CPU: APIC: 00 enabled PCI: pci_scan_bus for bus 00 PCI: 00:18.0 [1022/1100] enabled PCI: 00:18.1 [1022/1101] enabled PCI: 00:18.2 [1022/1102] enabled PCI: 00:18.3 [1022/1103] enabled PCI: 01:00.0 [1022/7460] enabled PCI: 01:01.0 [1022/7460] enabled next_unitid: 0005 PCI: pci_scan_bus for bus 01 PCI: 01:01.0 [1022/7460] enabled PCI: 01:02.0 [1022/7468] enabled PCI: 01:02.1 [1022/7469] enabled PCI: 01:02.2 [1022/746a] enabled PCI: 01:02.3 [1022/746b] enabled PCI: 01:02.5 [1022/746d] enabled PCI: pci_scan_bus for bus 02 PCI: 02:00.0 [1022/7464] enabled PCI: 02:00.1 [1022/7464] enabled PCI: 02:0b.0 [1002/4752] enabled PCI: 02:0d.0 [14e4/1653] enabled PCI: 02:0e.0 [14e4/1653] enabled PCI: pci_scan_bus returning with max=002 PNP: 002e.0 enabled PNP: 002e.1 disabled PNP: 002e.2 enabled PNP: 002e.3 disabled PNP: 002e.5 enabled PNP: 002e.6 disabled PNP: 002e.7 disabled PNP: 002e.8 disabled PNP: 002e.9 disabled PNP: 002e.a disabled PNP: 002e.b enabled smbus: PCI: 01:02.3[0]->I2C: 01:50 enabled smbus: PCI: 01:02.3[0]->I2C: 01:51 enabled smbus: PCI: 01:02.3[0]->I2C: 01:52 enabled smbus: PCI: 01:02.3[0]->I2C: 01:53 enabled PCI: pci_scan_bus returning with max=002 PCI: pci_scan_bus returning with max=002 done Allocating resources... Reading resources... PCI: 01:01.0 24 <- [0x00fff00000 - 0x00ffefffff] bus 02 prefmem Done reading resources. Allocating VGA resource PCI: 02:0b.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 01:01.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:18.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Setting resources... VGA: PCI: 00:18.0 (aka node 0) link 0 has VGA device PCI: 00:18.0 1b8 <- [0x00fd100000 - 0x00fd0fffff] prefmem <node 0 link 0> PCI: 00:18.0 1c0 <- [0x0000001000 - 0x0000002fff] io <node 0 link 0> PCI: 00:18.0 1b0 <- [0x00fc000000 - 0x00fd0fffff] mem <node 0 link 0> PCI: 01:01.0 1c <- [0x0000001000 - 0x0000001fff] bus 02 io PCI: 01:01.0 20 <- [0x00fc000000 - 0x00fd0fffff] bus 02 mem PCI: 02:00.0 10 <- [0x00fd040000 - 0x00fd040fff] mem PCI: 02:00.1 10 <- [0x00fd041000 - 0x00fd041fff] mem PCI: 02:0b.0 10 <- [0x00fc000000 - 0x00fcffffff] mem PCI: 02:0b.0 14 <- [0x0000001000 - 0x00000010ff] io PCI: 02:0b.0 18 <- [0x00fd042000 - 0x00fd042fff] mem PCI: 02:0b.0 30 <- [0x00ffe00000 - 0x00ffe1ffff] romem PCI: 02:0d.0 10 <- [0x00fd000000 - 0x00fd00ffff] mem64 PCI: 02:0d.0 30 <- [0x00fd010000 - 0x00fd01ffff] romem PCI: 02:0e.0 10 <- [0x00fd020000 - 0x00fd02ffff] mem64 PCI: 02:0e.0 30 <- [0x00fd030000 - 0x00fd03ffff] romem PNP: 002e.0 60 <- [0x00000003f0 - 0x00000003f7] io PNP: 002e.0 70 <- [0x0000000006 - 0x0000000006] irq PNP: 002e.0 74 <- [0x0000000002 - 0x0000000002] drq PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] io PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] irq PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] io PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] io PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] irq PNP: 002e.5 72 <- [0x000000000c - 0x000000000c] irq PNP: 002e.b 60 <- [0x0000000290 - 0x0000000297] io PNP: 002e.b 70 <- [0x0000000005 - 0x0000000005] irq PCI: 01:02.1 20 <- [0x0000002860 - 0x000000286f] io PCI: 01:02.2 10 <- [0x0000002840 - 0x000000285f] io PCI: 01:02.3 58 <- [0x0000002000 - 0x00000020ff] io PCI: 01:02.5 10 <- [0x0000002400 - 0x00000024ff] io PCI: 01:02.5 14 <- [0x0000002800 - 0x000000283f] io PCI: 00:18.3 94 <- [0x00f8000000 - 0x00fbffffff] mem <gart> Done setting resources. Done allocating resources. Enabling resources... PCI: 00:18.0 cmd <- 140 PCI: 01:01.0 bridge ctrl <- 000b PCI: 01:01.0 cmd <- 147 PCI: 02:00.0 subsystem <- 10f1/2850 PCI: 02:00.0 cmd <- 142 PCI: 02:00.1 subsystem <- 10f1/2850 PCI: 02:00.1 cmd <- 142 PCI: 02:0b.0 subsystem <- 10f1/2850 PCI: 02:0b.0 cmd <- 1c3 PCI: 02:0d.0 cmd <- 142 PCI: 02:0e.0 cmd <- 142 PCI: 01:02.0 subsystem <- 10f1/2850 PCI: 01:02.0 cmd <- 14f w83627hf hwm smbus enabled PCI: 01:02.1 subsystem <- 10f1/2850 PCI: 01:02.1 cmd <- 141 PCI: 01:02.2 subsystem <- 10f1/2850 PCI: 01:02.2 cmd <- 141 PCI: 01:02.3 subsystem <- 10f1/2850 PCI: 01:02.3 cmd <- 141 PCI: 01:02.5 subsystem <- 10f1/2850 PCI: 01:02.5 cmd <- 141 PCI: 00:18.1 subsystem <- 10f1/2850 PCI: 00:18.1 cmd <- 140 PCI: 00:18.2 subsystem <- 10f1/2850 PCI: 00:18.2 cmd <- 140 PCI: 00:18.3 cmd <- 140 done. Initializing devices... Root Device init APIC_CLUSTER: 0 init Initializing CPU #0 CPU: vendor AMD device f5a CPU: family 0f, model 05, stepping 0a Enabling cache Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 512MB, type WB DONE variable MTRRs Clear out the extra MTRR's MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled microcode: equivalent processor rev id = 0x004a, patch id = 0x00000000 microcode: patch id that want to apply= 0x00000047 microcode: updated to patch id = 0x00000047 success CPU model AMD Athlon(tm) 64 FX-53 Processor Setting up local apic... apic_id: 0x00 done. Clearing memory 2048K - 524288K: ------- done CPU #0 Initialized All AP CPUs stopped PCI: 00:18.0 init PCI: 01:01.0 init PCI: 02:0b.0 init rom address for PCI: 02:0b.0 = ffe00000 copying VGA ROM Image from 0xffe00000 to 0xc0000, 0x9000 bytes entering emulator halt_sys: file /home/alan/LinuxBIOSv2/src/devices/emulator/x86emu/ops.c, line 47PCI: 01:02.0 init amd8111: ioapic bsp_apicid = 00 RTC Init Invalid CMOS LB checksum enabling HPET @0xfed00000 PNP: 002e.0 init PNP: 002e.2 init PNP: 002e.5 init PNP: 002e.b init PCI: 01:02.1 init IDE1 IDE0 PCI: 01:02.3 init set power on after power fail PCI: 00:18.1 init PCI: 00:18.2 init PCI: 00:18.3 init NB: Function 3 Misc Control.. done. PCI: 02:0d.0 init rom address for PCI: 02:0d.0 = fd000000 Incorrect Expansion ROM Header Signature 14e4 PCI: 02:0e.0 init rom address for PCI: 02:0e.0 = fd020000 Incorrect Expansion ROM Header Signature 14e4 Devices initialized Copying IRQ routing tables to 0xf0000...done. Verifing copy of IRQ routing tables at 0xf0000...done Checking IRQ routing table consistency... check_pirq_routing_table() - irq_routing_table located at: 0x000f0000 /home/alan/LinuxBIOSv2/src/arch/i386/boot/pirq_routing.c: 36:check_pirq_routddone. Wrote the mp table end at: 00000020 - 000001e8 Moving GDT to 0x500...ok Wrote linuxbios table at: 00000530 - 00000db8 checksum 2104 Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3 rom_stream: 0xffe09000 - 0xfffdffff Found ELF candidate at offset 0 Dropping non PT_LOAD segment New segment addr 0x10000 size 0x1ab24 offset 0x134 filesize 0x561c (cleaned up) New segment addr 0x10000 size 0x1ab24 offset 0x134 filesize 0x561c New segment addr 0x91000 size 0x70 offset 0x5750 filesize 0x0 (cleaned up) New segment addr 0x91000 size 0x70 offset 0x5750 filesize 0x0 New segment addr 0x100000 size 0x700000 offset 0x5750 filesize 0x1bb5f9 (cleaned up) New segment addr 0x100000 size 0x700000 offset 0x5750 filesize 0x19Loading Segment: addr: 0x000000001ffb0000 memsz: 0x000000000001ab24 filesz: 0x0cClearing Segment: addr: 0x000000001ffb561c memsz: 0x0000000000015508 Loading Segment: addr: 0x0000000000091000 memsz: 0x0000000000000070 filesz: 0x00Clearing Segment: addr: 0x0000000000091000 memsz: 0x0000000000000070 Loading Segment: addr: 0x0000000000100000 memsz: 0x0000000000700000 filesz: 0x09Clearing Segment: addr: 0x00000000002bb5f9 memsz: 0x0000000000544a07 Jumping to boot code at 0x10000 Firmware type: LinuxBIOS

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[LinuxBIOS] Question About AMD board and BIOS programmer for LinuxBIOS
by Ning (Michael) Qu 25 Feb '07

25 Feb '07

Hi, all, We want to do some experiments in LinuxBIOS on AMD mainboard. But as you know, not all mainboard are supported by LinuxBIOS. We want to know what kind of mainboard (development board) we should buy to run LinuxBIOS on it easily. Could you give us some suggestions? And another question is, if we have make sure what mainboard to buy. Then which programmer should we buy? We are planning to order BIOS programmer from here http://www.ioss.com.tw/web/English/RD1BIOSSavior/SelectionSheet.html, but it still depends on whether we can find a fitful programmer for our new board. Thank you very much for your help! Best,

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[LinuxBIOS] Video recording of FOЅDEM 2007 LinuxBIOS talk
by Uwe Hermann 25 Feb '07

25 Feb '07

Hi all, the LinuxBIOS talk by Ron Minnich at FOSDEM 2007 (OGG, 234 MB) has been published already: http://ftp.belnet.be/mirrors/FOSDEM/2007/FOSDEM2007-LinuxBios.ogg This is highly recommended for anybody interested in LinuxBIOS, its history, how it works, and lots more. See also http://www.fosdem.org/2007/schedule/events/linuxbios. HTH, Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

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[LinuxBIOS] article
by Ward Vandewege 25 Feb '07

25 Feb '07

Someone forwarded me this link: http://www.xbitlabs.com/news/mainboards/display/20070223145912.html which is referring to this post to the Linux Kernel mailing list, dated today: http://permalink.gmane.org/gmane.linux.kernel/496453 The article fails to mention that the BIOS chip is soldered onto the Gigabyte board - we're going to have to warn people about that. Can someone clarify which parts of YH's big patch are still missing to make the MCP55 code build? We have 2 Gigabyte boards, and I've ordered some PLCC sockets that should arrive early next week. Really looking forward to seeing this thing boot LinuxBIOS! Thanks, Ward. -- Ward Vandewege <ward(a)fsf.org> Free Software Foundation - Senior System Administrator

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[LinuxBIOS] r2559 build service
by LinuxBIOS information 24 Feb '07

24 Feb '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "uwe" checked in revision 2559 to the LinuxBIOS source repository and caused the following changes: Change Log: Improve ITE IT8716F support. Signed-off-by: Yinghai Lu <yinghai.lu(a)amd.com> Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Signed-off-by: Ed Swierk <eswierk(a)arastra.com> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Ronald G. Minnich <rminnich(a)gmail.com> Build Log: Configuration of gigabyte:m57sli is still broken Configuration of msi:ms9282 is still broken Configuration of nvidia:l1_2pvv is still broken Configuration of supermicro:h8dmr is still broken Configuration of tyan:s2912 is still broken If something broke during this checkin please be a pain in uwe's neck until the issue is fixed. If this issue is not fixed within 24h the revision will be backed out. Yours truely, LinuxBIOS automatic build system

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[LinuxBIOS] [PATCH] Fix some CHIP_NAME() entries
by Uwe Hermann 24 Feb '07

24 Feb '07

Fix some CHIP_NAME() entries to use canonical names. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> --- Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

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[LinuxBIOS] r2559 - trunk/LinuxBIOSv2/src/superio/ite/it8716f
by svn＠openbios.org 24 Feb '07

24 Feb '07

Author: uwe Date: 2007-02-24 18:39:11 +0100 (Sat, 24 Feb 2007) New Revision: 2559 Modified: trunk/LinuxBIOSv2/src/superio/ite/it8716f/it8716f_early_serial.c trunk/LinuxBIOSv2/src/superio/ite/it8716f/superio.c Log: Improve ITE IT8716F support. Signed-off-by: Yinghai Lu <yinghai.lu(a)amd.com> Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Signed-off-by: Ed Swierk <eswierk(a)arastra.com> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Ronald G. Minnich <rminnich(a)gmail.com> Modified: trunk/LinuxBIOSv2/src/superio/ite/it8716f/it8716f_early_serial.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8716f/it8716f_early_serial.c 2007-02-24 15:18:22 UTC (rev 2558) +++ trunk/LinuxBIOSv2/src/superio/ite/it8716f/it8716f_early_serial.c 2007-02-24 17:39:11 UTC (rev 2559) @@ -3,6 +3,9 @@ * * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> * + * Copyright (C) 2007 AMD + * Written by Yinghai Lu <yinghai.lu(a)amd.com> for AMD. + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or @@ -35,55 +38,34 @@ #define IT8716F_CONFIGURATION_PORT 0x2e /* Write-only. */ -/* The content of IT8716F_CONFIG_REG_LDN (index 0x07) must be set to the - LDN the register belongs to, before you can access the register. */ -static void it8716f_sio_write(uint8_t ldn, uint8_t index, uint8_t value) +/* Perform MB PnP setup to put the SIO chip at 0x2e. */ +/* Base address 0x2e: 0x87 0x01 0x55 0x55. */ +/* Base address 0x4e: 0x87 0x01 0x55 0xaa. */ +static inline void pnp_enter_ext_func_mode(device_t dev) { - outb(IT8716F_CONFIG_REG_LDN, SIO_BASE); - outb(ldn, SIO_DATA); - outb(index, SIO_BASE); - outb(value, SIO_DATA); + unsigned port = dev >> 8; + outb(0x87, port); + outb(0x01, port); + outb(0x55, port); + if (port == 0x4e) { + outb(0xaa, port); + } else { + outb(0x55, port); + } } -/* Enable the peripheral devices on the IT8716F Super I/O chip. */ -static void it8716f_enable_serial(device_t dev, unsigned iobase) +static void pnp_exit_ext_func_mode(device_t dev) { - /* (1) Enter the configuration state (MB PnP mode). */ + pnp_write_config(dev, 0x02, 0x02); +} - /* Perform MB PnP setup to put the SIO chip at 0x2e. */ - /* Base address 0x2e: 0x87 0x01 0x55 0x55. */ - /* Base address 0x4e: 0x87 0x01 0x55 0xaa. */ - outb(0x87, IT8716F_CONFIGURATION_PORT); - outb(0x01, IT8716F_CONFIGURATION_PORT); - outb(0x55, IT8716F_CONFIGURATION_PORT); - outb(0x55, IT8716F_CONFIGURATION_PORT); - - /* (2) Modify the data of configuration registers. */ - - /* Select the chip to configure (if there's more than one). - Set bit 7 to select JP3=1, clear bit 7 to select JP3=0. - If this register is not written, both chips are configured. */ - /* it8716f_sio_write(0x00, IT8716F_CONFIG_REG_CONFIGSEL, 0x00); */ - - /* Enable all devices. */ - it8716f_sio_write(IT8716F_FDC, 0x30, 0x1); /* Floppy */ - it8716f_sio_write(IT8716F_SP1, 0x30, 0x1); /* Serial port 1 */ - it8716f_sio_write(IT8716F_SP2, 0x30, 0x1); /* Serial port 2 */ - it8716f_sio_write(IT8716F_PP, 0x30, 0x1); /* Parallel port */ - it8716f_sio_write(IT8716F_EC, 0x30, 0x1); /* Environment controller */ - it8716f_sio_write(IT8716F_KBCK, 0x30, 0x1); /* Keyboard */ - it8716f_sio_write(IT8716F_KBCM, 0x30, 0x1); /* Mouse */ - it8716f_sio_write(IT8716F_MIDI, 0x30, 0x1); /* MIDI port */ - it8716f_sio_write(IT8716F_GAME, 0x30, 0x1); /* GAME port */ - it8716f_sio_write(IT8716F_IR, 0x30, 0x1); /* Consumer IR */ - - /* Select 24MHz CLKIN (set bit 0). */ - it8716f_sio_write(0x00, IT8716F_CONFIG_REG_CLOCKSEL, 0x01); - - /* Clear software suspend mode (clear bit 0). TODO: Needed? */ - /* it8716f_sio_write(0x00, IT8716F_CONFIG_REG_SWSUSP, 0x00); */ - - /* (3) Exit the configuration state (MB PnP mode). */ - it8716f_sio_write(0x00, IT8716F_CONFIG_REG_CC, 0x02); +static void it8716f_enable_serial(device_t dev, unsigned iobase) +{ + pnp_enter_ext_func_mode(dev); + pnp_set_logical_device(dev); + pnp_set_enable(dev, 0); + pnp_set_iobase(dev, PNP_IDX_IO0, iobase); + pnp_set_enable(dev, 1); + pnp_exit_ext_func_mode(dev); } Modified: trunk/LinuxBIOSv2/src/superio/ite/it8716f/superio.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8716f/superio.c 2007-02-24 15:18:22 UTC (rev 2558) +++ trunk/LinuxBIOSv2/src/superio/ite/it8716f/superio.c 2007-02-24 17:39:11 UTC (rev 2559) @@ -3,6 +3,9 @@ * * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> * + * Copyright (C) 2007 AMD + * Written by Yinghai Lu <yinghai.lu(a)amd.com> for AMD. + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or @@ -24,9 +27,30 @@ #include <pc80/keyboard.h> #include "chip.h" #include "it8716f.h" +#include <arch/io.h> -static void init(device_t dev) +/* Base address 0x2e: 0x87 0x01 0x55 0x55. */ +/* Base address 0x4e: 0x87 0x01 0x55 0xaa. */ +static void pnp_enter_ext_func_mode(device_t dev) { + outb(0x87, dev->path.u.pnp.port); + outb(0x01, dev->path.u.pnp.port); + outb(0x55, dev->path.u.pnp.port); + + if (dev->path.u.pnp.port == 0x4e) { + outb(0xaa, dev->path.u.pnp.port); + } else { + outb(0x55, dev->path.u.pnp.port); + } +} + +static void pnp_exit_ext_func_mode(device_t dev) +{ + pnp_write_config(dev, 0x02, 0x02); +} + +static void it8716f_init(device_t dev) +{ struct superio_ite_it8716f_config *conf; struct resource *res0, *res1; @@ -36,9 +60,8 @@ conf = dev->chip_info; + /* TODO: FDC, PP, EC, KBCM, MIDI, GAME, IR. */ switch (dev->path.u.pnp.device) { - case IT8716F_FDC: /* TODO. */ - break; case IT8716F_SP1: res0 = find_resource(dev, PNP_IDX_IO0); init_uart8250(res0->base, &conf->com1); @@ -47,44 +70,61 @@ res0 = find_resource(dev, PNP_IDX_IO0); init_uart8250(res0->base, &conf->com2); break; - case IT8716F_PP: /* TODO. */ - break; - case IT8716F_EC: /* TODO. */ - break; case IT8716F_KBCK: res0 = find_resource(dev, PNP_IDX_IO0); res1 = find_resource(dev, PNP_IDX_IO1); init_pc_keyboard(res0->base, res1->base, &conf->keyboard); break; - case IT8716F_KBCM: /* TODO. */ - break; - case IT8716F_MIDI: /* TODO. */ - break; - case IT8716F_GAME: /* TODO. */ - break; - case IT8716F_IR: /* TODO. */ - break; } } +static void it8716f_pnp_set_resources(device_t dev) +{ + pnp_enter_ext_func_mode(dev); + pnp_set_resources(dev); + pnp_exit_ext_func_mode(dev); +} + +static void it8716f_pnp_enable_resources(device_t dev) +{ + pnp_enter_ext_func_mode(dev); + pnp_enable_resources(dev); + pnp_exit_ext_func_mode(dev); +} + +static void it8716f_pnp_enable(device_t dev) +{ + pnp_enter_ext_func_mode(dev); + pnp_set_logical_device(dev); + pnp_set_enable(dev, dev->enabled); + pnp_exit_ext_func_mode(dev); +} + static struct device_operations ops = { .read_resources = pnp_read_resources, - .set_resources = pnp_set_resources, - .enable_resources = pnp_enable_resources, - .enable = pnp_enable, - .init = init, + .set_resources = it8716f_pnp_set_resources, + .enable_resources = it8716f_pnp_enable_resources, + .enable = it8716f_pnp_enable, + .init = it8716f_init, }; -/* TODO: FDC, PP, EC, KBCM, MIDI, GAME, IR. */ static struct pnp_info pnp_dev_info[] = { - { &ops, IT8716F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, - { &ops, IT8716F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, }, - { &ops, IT8716F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, }, + { &ops, IT8716F_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, + { &ops, IT8716F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, IT8716F_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, IT8716F_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, }, + { &ops, IT8716F_EC, }, + { &ops, IT8716F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, { 0x7ff, 0x4}, }, + { &ops, IT8716F_KBCM, PNP_IRQ0, }, + // No 7 { 0,}, + { &ops, IT8716F_MIDI, PNP_IO0 | PNP_IRQ0, {0x7fe, 0x4}, }, + { &ops, IT8716F_GAME, PNP_IO0, { 0x7ff, 0 }, }, + { &ops, IT8716F_IR, }, }; static void enable_dev(struct device *dev) { - pnp_enable_devices(dev, &pnp_ops, + pnp_enable_devices(dev, &ops, sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); }

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[LinuxBIOS] r2558 build service
by LinuxBIOS information 24 Feb '07

24 Feb '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "uwe" checked in revision 2558 to the LinuxBIOS source repository and caused the following changes: Change Log: Remove unused defines. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Ronald G. Minnich <rminnich(a)gmail.com> Build Log: Configuration of gigabyte:m57sli is still broken Configuration of msi:ms9282 is still broken Configuration of nvidia:l1_2pvv is still broken Configuration of supermicro:h8dmr is still broken Configuration of tyan:s2912 is still broken If something broke during this checkin please be a pain in uwe's neck until the issue is fixed. If this issue is not fixed within 24h the revision will be backed out. Yours truely, LinuxBIOS automatic build system

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[LinuxBIOS] [PATCH] Remove unused defines
by Uwe Hermann 24 Feb '07

24 Feb '07

Remove some unused defines from the code. Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

2 2

[LinuxBIOS] r2558 - trunk/LinuxBIOSv2/src/superio/winbond/w83627ehg
by svn＠openbios.org 24 Feb '07

24 Feb '07

Author: uwe Date: 2007-02-24 16:18:22 +0100 (Sat, 24 Feb 2007) New Revision: 2558 Modified: trunk/LinuxBIOSv2/src/superio/winbond/w83627ehg/chip.h Log: Remove unused defines. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Ronald G. Minnich <rminnich(a)gmail.com> Modified: trunk/LinuxBIOSv2/src/superio/winbond/w83627ehg/chip.h =================================================================== --- trunk/LinuxBIOSv2/src/superio/winbond/w83627ehg/chip.h 2007-02-19 19:11:20 UTC (rev 2557) +++ trunk/LinuxBIOSv2/src/superio/winbond/w83627ehg/chip.h 2007-02-24 15:18:22 UTC (rev 2558) @@ -19,18 +19,11 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#ifndef SIO_COM1 -#define SIO_COM1_BASE 0x3f8 -#endif -#ifndef SIO_COM2 -#define SIO_COM2_BASE 0x2f8 -#endif - -extern struct chip_operations superio_winbond_w83627ehg_ops; - #include <pc80/keyboard.h> #include <uart8250.h> +extern struct chip_operations superio_winbond_w83627ehg_ops; + struct superio_winbond_w83627ehg_config { struct uart8250 com1, com2; struct pc_keyboard keyboard;

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coreboot February 2007