coreboot December 2006

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[LinuxBIOS] #58: abuild: Fails for iwill/dk8_htx due to hardcoded paths
by LinuxBIOS 04 Dec '06

04 Dec '06

#58: abuild: Fails for iwill/dk8_htx due to hardcoded paths ---------------------------------+------------------------------------------ Reporter: uwe | Owner: stepan Type: defect | Status: new Priority: major | Milestone: Component: testsystem | Version: v2 Keywords: abuild | Dependencies: Patchstatus: there is no patch | ---------------------------------+------------------------------------------ When invoking 'abuild' manually it fails due to some hardcoded paths. {{{ Processing mainboard/iwill/dk8_htx (i386: ok) Using existing test target /home/uwe/code/linuxbios/repos/trunk/LinuxBIOSv2/targets/iwill/dk8_htx /Config-abuild.lb ok Creating builddir...ok Compiling image ..FAILED after 3s! Log excerpt: nm -n linuxbios | sort > linuxbios.map objcopy --gap-fill 0xff -O binary linuxbios linuxbios.strip make[1]: *** No rule to make target `/home/stepan/svn/LinuxBIOSv2/util/abuild/LinuxBIOS- payloads/payloads/default/filo-0.5.0.elf', needed by `payload.lzma'. Stop. make[1]: Leaving directory `/home/uwe/code/linuxbios/repos/trunk/LinuxBIOSv2/util/abuild/linuxbios- builds/iwill_dk8_htx/normal' make: *** [normal/linuxbios.rom] Error 1 }}} -- Ticket URL: <http://tracker.linuxbios.org/trac/LinuxBIOS/ticket/58> LinuxBIOS <http://www.linuxbios.org/>

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[LinuxBIOS] r2516 - in trunk/LinuxBIOSv2/src/superio/ite: it8661f it8671f it8673f it8705f it8712f it8716f it8718f
by svn＠openbios.org 04 Dec '06

04 Dec '06

Author: uwe Date: 2006-12-04 00:46:36 +0100 (Mon, 04 Dec 2006) New Revision: 2516 Modified: trunk/LinuxBIOSv2/src/superio/ite/it8661f/it8661f_early_serial.c trunk/LinuxBIOSv2/src/superio/ite/it8671f/it8671f_early_serial.c trunk/LinuxBIOSv2/src/superio/ite/it8673f/it8673f_early_serial.c trunk/LinuxBIOSv2/src/superio/ite/it8705f/it8705f_early_serial.c trunk/LinuxBIOSv2/src/superio/ite/it8712f/it8712f_early_serial.c trunk/LinuxBIOSv2/src/superio/ite/it8716f/it8716f_early_serial.c trunk/LinuxBIOSv2/src/superio/ite/it8718f/it8718f_early_serial.c Log: Remove #include <device/device.h> from all *_early_serial.c ITE Super I/O files, as arch/romcc_io.h already #defines device_t, thus adding device/device.h breaks the build (trivial). Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/LinuxBIOSv2/src/superio/ite/it8661f/it8661f_early_serial.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8661f/it8661f_early_serial.c 2006-12-02 16:48:48 UTC (rev 2515) +++ trunk/LinuxBIOSv2/src/superio/ite/it8661f/it8661f_early_serial.c 2006-12-03 23:46:36 UTC (rev 2516) @@ -19,7 +19,6 @@ */ #include <arch/romcc_io.h> -#include <device/device.h> #include "it8661f.h" /* The base address is 0x3f0, 0x3bd, or 0x370, depending on config bytes. */ Modified: trunk/LinuxBIOSv2/src/superio/ite/it8671f/it8671f_early_serial.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8671f/it8671f_early_serial.c 2006-12-02 16:48:48 UTC (rev 2515) +++ trunk/LinuxBIOSv2/src/superio/ite/it8671f/it8671f_early_serial.c 2006-12-03 23:46:36 UTC (rev 2516) @@ -19,7 +19,6 @@ */ #include <arch/romcc_io.h> -#include <device/device.h> #include "it8671f.h" /* The base address is 0x3f0, 0x3bd, or 0x370, depending on config bytes. */ Modified: trunk/LinuxBIOSv2/src/superio/ite/it8673f/it8673f_early_serial.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8673f/it8673f_early_serial.c 2006-12-02 16:48:48 UTC (rev 2515) +++ trunk/LinuxBIOSv2/src/superio/ite/it8673f/it8673f_early_serial.c 2006-12-03 23:46:36 UTC (rev 2516) @@ -19,7 +19,6 @@ */ #include <arch/romcc_io.h> -#include <device/device.h> #include "it8673f.h" /* The base address is 0x3f0, 0x3bd, or 0x370, depending on config bytes. */ Modified: trunk/LinuxBIOSv2/src/superio/ite/it8705f/it8705f_early_serial.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8705f/it8705f_early_serial.c 2006-12-02 16:48:48 UTC (rev 2515) +++ trunk/LinuxBIOSv2/src/superio/ite/it8705f/it8705f_early_serial.c 2006-12-03 23:46:36 UTC (rev 2516) @@ -19,7 +19,6 @@ */ #include <arch/romcc_io.h> -#include <device/device.h> #include "it8705f.h" /* The base address is 0x2e or 0x4e, depending on config bytes. */ Modified: trunk/LinuxBIOSv2/src/superio/ite/it8712f/it8712f_early_serial.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8712f/it8712f_early_serial.c 2006-12-02 16:48:48 UTC (rev 2515) +++ trunk/LinuxBIOSv2/src/superio/ite/it8712f/it8712f_early_serial.c 2006-12-03 23:46:36 UTC (rev 2516) @@ -19,7 +19,6 @@ */ #include <arch/romcc_io.h> -#include <device/device.h> #include "it8712f.h" /* The base address is 0x2e or 0x4e, depending on config bytes. */ Modified: trunk/LinuxBIOSv2/src/superio/ite/it8716f/it8716f_early_serial.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8716f/it8716f_early_serial.c 2006-12-02 16:48:48 UTC (rev 2515) +++ trunk/LinuxBIOSv2/src/superio/ite/it8716f/it8716f_early_serial.c 2006-12-03 23:46:36 UTC (rev 2516) @@ -19,7 +19,6 @@ */ #include <arch/romcc_io.h> -#include <device/device.h> #include "it8716f.h" /* The base address is 0x2e or 0x4e, depending on config bytes. */ Modified: trunk/LinuxBIOSv2/src/superio/ite/it8718f/it8718f_early_serial.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8718f/it8718f_early_serial.c 2006-12-02 16:48:48 UTC (rev 2515) +++ trunk/LinuxBIOSv2/src/superio/ite/it8718f/it8718f_early_serial.c 2006-12-03 23:46:36 UTC (rev 2516) @@ -19,7 +19,6 @@ */ #include <arch/romcc_io.h> -#include <device/device.h> #include "it8718f.h" /* The base address is 0x2e or 0x4e, depending on config bytes. */

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Re: [LinuxBIOS] #57: libusb host program for PLX NET20DC debug device
by Lu, Yinghai 03 Dec '06

03 Dec '06

Thanks for the code. In LinuxBIOS, I put usbdevice_direct.c in lib/, and call it from usb2_init in mcp55_usb2.c Got "No device in debug port" Waiting for cable, hope to get that cable next Tuesday. Will create usbdebug_direct_console.c in console/ for linuxbios_ram code. also usbdebug_direct_serial.c in pc80/ for cache_as_ram.c YH

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[LinuxBIOS] epia
by Tyler Pohl 02 Dec '06

02 Dec '06

http://linuxbios.org/Supported_Motherboards I see the epia is "Broken". No wonder I could never get it to work properly. Is anyone ever going to get this to work? What's broken anyhow? I know the processor is missing the CMOV instruction. Thanks Tyler Pohl

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Re: [LinuxBIOS] Intel 815
by Corey Osgood 02 Dec '06

02 Dec '06

Shaddam Corrino IV wrote: > > I had a closer look at this i815 platform > > it contains : > > FW82815 > FW82801BA > SST49LF004A, which seems to be 512KiB flash > > Unfortunatelly, it seems that the above flash is soldered to the MBO :-( This is the case with the D815EEA, but other motherboards (probably not from intel) may have removable flash. I'm not really concerned with this, I ordered an extra plcc socket and a couple flash chips for this board when I ordered the flash chips for the athlon, and I don't think I'll have any problem with the sodiering process. If you've never used a sodiering iron before though, you might want to see if you can find someone to do it for you. > > Does it mean there's no way I can use the system for L/B or is there > some inexpensive way to correct this deficiency? > > Not sure if that's a good price, but you can get complete 1 GHZ i815 > systems (ie ready for use desktop) here for about $65. That's about what I paid for mine, just for the 1ghz cpu and mobo, then another $40 for 512mb PC133 and an asus P2-99 (440zx), and case/power supply/hard drive/cdrom from my collection. I've been following the discussion about i855 support, and that honestly has me concerned. This, if i remember right, was the first (well, second, but afaik it's just i810+graphics) desktop chipset intel made after ending the 440 line, so I don't know how good the docs will be (ie did intel decide to go into lockdown yet or no?), and if they suck royally, I probably won't bother messing around with this. -Corey Oops, forgot to cc the mailing list!

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[LinuxBIOS] r2515 - trunk/LinuxBIOSv2/util/romcc
by svn＠openbios.org 02 Dec '06

02 Dec '06

Author: stepan Date: 2006-12-02 17:48:48 +0100 (Sat, 02 Dec 2006) New Revision: 2515 Modified: trunk/LinuxBIOSv2/util/romcc/romcc.c Log: fix romcc preprocessor bug Signed-off-by: Eric Biederman <ebiederman(a)lnxi.com> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/LinuxBIOSv2/util/romcc/romcc.c =================================================================== --- trunk/LinuxBIOSv2/util/romcc/romcc.c 2006-12-01 15:25:21 UTC (rev 2514) +++ trunk/LinuxBIOSv2/util/romcc/romcc.c 2006-12-02 16:48:48 UTC (rev 2515) @@ -3,8 +3,8 @@ #undef RELEASE_DATE #undef VERSION #define VERSION_MAJOR "0" -#define VERSION_MINOR "68" -#define RELEASE_DATE "15 November 2004" +#define VERSION_MINOR "69" +#define RELEASE_DATE "02 December 2006" #define VERSION VERSION_MAJOR "." VERSION_MINOR #include <stdarg.h> @@ -4028,10 +4028,15 @@ tok = TOK_SPACE; tokp = next_char(file, tokp, 1); while((c = get_char(file, tokp)) != -1) { - tokp = next_char(file, tokp, 1); + /* Advance to the next character only after we verify + * the current character is not a newline. + * EOL is special to the preprocessor so we don't + * want to loose any. + */ if (c == '\n') { break; } + tokp = next_char(file, tokp, 1); } } /* Comments */

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[LinuxBIOS] romcc and preprocessor problems
by Stefan Reinauer 02 Dec '06

02 Dec '06

Hi, since the romcc builtin preprocessor silently eats lines of code, can we just use the gcc preprocessor (cpp) before calling romcc as a workaround? Is there a reason romcc has its own preprocessor? Stefan -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: info(a)coresystems.de • http://www.coresystems.de/

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[LinuxBIOS] MIPS arch.
by Anton 02 Dec '06

02 Dec '06

Hi. IIRC, LinuxBIOS is available for Alpha, x86 and .. it's all? No MIPS?

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Re: [LinuxBIOS] Support for recent chipset and powerful desktop CPU
by Vlad C. 02 Dec '06

02 Dec '06

> Suggestions: > - Asus M2N-E >(http://www.asus.com/products4.aspx?l1=3&l2=101&l3=308&model=1181&modelmenu=2) > - MSI K9N Platinum >(http://www.msi.com.tw/program/products/mainboard/mbd/pro_mbd_detail.php?UID…) Simon, The MSI K9N Platinum motherboard has an IEEE1394 (FireWire) chipset, while the Asus M2N-E does not. You mentioned earlier that youre designing a PVR/MediaCenter PC -- lots of consumer devices such as cable boxes and digital cameras use FireWire to transfer images and video. MythTV can use FireWire[1] and according to Wikipedia almost all modern digital camcorders have included this connection since 1995. [2] I think the MSI K9N Platinum motherboard would therefore be better suited for a Multimedia PC. Vlad [1] http://www.mythtv.org/wiki/index.php/FireWire [2] http://en.wikipedia.org/wiki/FireWire ____________________________________________________________________________________ Want to start your own business? Learn how on Yahoo! Small Business. http://smallbusiness.yahoo.com/r-index

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Re: [LinuxBIOS] #57: libusb host program for PLX NET20DC debug device
by Lu, Yinghai 01 Dec '06

01 Dec '06

-----Original Message----- From: ebiederm(a)xmission.com [mailto:ebiederm@xmission.com] Sent: Friday, December 01, 2006 1:15 PM Peter Stuge <stuge-linuxbios(a)cdy.org> writes: >> On Fri, Dec 01, 2006 at 11:19:16AM -0800, Greg KH wrote: >>> Well, earlyprintk will not work, as you need PCI up and running. >> >> Not all of it though. LinuxBIOS will probably do just enough PCI >> setup to talk to the EHCI controller and use the debug port _very_ >> soon after power on. >Right. For LinuxBIOS not a problem for earlyprintk in the kernel >somethings might need to be refactored. The challenge in the kernel >is we don't know at build to how to do a pci_read_config... early_pci_read_config? Otherwise printk will come too late, and will not get output before pci bus ops is set. >The other hard part early in the kernel is the fact that the >bar is memory mapped I/O. Which means it will need to get mapped >into the kernels page tables. several entries to map 0xfc000000 ( PCI IO mem range) in page table in head.S? YH

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coreboot December 2006