coreboot September 2005

coreboot@coreboot.org

45 participants
117 discussions

RE: [LinuxBIOS] Building a viable rom *without* the fallback image
by Lu, Yinghai 16 Sep '05

16 Sep '05

You can change the ROM_SIZE in MB Option.lb to make final Normal+Fallback size to 512K. YH ________________________________ From: linuxbios-bounces(a)openbios.org [mailto:linuxbios-bounces@openbios.org] On Behalf Of San Mehat Sent: Friday, September 16, 2005 8:34 AM To: LinuxBIOS Subject: [LinuxBIOS] Building a viable rom *without* the fallback image Hey all, I'm trying to figure out how to do a build a rom which contains *only* the normal image and not the fallback. For my purposes I don't believe I need a fallback image since I'm burning my images to a ROM emulator. The rom in question is only 512k and I need to fit 'other stuff' in there as well. Appreciate it :) -San

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[LinuxBIOS] Building a viable rom *without* the fallback image
by San Mehat 16 Sep '05

16 Sep '05

Hey all, I'm trying to figure out how to do a build a rom which contains *only* the normal image and not the fallback. For my purposes I don't believe I need a fallback image since I'm burning my images to a ROM emulator. The rom in question is only 512k and I need to fit 'other stuff' in there as well. Appreciate it :) -San

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[LinuxBIOS] linuxbios summit confusion
by Ronald G Minnich 15 Sep '05

15 Sep '05

folks, the linuxbios summit is oct. 11-13, in spite of what you may have seen on the web page. thanks! ron

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RE: [LinuxBIOS] PLCC removal trick
by Rodney.Kittleson＠bench.com 15 Sep '05

15 Sep '05

I was looking at the PromJet over a year ago, it runs around $1,500 with the LPC/FWH option. They seem to nickle and dime you with this unit. Base price + LPC/FWH support + 32PLCC adapter + ethernet (Parallel Port is standard). http://www.emutec.com/pjetmain.html Rod > > > >Sorry, I should have googled more first. The manuals are at: > >http://www.tech-tools.com/romtools.htm > > I looked at the FlexROM III, it appears to emulate just flat 8 or 16 > bit devices. PLCC's are more complicated, they frequently make use of > an LPC interface that clocks in 4 bits of data at a time (as I recall) > to get the address into the chip, then clocks out 4 bits of data at a > time. I think an operation is 16 bits at a time. This is all > transparent > from the system's perspective. However behind the scenes it is a > complicated dance. > > LPC = Low Pin Count > > -Dave > > -- > LinuxBIOS mailing list > LinuxBIOS(a)openbios.org > http://www.openbios.org/mailman/listinfo/linuxbios >

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RE: [LinuxBIOS] PLCC removal trick
by Jim Cooper 15 Sep '05

15 Sep '05

I have heard of using canned air to blow the solder out and crystallize it, but I don't think I would try this. I use a heat gun and pair of IC tweezers. Whatever you do, add some solder paste so it reflows first. Ideally you should use a tip for the PLCC that concentrates the heat on the legs of the chip and doesn't overheat the chip itself. Take a look at the temp ratings of the chip if you use the heatgun approach. Most chips are only rated to take that kind of heat a little longer than it takes to reflow the solder. -----Original Message----- From: linuxbios-bounces(a)openbios.org [mailto:linuxbios-bounces@openbios.org] On Behalf Of Steve Gehlbach Sent: Thursday, September 15, 2005 11:41 AM To: Guido Fiala Cc: linuxbios(a)openbios.org Subject: Re: [LinuxBIOS] PLCC removal trick Guido Fiala wrote: >On Wednesday 14 September 2005 21:56, Dave Ashley wrote: > > >>I don't know about anyone else but the dental floss idea didn't work >>at all for me, the floss interferes with the pins. >> >>I had this idea on how to remove the chip easily, but I haven't tried >>it. Just get some strong epoxy and glue onto the top surface of the >>flashrom something to act as a handle. After it's dry, use that to >>pull the chip out. >> >> > >Instead of epoxy you might use hot-glue (or whats it called), or, even >better, "Power Strip" - a removable 2-side-glue flexible tape... > > > > It's a good idea, but keep in mind that some programmers (such as my Needhams) have a cover that closes over the chip to program it, so a removal knob might interfere with closing the cover. Maybe the programmer will make contact anyway with the cover open, haven't tried it so I don't know. Steve -- LinuxBIOS mailing list LinuxBIOS(a)openbios.org http://www.openbios.org/mailman/listinfo/linuxbios

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[LinuxBIOS] EPIA-M + EPIA-SP V2 cache init
by Dave Ashley 15 Sep '05

15 Sep '05

I've had success in V2 for EPIA-SP by pulling ASM code from V1 and replacing the whole early_mtrr_init() call from V2, with this, placed right at the start of auto.c (see below). The romcc generated code works fast enough, but it really makes a difference when the linux kernel is uncompressed later. I don't really know what is happening though, I'm not an expert on the low level cache setup. There is difference between the V2 early_mtrr_init functionality and what was in V1. __asm__ volatile ( "\n" " invd\n" "earlymtrr_start:\n" " xorl %%eax, %%eax\n" " xorl %%edx, %%edx\n" " movl $fixed_mtrr_msr, %%esi\n" "clear_fixed_var_mtrr:\n" " lodsl (%%esi), %%eax\n" " testl %%eax, %%eax\n" " jz clear_fixed_var_mtrr_out\n" " movl %%eax, %%ecx\n" " xorl %%eax, %%eax\n" " wrmsr\n" " jmp clear_fixed_var_mtrr\n" "clear_fixed_var_mtrr_out:\n" "set_fixed_mtrr:\n" " movl $0x250, %%ecx\n" " rdmsr\n" " movl $0x06060606, %%edx\n" " movl $0x06060606, %%eax\n" " wrmsr\n" " movl $0x258, %%ecx\n" " rdmsr\n" " movl $0x06060606, %%edx\n" " movl $0x06060606, %%eax\n" " wrmsr\n" "set_var_mtrr:\n" " movl $0x200, %%ecx\n" " rdmsr\n" " andl $0xfffffff0, %%edx\n" " orl $0x00000000, %%edx\n" " andl $0x00000f00, %%eax\n" " orl $0x00000006, %%eax\n" " wrmsr\n" " movl $0x201, %%ecx\n" " rdmsr\n" " andl $0xfffffff0, %%edx\n" " orl $0x0000000f, %%edx\n" " andl $0x000007ff, %%eax\n" " orl $0xf0000800, %%eax\n" " wrmsr\n" "enable_mtrr:\n" " movl $0x2ff, %%ecx\n" " xorl %%edx, %%edx\n" " movl $0x00000c00, %%eax\n" " wrmsr\n" " movl %%cr0, %%eax\n" " andl $0x9fffffff,%%eax\n" " movl %%eax, %%cr0\n" " jmp earlymtrr_end\n" "fixed_mtrr_msr:\n" " .long 0x250, 0x258, 0x259\n" " .long 0x268, 0x269, 0x26A\n" " .long 0x26B, 0x26C, 0x26D\n" " .long 0x26E, 0x26F\n" "var_mtrr_msr:\n" " .long 0x200, 0x201, 0x202, 0x203\n" " .long 0x204, 0x205, 0x206, 0x207\n" " .long 0x208, 0x209, 0x20A, 0x20B\n" " .long 0x20C, 0x20D, 0x20E, 0x20F\n" " .long 0x000\n" "earlymtrr_end:\n");

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Re: [LinuxBIOS] PLCC removal trick
by Dave Ashley 15 Sep '05

15 Sep '05

>Sorry, I should have googled more first. The manuals are at: >http://www.tech-tools.com/romtools.htm I looked at the FlexROM III, it appears to emulate just flat 8 or 16 bit devices. PLCC's are more complicated, they frequently make use of an LPC interface that clocks in 4 bits of data at a time (as I recall) to get the address into the chip, then clocks out 4 bits of data at a time. I think an operation is 16 bits at a time. This is all transparent from the system's perspective. However behind the scenes it is a complicated dance. LPC = Low Pin Count -Dave

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Re: [LinuxBIOS] Re: serial debug messages workaround
by Dave Ashley 14 Sep '05

14 Sep '05

>When I put this code in auto.c (V2) before the early_mtrr_init(): > __asm__ volatile (" invd"); I spoke too soon, the problem isn't fixed by just doing the invd. -Dave

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[LinuxBIOS] Re: serial debug messages workaround
by Dave Ashley 14 Sep '05

14 Sep '05

Jon McDowell wrote: >I committed similar change for EPIA-M earlier today; I'm now getting a I looked at V1 epia-m support and found there was a workaround: /* new Via Edens seem to need an early invalidate - before enabling * caches */ invd When I put this code in auto.c (V2) before the early_mtrr_init(): __asm__ volatile (" invd"); all the strange behaviour goes away, and booting is fast again. -Dave

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[LinuxBIOS] Re: serial debug messages workaround
by Dave Ashley 14 Sep '05

14 Sep '05

Doug Bell was having trouble with serial out on epia-sp. I tracked this problem to the cache. If the early_mtrr_init() call isn't done, the problem goes away. Within early_mtrr_init() if the call to enable_cache() is commented out, the problem goes away. Enabling the cache on the c3 Nehemia is causing strange behaviour. This mailing list is pretty much dead as regards actual help, NXTV is working on epia-sp support and we'll be contributing our results back to the project. Some support would be in order. I/NXTV contributed plenty years ago to the epia-m support for V1, as many old timers will attest. -Dave

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coreboot September 2005