coreboot September 2005

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117 discussions

[LinuxBIOS] LNXI Merge: lnxi-patch-01/16
by jason schildt 02 Sep '05

02 Sep '05

## lnxi-patch-1 ## - (2)files src/southbridge/amd/amd8111/amd8111_acpi.c // amd8111_enable is commented out in public tree, but enabled in // hdama. resolution: copied over for merge DIFFSTAT --------------------------------------------------------- amd8111_acpi.c | 5 +++-- amd8111_pci.c | 1 + 2 files changed, 4 insertions(+), 2 deletions(-) PATCH --------------------------------------------------------- Index: southbridge/amd/amd8111/amd8111_pci.c =================================================================== --- southbridge/amd/amd8111/amd8111_pci.c (revision 1105) +++ southbridge/amd/amd8111/amd8111_pci.c (working copy) @@ -55,6 +55,7 @@ .enable_resources = pci_bus_enable_resources, .init = pci_init, .scan_bus = pci_scan_bridge, + /* PCI Subordinate bus reset is not implemented */ .ops_pci = &lops_pci, }; Index: southbridge/amd/amd8111/amd8111_acpi.c =================================================================== --- southbridge/amd/amd8111/amd8111_acpi.c (revision 1105) +++ southbridge/amd/amd8111/amd8111_acpi.c (working copy) @@ -97,6 +97,7 @@ #endif + /* power after power fail */ on = MAINBOARD_POWER_ON_AFTER_POWER_FAIL; get_option(&on, "power_on_after_fail"); byte = pci_read_config8(dev, PREVIOUS_POWER_STATE); @@ -106,7 +107,7 @@ } pci_write_config8(dev, PREVIOUS_POWER_STATE, byte); printk_info("set power %s after power fail\n", on?"on":"off"); - + /* Throttle the CPU speed down for testing */ on = SLOW_CPU_OFF; get_option(&on, "slow_cpu"); @@ -177,7 +178,7 @@ .enable_resources = acpi_enable_resources, .init = acpi_init, .scan_bus = scan_static_bus, -// .enable = amd8111_enable, + .enable = amd8111_enable, .ops_pci = &lops_pci, .ops_smbus_bus = &lops_smbus_bus, }; Using Opera's revolutionary e-mail client: http://www.opera.com/mail/

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[LinuxBIOS] LNXI Merge: lnxi-patch02/16
by jason schildt 02 Sep '05

02 Sep '05

DESCRIPTION: --------------------------------------------------------- ## lnxi-patch-2 ## - (3)files src/southbridge/amd/amd8111/amd8111_lpc.c powermanagment removed. copied to public tree src/southbridge/amd/amd8111/Config.lb src/southbridge/amd/amd8111/amd8111_usb.c uncommented amd8111_enable DIFFSTAT: --------------------------------------------------------- Config.lb | 9 ++++----- amd8111_lpc.c | 12 ++++-------- amd8111_usb.c | 2 +- 3 files changed, 9 insertions(+), 14 deletions(-) PATCH: --------------------------------------------------------- Index: amd8111_lpc.c =================================================================== --- amd8111_lpc.c (revision 1105) +++ amd8111_lpc.c (working copy) @@ -84,7 +84,7 @@ return; } printk_spew("for IRQ, reg 0x%08x value 0x%08x 0x%08x\n", - a->reg, a->value_low, a->value_high); + a->reg, a->value_low, a->value_high); } } @@ -113,13 +113,9 @@ byte = pci_read_config8(dev, 0x46); pci_write_config8(dev, 0x46, byte | (1<<0)); - /* power after power fail */ + /* Enable 5Mib Rom window */ byte = pci_read_config8(dev, 0x43); - if (pwr_on) { - byte &= ~(1<<6); - } else { - byte |= (1<<6); - } + byte |= 0xC0; pci_write_config8(dev, 0x43, byte); /* Enable Port 92 fast reset */ @@ -179,7 +175,7 @@ static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device) { pci_write_config32(dev, 0x70, - ((device & 0xffff) << 16) | (vendor & 0xffff)); + ((device & 0xffff) << 16) | (vendor & 0xffff)); } static struct pci_operations lops_pci = { Index: Config.lb =================================================================== --- Config.lb (revision 1105) +++ Config.lb (working copy) @@ -1,12 +1,11 @@ config chip.h driver amd8111.o -#driver amd8111_usb.o +driver amd8111_usb.o driver amd8111_lpc.o driver amd8111_ide.o driver amd8111_acpi.o -#driver amd8111_usb2.o -#driver amd8111_ac97.o -#driver amd8111_nic.o +driver amd8111_usb2.o +driver amd8111_ac97.o +driver amd8111_nic.o driver amd8111_pci.o driver amd8111_smbus.o -object amd8111_reset.o Index: amd8111_usb.c =================================================================== --- amd8111_usb.c (revision 1105) +++ amd8111_usb.c (working copy) @@ -26,7 +26,7 @@ .enable_resources = pci_dev_enable_resources, .init = 0, .scan_bus = scan_static_bus, -// .enable = amd8111_enable, + .enable = amd8111_enable, .ops_pci = &lops_pci, }; -- Using Opera's revolutionary e-mail client: http://www.opera.com/mail/

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RE: [LinuxBIOS] Building Linuxbiosv2
by Lu, Yinghai 02 Sep '05

02 Sep '05

Yes, But you can not enable filo in Etherboot.... YH

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RE: [LinuxBIOS] Building Linuxbiosv2
by Lu, Yinghai 02 Sep '05

02 Sep '05

I don't think so, That web only for normal BIOS payloads? He need to download the source code, and set the option to LinuxBIOS and compile it. http://www.linuxbios.org/index.php/Etherboot YH -----Original Message----- From: linuxbios-bounces(a)openbios.org [mailto:linuxbios-bounces@openbios.org] On Behalf Of Peter Stuge Sent: Friday, September 02, 2005 12:45 AM To: linuxbios(a)openbios.org Subject: Re: [LinuxBIOS] Building Linuxbiosv2 On Thu, Sep 01, 2005 at 02:45:04AM -0700, Narahari, Narasimhaiah (IE10) wrote: > Can any body tell me where do I get this payload image > (tg3--ide_disk.zelf)? You can create one at http://www.rom-o-matic.net/ //Peter -- LinuxBIOS mailing list LinuxBIOS(a)openbios.org http://www.openbios.org/mailman/listinfo/linuxbios

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Re: [LinuxBIOS] Building Linuxbiosv2
by Peter Stuge 02 Sep '05

02 Sep '05

On Thu, Sep 01, 2005 at 02:45:04AM -0700, Narahari, Narasimhaiah (IE10) wrote: > Can any body tell me where do I get this payload image > (tg3--ide_disk.zelf)? You can create one at http://www.rom-o-matic.net/ //Peter

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[LinuxBIOS] Open Gaming Console
by Nathaniel Dube 01 Sep '05

01 Sep '05

Has any one ever thought of making a gaming console using LinuxBIOS? I would like to put one together using open standard hardware and with a linux based OS. The goal, to create a openstandard/opensource game console. Then game companies can make games for low prices since this system doesn't have to deal in royalties. I hear the Xbox360 will be around $300 and the games $60. I think that's complete bull spit. I think it's time for people in the Linux world to make our own game console. We made a operating system as an alternative to Windows now it's time to do the same with their game console. We gave the computer world freedom now lets give the gaming world freedom so junior (as well as adults) aren't spending arm and leg for games, consoles and other parts. It's not just money I want people to save but to give them back freedom in the technology they use. The hardware side of this project is easy. The hard part is putting together a small Linux OS for it and customizing LinuxBIOS for this kind of system. If any one wants to start such project let me know. All I have are ideas, what I don't have is the knowledge to pull this off. Which is why I need some of you talented people to help me start a project to pull this off.

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[LinuxBIOS] Building Linuxbiosv2
by Narahari, Narasimhaiah (IE10) 01 Sep '05

01 Sep '05

Hi everyone, I could build the LinuxBIOSv2 on cygwin, but it is asking for some payload to build the eventual image, linuxbios.rom. This is the error it gives while executing the last build step, **************************************************************************** ****************************************** i386-elf-objcopy --gap-fill 0xff -O binary linuxbios linuxbios.strip --> Linuxbios.strip generated ./buildrom linuxbios.strip linuxbios.rom ../../../payloads/tg3--ide_disk.zelf 0x14000 0x60000 ../../../payloads/tg3--ide_disk.zelf: No such file or directory make[1]: *** [linuxbios.rom] Error 2 make[1]: Leaving directory `/cygdrive/d/LinuxBIOSv2/targets/amd/solo/solo/normal' make: *** [normal/linuxbios.rom] Error 1 **************************************************************************** ****************************************** Can any body tell me where do I get this payload image (tg3--ide_disk.zelf )? I have got one more small question. Can we boot the windows 2000 using the image build of LinuxBIOSv2 sources? Does it need any other stuffs like ADLOBochs or something? With regards, Narahari

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coreboot September 2005