coreboot June 2005

coreboot@coreboot.org

35 participants
100 discussions

[LinuxBIOS] NBD?
by Erlend Slettevoll 05 Jun '05

05 Jun '05

I just recently started to look at the Linux BIOS-project. Is it possible to use Linux BIOS to boot other OSes disklessly using Network Block Devices? (NBD) --Erlend

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Re: [LinuxBIOS] LinuxBIOS
by Richard Smith 04 Jun '05

04 Jun '05

> the board it's a PCCHIPS with a VIA C3 processor > CLE266 North / 8235 South > via rhine II ethernet... > use a VGA integrated onto the CLE266 chipset and have sound on board too... > > it seems to be the same chips than a EPIA motherboard, but it's a FlexATX and > it's builded by pcchips... The VIA EPIA platform is supported. Currently the code is broken but several people are working on it. Latest word is that is mostly fixed and the various developent trees ned to be merged back upstream. I'll let the actual people who are working on the code give you the specific details. -- Richard A. Smith

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[LinuxBIOS] LinuxBIOS
by Carlos Pasqualini 04 Jun '05

04 Jun '05

Hello List! I'm Carlos Pasqualini from Argentina. Sorry about my english (i do not speak english) so try to understandme i have a motherboard in wich i wan't to boot Linux, but diskless... can i put a linuxbios on it and boot Linux from the net? May be using linuxbios + etherboot or some thing like that. thanks charly

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RE: [BULK] RE: [LinuxBIOS] FYI: AMD support for cache as ram.
by YhLu 03 Jun '05

03 Jun '05

For s2895, with CAS, -rw-r--r-- 1 root root 49930 Jun 3 17:51 linuxbios_ram.nrv2b -rw-r--r-- 1 root root 5688 Jun 3 17:51 crt0.o -rw-r--r-- 1 root root 30276 Jun 3 17:51 init.o (include auto.o and failover.o and memcpy.o) -rw-r--r-- 1 root root 16006 Jun 3 17:51 init.o.gz if the init.o can be compressed too, you can spare 14k. YH > -----Original Message----- > From: ebiederman(a)lnxi.com [mailto:ebiederman@lnxi.com] > Sent: Friday, June 03, 2005 6:05 PM > To: Ronald G. Minnich > Cc: YhLu; LinuxBIOS > Subject: Re: [BULK] RE: [LinuxBIOS] FYI: AMD support for cache as ram. > > "Ronald G. Minnich" <rminnich(a)lanl.gov> writes: > > > On Fri, 3 Jun 2005, YhLu wrote: > > > > > but the cache only 64k, is it enough? > > > > I think it is. > > Currently we use 96 bytes I think we can fit it all in 64K. > We might be able to run the normal C portion of LinuxBIOS if > we decompressed it... > > Heck you can even run a small Unix in 64K..... > > Eric >

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RE: [LinuxBIOS] FYI: AMD support for cache as ram.
by YhLu 03 Jun '05

03 Jun '05

So you will use asm to enable cache as ram. ----cache_as_ram.inc and execute the code in ROM ( compiled by gcc) to initialize the RAM. ----auto.c but the cache only 64k, is it enough? the cache will be used as stack for function. How about the decompress for auto.o... ..... cool YH > -----Original Message----- > From: Li-Ta Lo [mailto:ollie@lanl.gov] > Sent: Friday, June 03, 2005 10:05 AM > To: YhLu > Cc: ebiederman(a)lnxi.com; LinuxBIOS > Subject: RE: [LinuxBIOS] FYI: AMD support for cache as ram. > > On Fri, 2005-06-03 at 10:04 -0700, YhLu wrote: > > So you make the romcc to support the real function instead > of all inline...? > > > > With cache as ram, we don't need romcc, everything can be > compiled by GCC. > > > YH > > > > > -----Original Message----- > > > From: ebiederman(a)lnxi.com [mailto:ebiederman@lnxi.com] > > > Sent: Thursday, June 02, 2005 10:20 PM > > > To: LinuxBIOS > > > Subject: [LinuxBIOS] FYI: AMD support for cache as ram. > > > > > > > > > Check out the new BIOS and Kernel Developers Guide. > > > > > > Eric > > > > > > _______________________________________________ > > > LinuxBIOS mailing list > > > LinuxBIOS(a)openbios.org > > > http://www.openbios.org/mailman/listinfo/linuxbios > > > > > > > _______________________________________________ > > LinuxBIOS mailing list > > LinuxBIOS(a)openbios.org > > http://www.openbios.org/mailman/listinfo/linuxbios > -- > Li-Ta Lo <ollie(a)lanl.gov> > Los Alamos National Lab >

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RE: [LinuxBIOS] FYI: AMD support for cache as ram.
by YhLu 03 Jun '05

03 Jun '05

So you make the romcc to support the real function instead of all inline...? YH > -----Original Message----- > From: ebiederman(a)lnxi.com [mailto:ebiederman@lnxi.com] > Sent: Thursday, June 02, 2005 10:20 PM > To: LinuxBIOS > Subject: [LinuxBIOS] FYI: AMD support for cache as ram. > > > Check out the new BIOS and Kernel Developers Guide. > > Eric > > _______________________________________________ > LinuxBIOS mailing list > LinuxBIOS(a)openbios.org > http://www.openbios.org/mailman/listinfo/linuxbios >

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RE: [LinuxBIOS] Intel E7501 Northbridge head-scratching
by YhLu 03 Jun '05

03 Jun '05

No. Acctually you should select that according to your applicance.... Maybe change to use AMD or other platform, or even PowerPC. YH > -----Original Message----- > From: Steven J. Magnani [mailto:steve@digidescorp.com] > Sent: Friday, May 27, 2005 10:14 AM > To: YhLu; linuxbios(a)openbios.org > Subject: RE: [LinuxBIOS] Intel E7501 Northbridge head-scratching > > > From: YhLu [mailto:YhLu@tyan.com] > > why still waste time on Intel platform? They will not support > LinuxBIOS, because they have EFI.... > > So, you'd recommend using EFI over LinuxBIOS? > > Steve > > >

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RE: [LinuxBIOS] FYI: AMD support for cache as ram.
by YhLu 03 Jun '05

03 Jun '05

Great. YH > -----Original Message----- > From: Li-Ta Lo [mailto:ollie@lanl.gov] > Sent: Friday, June 03, 2005 10:30 AM > To: YhLu > Cc: ebiederman(a)lnxi.com; LinuxBIOS > Subject: RE: [LinuxBIOS] FYI: AMD support for cache as ram. > > On Fri, 2005-06-03 at 10:26 -0700, YhLu wrote: > > makerule ./auto.E > > depends "$(MAINBOARD)/auto.c option_table.h ./romcc" > > action "./romcc -E -mcpu=k8 -O2 -I$(TOP)/src -I. > $(CPPFLAGS) > > $(MAINBOARD)/auto.c -o $@" > > end > > makerule ./auto.inc > > depends "$(MAINBOARD)/auto.c option_table.h ./romcc" > > action "./romcc -mcpu=k8 -O2 -I$(TOP)/src -I. > $(CPPFLAGS) > > $(MAINBOARD)/auto.c -o $@" > > end > > > > How to use gcc to produce auto.inc? > > > > It is much more that that. I will send you the .tgz in another mail. > > -- > Li-Ta Lo <ollie(a)lanl.gov> > Los Alamos National Lab >

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RE: [LinuxBIOS] FYI: AMD support for cache as ram.
by YhLu 03 Jun '05

03 Jun '05

makerule ./auto.E depends "$(MAINBOARD)/auto.c option_table.h ./romcc" action "./romcc -E -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end makerule ./auto.inc depends "$(MAINBOARD)/auto.c option_table.h ./romcc" action "./romcc -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end How to use gcc to produce auto.inc? YH > -----Original Message----- > From: Li-Ta Lo [mailto:ollie@lanl.gov] > Sent: Friday, June 03, 2005 10:05 AM > To: YhLu > Cc: ebiederman(a)lnxi.com; LinuxBIOS > Subject: RE: [LinuxBIOS] FYI: AMD support for cache as ram. > > On Fri, 2005-06-03 at 10:04 -0700, YhLu wrote: > > So you make the romcc to support the real function instead > of all inline...? > > > > With cache as ram, we don't need romcc, everything can be > compiled by GCC. > > > YH > > > > > -----Original Message----- > > > From: ebiederman(a)lnxi.com [mailto:ebiederman@lnxi.com] > > > Sent: Thursday, June 02, 2005 10:20 PM > > > To: LinuxBIOS > > > Subject: [LinuxBIOS] FYI: AMD support for cache as ram. > > > > > > > > > Check out the new BIOS and Kernel Developers Guide. > > > > > > Eric > > > > > > _______________________________________________ > > > LinuxBIOS mailing list > > > LinuxBIOS(a)openbios.org > > > http://www.openbios.org/mailman/listinfo/linuxbios > > > > > > > _______________________________________________ > > LinuxBIOS mailing list > > LinuxBIOS(a)openbios.org > > http://www.openbios.org/mailman/listinfo/linuxbios > -- > Li-Ta Lo <ollie(a)lanl.gov> > Los Alamos National Lab >

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RE: [LinuxBIOS] Pm49FL002 Flash
by YhLu 03 Jun '05

03 Jun '05

K8T890 with PCI-E should be more interesting... YH > -----Original Message----- > From: Hugo MERCIER [mailto:hugo.mercier@laposte.net] > Sent: Wednesday, June 01, 2005 10:34 AM > To: linuxbios(a)openbios.org > Subject: [LinuxBIOS] Pm49FL002 Flash > > Hi, > > I'm new to this list and to the project. I'd like to add > support for the Asus A7V600 motherboard (VT8237 and KT600 > based). I don't have many time, I'am not very familiar with > chipset low level programming, but ... > I found LinuxBios is an interesting project ;) > > Until now, I spend my time gathering informations (manuals > and datasheet - with a request to VIA) and looking to the > linuxbios code. > > I just wanted to add flash support to the flash_rom util to > start something. My motherboard is using the Pm49FL002 flash > memory. It's the same as the Pm49FL004 with 2Mb instead of 4Mb. > > With respect to the Pm49FL002 datasheet, it seems to act as > Jedec. So, I added this to flash_rom.c: > {"Pm49FL002", PMC_ID, PMC_49FL002, NULL, > 256, 16 * > 1024, > probe_jedec, erase_chip_jedec, NULL,NULL}, > and to flash_rom.h: > #define PMC_49FL002 0x6D /* PMC 49FL002 device code */ > > I just wanted to test the probing (No erasing or programming yet). > And ... it fails. flash_rom doesn't find anything : the > reported IDs bytes are the same as those reported without the > probing memory cycles (0x555,0xAAA, ...) > > So ... what am I doing wrong ? Do I have to set some bit in > the Northbridge registers ? > > > _______________________________________________ > LinuxBIOS mailing list > LinuxBIOS(a)openbios.org > http://www.openbios.org/mailman/listinfo/linuxbios >

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coreboot June 2005