coreboot November 2004

coreboot@coreboot.org

31 participants
183 discussions

Re: Via/EPIA Status
by Ronald G. Minnich 15 Nov '04

15 Nov '04

On Mon, 15 Nov 2004 mark.wilkinson(a)2pmtech.com wrote: > Hi Ron, All > Just a quick update on the status of the Via/Epia. > > I have it booting now, from cold start/reset to payload. > > > Problems :- > - Possible timing problem in smbus > - causes memory modules not to be found, > worked around this by adding a slight delay into raminit.c actually, look at my code for the i82801dbm early smbus. You need to wait for smbus to start before you wait for it to stop. MUCH better than a delay. > - Filo not seeing ide disks > - this is probably due to fixups on southbridge being run to enable > ide and/or nic. Could be I have a new FILO that is better; want it? ron

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RE: Multiple Debug Devices
by YhLu 15 Nov '04

15 Nov '04

1. I just want to use that to make sure it need scan_static_bus. 2. It is a static device under some device, so without scan_static_bus for that device, the static device will not be enumerated. Regards YH -----Original Message----- From: Li-Ta Lo [mailto:ollie@lanl.gov] Sent: Monday, November 15, 2004 1:00 PM To: LinuxBIOS; YhLu Subject: Multiple Debug Devices Yhu, You still have two debug devices in the s2885 mainboard Config.lb, one under amd8111 the other under root_complex. Why do you do this ? You said the debug device depends on scan_static_bus(), how do you make this conclusion ? Ollie

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Multiple Debug Devices
by Li-Ta Lo 15 Nov '04

15 Nov '04

Yhu, You still have two debug devices in the s2885 mainboard Config.lb, one under amd8111 the other under root_complex. Why do you do this ? You said the debug device depends on scan_static_bus(), how do you make this conclusion ? Ollie

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pnp_enable_devices
by YhLu 15 Nov '04

15 Nov '04

pnp_enable_devices(dev, &pnp_ops,....) I think the second parameter is not necessary and can be removed. Regards YH

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recent changes
by Greg Watson 15 Nov '04

15 Nov '04

We now seem to have a chip keyword, in addition to config, device, driver and object keywords. We have a device_operations structure, a cpu_device_id structure and a cpu_driver structure as well as a pci_driver structure. The cpu tree has been reorganized to include vendor directories as well as architecture directories. We now seem to have a drivers directory tree. Can someone please provide the following information: 1. What does each keyword actually do now? 2. How do the keywords relate to the data structures? 3. What files are now auto generated, and how is everything linked together? 4. What keywords/data structures are actually needed, and by which devices? 5. How/where are the data structures used? 6. What is the rationale behind the reorganization of the cpu tree, and how is it supposed to work? 7. What is the purpose of the drivers tree, how do drivers differ from devices, and why is the console not included? The configuration process now seems so complicated that I can't see how we could expect someone to port to a new board without some basic description of how everything is supposed to work. I have a major vendor interested in doing this, but at the moment I can't offer them any help. Greg

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RE: recent changes
by YhLu 15 Nov '04

15 Nov '04

According to my experience. With Chip ... Device.... end Device ... end End And "Config chip.h" The static.c will be produced according to the Config.lb in MB dir. All device under that chip will share one chip_operation, and the chip_operation will contain one enable_dev member. It will link and enable static that can not be done via pci function.... Regards YH -----Original Message----- From: Greg Watson [mailto:gwatson@lanl.gov] Sent: Monday, November 15, 2004 11:26 AM To: LinuxBIOS Subject: recent changes We now seem to have a chip keyword, in addition to config, device, driver and object keywords. We have a device_operations structure, a cpu_device_id structure and a cpu_driver structure as well as a pci_driver structure. The cpu tree has been reorganized to include vendor directories as well as architecture directories. We now seem to have a drivers directory tree. Can someone please provide the following information: 1. What does each keyword actually do now? 2. How do the keywords relate to the data structures? 3. What files are now auto generated, and how is everything linked together? 4. What keywords/data structures are actually needed, and by which devices? 5. How/where are the data structures used? 6. What is the rationale behind the reorganization of the cpu tree, and how is it supposed to work? 7. What is the purpose of the drivers tree, how do drivers differ from devices, and why is the console not included? The configuration process now seems so complicated that I can't see how we could expect someone to port to a new board without some basic description of how everything is supposed to work. I have a major vendor interested in doing this, but at the moment I can't offer them any help. Greg _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

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recent changes
by Greg Watson 15 Nov '04

15 Nov '04

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vgabios/testbios
by Ronald G. Minnich 15 Nov '04

15 Nov '04

I've just added a few new fixes to vgabios, and expect to add more as I get it to the point that it can run this BIOS for the 855gm board. Just FYI. ron

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Re: coherent_ht.c,1.29,1.30
by Stefan Reinauer 15 Nov '04

15 Nov '04

* Eric Biederman <ebiederm(a)users.sourceforge.net> [041115 11:46]: > Modified Files: > coherent_ht.c > Log Message: > - optimize_link_read_pointers compiles now on the solo so don't disable it. The problem was actually not htat it did not compile, but that it made linuxbios hang on the hardware. Did you verify that it does not do this anymore with optimize_link_read_pointers()? I cannot verify this since I don't have access to test hardware anymore. > --- coherent_ht.c 15 Nov 2004 10:46:43 -0000 1.30 > *** 643,651 **** > coherent_ht_finalize(result.nodes); > result.needs_reset = apply_cpu_errata_fixes(result.nodes, result.needs_reset); > - > - #if CONFIG_MAX_CPUS > 1 /* Why doesn't this work on the solo? */ > result.needs_reset = optimize_link_read_pointers(result.nodes, result.needs_reset); > - #endif > - > return result.needs_reset;

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ram_check
by Gin 15 Nov '04

15 Nov '04

I have a question with the ram. Don't know if anyone has heard the same problem before. I ran the ram_check procedure and it reports that there are always 4 bytes out of every 64 bytes that reads zero. I think that's why I can run the code in the ram but it gets reset in the in different places. Gin

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coreboot November 2004