coreboot January 2004

coreboot@coreboot.org

44 participants
99 discussions

RE: help me ...
by Niki Waibel 09 Jan '04

09 Jan '04

On 06-Jan-2004 Devi Priya wrote: > Hi. > Thanks. > I want to have linuxbios, linux os and filesystem in my diskonchip > millennium. EXACTLY what i would like to have as well. > Mine is sc1200. ok. i have an epia-m board. > If I use linuxbios to which physical address > should the DOCM be mapped? that depends how you want to boot the pc / the board. and how you connect the DOC chip. how is your doc connected right now? has your DOC DIL pins? (mine has -- have attached a pic of it) here are 3 hardware configs i know: BTW: if anything below is wrong then pls correct me! A) you can replace the bios (software) in the bords bios chip. you can reprogramm it with some linux tools and store linuxbios in it. (have you already done that?) that way the system boots with linuxbios. that's very fast (< 3sec) -- at the end you have to load the linux kernel. there are several ways to do that. the standard way seems to be etherboot. i could not get that working. i use filo (http://te.to/~ts1/filo/). that little thing can load the kernel from a disk with and without a filesystem / with and without partitions / with and without offset (of a disk or partition). with filo you can also specify kernel parameters (root disk). the root disk needs to have a filesystem. afaik you can use filo to load the kernel from character devices (DoC millennium). that is at least what the filo developer sayed. what i do currently, is, replacing the boards bios by linuxbios. linuxbios is configured to use filo (as i sayed). filo also resides in the bios chip. filo loads the linux kernel from an ide disk (a compact flash card in my case). the kernel loads its root disk (parameter from filo which is programmed in the bios chip (with linuxbios)) from another part of the disk. the root disk contains the linuxsystem i put together: uclibc, busybox, tinylogin, openssl, zlib, openssh, iptables, freeswan. B) my plan was to replace the bios chip compleately to have no ide disk (no compactflash card). only this DoC millennium. everything (as you've sayed: > I want to have linuxbios, linux os and filesystem in my diskonchip > millennium. ) in the doc mill. but somehow i could not use the flash memory in the DoC millenniums. the chip itself was working (so all address mapping was ok), but i could not access the 8MByte flash memory. i got a 2nd DoC Mill, -> no success, same problem. so i bet it has sthg to to with the bios socket/electrical problem... ah -- my DoC mill is a DIP chip ... as you can see in the image. my bios socket is a PLCC socket (epia-m). so i had to buy a converter. -> pins have a 1 to 1 mapping! that way i could plug the DoC directly into the bios socket. i bet it should work that way, and it WILL work one day. if done this way 3 another problem appear: 1) the DoC mill flash memory cannot be accessed directly. the 8MByte flash does not fit into the 8KByte address space of the DoC. but the DoC can map a 512 byte page into that 8KByte address space. --- after some initialisation of registers in the DoC mill. 2) the memory of the board (epia-m in my case, sc1200 in your case) has to be initialised as well to put the 512byte peaces of the DoC into some large chunk of the boards memory. 3) you have to do 1) and 2) within 512byte (... or maybe 1024byte, but i could never figure out that). that piece of code is usually called IPL (initial probram loader). the reason for that is, that when a PC boots it executes code in the BIOS -- the address pins of the bios socket will be active. i know nothing about the real mapping ... and i dont care. the DoC mill will do a reset on power on. AND!!! it will map the first flash page on TOP and on BOTTOM of its 8KByte address space!!! automatically. but only the FIRST page (512byte). that is the reason why you have to do 1) and 2) within 512bytes. the PC board will execute its code from at that 512bytes. C) there are boards around in which you can plug the DoC chip in addition to the bios. and afaik there are also PCI boards in which you can plug a DoC mill. if you use the regular bios it checks some addresses for "bios extentions". such sockets or pci boards map the DoC millennium into such an address space. afaik the DoC mill is shipped with such a bios extention program. that code can install a filesystem and an additional "emulated" drive (dont know the details). if there is no other disk in the system it looks as you have a drive (windows/dos would call it C:) plugged to your computer and it boot from that drive. also grub seems to be able to act as such a loader (with patches?). but, C) was not the way i wanted to go, and so i dont know much details. > Is it that no filesystem is necessary with > linuxbios? not for linuxbios. the pc's bios does not have a filesystem either. it is just some code which inits memory and other pc components (serial port, pci bus, usb, ethernet, ...) and does some checks on the hardware. but after that you want to load an os. and the os usually wants a root disk. with a filesystem. hope this helps, niki

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答复: 答复: K8 northbridge f1 behaviour.
by YhLu 09 Jan '04

09 Jan '04

Ollie, Should only forward to 8151 only. For the AGP is on 8151. >We found that under normal bios, the AMD8151 is not present. Is there >any bits to hide it ? The under normal bios, you need to use the most update kernel or may be 2.4. 22 to see the 8151. Regards YH. -----邮件原件----- 发件人: Li-Ta Lo [mailto:ollie@lanl.gov] 发送时间: 2004年1月8日 15:39 收件人: YhLu 抄送: ron minnich; Stefan Reinauer; linuxbios(a)clustermatic.org 主题: Re: 答复: K8 northbridge f1 behaviour. On Thu, 2004-01-08 at 15:43, YhLu wrote: > Ron, > > You need to set the REG in some special position. Because ht_scanbus, may > reset some regs according to it's scan result. > > I think the best to use VGA is > 1. LinuxBIOS init critical regs to make sure VGA can be used in Linux > kernel. > 2. Linux Kernel does the special work to make use some acceleration function > works. > 3. Let X Server no changes. > YhLu, We found that under normal bios, the AMD8151 is not present. Is there any bits to hide it ? We have tried everything to forward VGAIO behind 8111 and 8151 bridges but fail. Do you know anything about it ? Ollie

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K8 northbridge f1 behaviour.
by ron minnich 09 Jan '04

09 Jan '04

(note: c0.b means byte at register c0, and c0.l means 32-bits at c0. this is the 'setpci' command nomenclature) I'm seeing something on Function 1 on K8 that I don't understand. Consider config. register c0.b. That register, if set to 0x33, enables ISA and legacy VGA ports to the link defined in register c4.l (i.e. dest node/dest link). In the case of the s2885, and a vga card in the pci33 slot, the pair c0.l and c4.l set up legacy vga to go to HT link #2, and c0.b is set to 0x33. What I don't understand is this: if, after booting, I use setpci to set c0.b to 0, the system as a whole continues to work fine. If I set c0.l AND c4.l to 0, then the system works. I would expect the system to die as I/O no longer would be routed to HT link #2. What am I missing? This is a system booted nosmp, so all I/O should be going through cpu 0 and 0:18.1 settings should control I/O. Is there some 'magic' to make these settings really set into the chip? I've run into this as we are trying to get vga to work under linuxbios using the emulation code (freebios/util/vgabios/testbios). We have actually got this code close to working on the normal bios, and have even made an nvidia card come up correctly in the agp slot, but we can't get vga enables set up so that I/O to the legacy VGA ports works under linuxbios. Any hints would be gratefully accepted! thanks ron

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Interesting links
by Pedro M. 08 Jan '04

08 Jan '04

You can see http://www.superant.com/cgi-bin/slencyclopedia.pl?USB and the same in http://www.wlug.org.nz/USB Very interesting links like : *http://linuxkey.biz/ *http://linuxmobile.sourceforge.net/ and * http://linuxdocs.tuxfamily.org/flonix/index.php Regards.

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Re: epia-m parallel port
by Dave Ashley 08 Jan '04

08 Jan '04

Ron wrote: >Dave, can you send me the file with all your good fixes in it :-) My linuxbios V1 src/superio/via/vt1211/setup_serial.inc is this: #define OUTIT(val, port) movb val, %al; \ outb %al, port #define OUTPNPADDR(val) OUTIT(val, $0x2e); OUTIT(val, $0xeb) #define OUTPNPDATA(val) OUTIT(val, $0x2f); OUTIT(val, $0xeb) /* to do: move this to a common include file! */ #define WRITESIOBYTE(register, value) movw register, %dx ;\ movb value, %al ;\ outb %al, %dx;\ outb %al, $0xeb;\ outb %al, $0xeb #define WRITESIOWORD(register, value) movw register, %dx ;\ movw value, %ax ;\ outw %ax, %dx;\ outb %al, $0xeb;\ outb %al, $0xeb enable_serial: /* turn on PnP */ OUTPNPADDR($0x87) OUTPNPADDR($0x87) /* Allow serial port 2 (ldn 3) pins to come out */ OUTPNPADDR($0x27) OUTPNPDATA($00) /* select com1 */ OUTPNPADDR($7) OUTPNPDATA($3) /* set the enable in reg. 0x30 */ OUTPNPADDR($0x30) OUTPNPDATA($0x1) /* Serial Port 1 Base Address (FEh) */ OUTPNPADDR($0x60) OUTPNPDATA($0xfe) /* Serial Port 1 IRQ (04h) */ OUTPNPADDR($0x70) OUTPNPDATA($0x4) /* Serial Port 1 Control */ OUTPNPADDR($0xf0) OUTPNPDATA($0x2) /* select com2 */ OUTPNPADDR($7) OUTPNPDATA($2) /* set the enable in reg. 0x30 */ OUTPNPADDR($0x30) OUTPNPDATA($0x1) /* Serial Port 2 Base Address (BEh) */ OUTPNPADDR($0x60) OUTPNPDATA($0xbe) /* Serial Port 2 IRQ (03h) */ OUTPNPADDR($0x70) OUTPNPDATA($0x3) /* Serial Port 2 Control */ OUTPNPADDR($0xf0) OUTPNPDATA($0x2) /* Select parallel port */ OUTPNPADDR($7) OUTPNPDATA($1) /* set the enable in reg. 0x30 to 00, SPP , 01 = ECP, 02 = EPP */ OUTPNPADDR($0x30) OUTPNPDATA($0) /* turn off PnP */ OUTPNPADDR($0xaa) /* all done that nonsense -- from here on it's standard pc80 */ /* Enable DLAB to set baud rate. */ WRITESIOBYTE($0x3fb, $0x80) /* Set Buad Rate Divisor = 1==> 115 kb */ WRITESIOWORD($0x3f8, $0x1) /* now set no parity, one stop, 8 bits, disable DLAB */ WRITESIOBYTE($0x3fb, $0x3) /* now turn on RTS, DTR */ WRITESIOBYTE($0x3fc, $0x3) /* Enable interrupts */ WRITESIOBYTE($0x3f9, $0xf) /* should be done. Dump a char for fun. */ WRITESIOBYTE($0x3f8, $0x30) /* Enable DLAB to set baud rate. */ WRITESIOBYTE($0x2fb, $0x80) /* Set Buad Rate Divisor = 1==> 115 kb */ WRITESIOWORD($0x2f8, $0x1) /* now set no parity, one stop, 8 bits, disable DLAB */ WRITESIOBYTE($0x2fb, $0x3) /* now turn on RTS, DTR */ WRITESIOBYTE($0x2fc, $0x3) /* Enable interrupts */ WRITESIOBYTE($0x2f9, $0xf) /* should be done. Dump a char for fun. */ WRITESIOBYTE($0x2f8, $0x31)

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epia-m parallel port
by Dave Ashley 08 Jan '04

08 Jan '04

This may not answer the question (epia mini-itx parallel port) but it might work anyway. In linuxbios V1 in the file src/superio/via/vt1211/setup_serial.inc you can add these lines to enable the parallel port. It defaults to 0x378 and IRQ 5 and DMA 2. /* Select parallel port */ OUTPNPADDR($7) OUTPNPDATA($1) /* set the enable in reg. 0x30 to 00, SPP , 01 = ECP, 02 = EPP */ OUTPNPADDR($0x30) OUTPNPDATA($0) Put this before this line: /* turn off PnP */ OUTPNPADDR($0xaa) I just tried this on epia-m and it worked for me, I could see the parallel port IO register space. YMMV. -Dave

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Epia mini-itx parallel port
by worachet lirtsuttikul 08 Jan '04

08 Jan '04

Hi , ALL How can i enable or set address to use parallel port in bios. I wanna send some data to show in LED (or 7-segment display) from BIOS when computer booting up. Please suggest me. Thank a lot. Best Regard, Kojinx _________________________________________________________________ MSN 8 with e-mail virus protection service: 2 months FREE* http://join.msn.com/?page=features/virus

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Re: Parallel port - LinuxBIOS
by ebiederman＠lnxi.com 07 Jan '04

07 Jan '04

"wora list" <kojinx(a)hotmail.com> writes: > Hello everybody, > > I have a problem with linuxBIOS for using parallel port in bios. My > project doesnot want to boot Linux but want to use mainboard to control > something by Serial,Parallel port or USB , PS/2 later > But now i have a problem for parallel port (My motherboard is EPIA mini-ITX) via > > 8231 is SIO controller , i want to send data directly from bios to led > board. But i don't know howto wirte some code for do this ,and i can't find > address 0x378 for parallel port ... If your have some suggession ,please reply > me. Pleas ask on the LinuxBIOS list. > I added this code but nothing happen > http://www.mikrosol.de/southbridge.diff > http://www.mikrosol.de/setup_serial.diff > > Thank you. > > > Best > regards, > > Kojinx > (LinuxBIOS user) Eric

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Re: Trouble with etherboot-5.2.2
by Dave Ashley 07 Jan '04

07 Jan '04

Ron wrote: >Dave, could you send me those two config files? I can try to write the >top-level doco if you want. Here is a diff of the 2 config files I changed. My changes are pretty trivial, and the comments in the Config files explain everything. -Dave diff -Nur etherboot-5.2.2/src/Config /ram/etherboot-5.2.2/src/Config --- etherboot-5.2.2/src/Config 2003-10-04 18:00:54.000000000 -0700 +++ /ram/etherboot-5.2.2/src/Config 2004-01-07 07:55:33.000000000 -0800 @@ -241,7 +241,7 @@ CFLAGS+= -DCONFIG_PCI -DCONFIG_ISA # For prompting and default on timeout -CFLAGS+= -DASK_BOOT=3 -DBOOT_FIRST=BOOT_NIC +CFLAGS+= -DASK_BOOT=0 -DBOOT_FIRST=BOOT_NIC # If you would like to attempt to boot from other devices as well as the network. # CFLAGS+= -DBOOT_SECOND=BOOT_FLOPPY # CFLAGS+= -DBOOT_THIRD=BOOT_DISK @@ -275,7 +275,7 @@ # Limit the delay on packet loss/congestion to a more bearable value. See # description above. If unset, do not limit the delay between resend. -CFLAGS+= -DBACKOFF_LIMIT=7 -DCONGESTED +CFLAGS+= -DBACKOFF_LIMIT=2 -DCONGESTED # More optional features # CFLAGS+= -DCAN_BOOT_DISK -DTRY_FLOPPY_FIRST=4 @@ -283,9 +283,13 @@ # For a serial console, which can run in parallel with FIRMWARE console # CFLAGS+= -DCONSOLE_DUAL -DCOMCONSOLE=0x3F8 -DCONSPEED=9600 +CFLAGS += -DCONSOLE_SERIAL -DCOMCONSOLE=0x3f8 -DCONSPEED=115200 + +CFLAGS+= -DCONSOLE_DIRECT_VGA + # Enable tagged image, generic ELF, Multiboot ELF # or FreeBSD ELF/a.out boot image support -CFLAGS+= -DTAGGED_IMAGE -DELF_IMAGE +CFLAGS+= -DELF_IMAGE # CFLAGS+= -DAOUT_IMAGE -DIMAGE_MULTIBOOT -DIMAGE_FREEBSD # CFLAGS+= -DAOUT_IMAGE -DAOUT_LYNX_KDI diff -Nur etherboot-5.2.2/src/arch/i386/Config /ram/etherboot-5.2.2/src/arch/i386/Config --- etherboot-5.2.2/src/arch/i386/Config 2003-08-01 20:00:16.000000000 -0700 +++ /ram/etherboot-5.2.2/src/arch/i386/Config 2004-01-07 07:35:19.000000000 -0800 @@ -79,13 +79,13 @@ # @/OptionDescription@ # BIOS select don't change unless you know what you are doing -CFLAGS+= -DPCBIOS +#CFLAGS+= -DPCBIOS # Compile in k8/hammer support #CFLAGS+= -DCONFIG_X86_64 # Options to make a version of Etherboot that will work under linuxBIOS. -#CFLAGS+= -DLINUXBIOS -DCONFIG_TSC_CURRTICKS -DCONSOLE_SERIAL -DCOMCONSOLE=0x3f8 -DCOMPRESERVE -DCONFIG_PCI_DIRECT -DELF_IMAGE +CFLAGS+= -DLINUXBIOS -DCONFIG_TSC_CURRTICKS -DCONSOLE_SERIAL -DCOMCONSOLE=0x3f8 -DCOMPRESERVE -DCONFIG_PCI_DIRECT -DELF_IMAGE # These options affect the loader that is prepended to the Etherboot image LCONFIG+= -DMOVEROM

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Re: Trouble with etherboot-5.2.2 [resolution]
by Dave Ashley 07 Jan '04

07 Jan '04

The problem turned out to be I didn't build etherboot 5.2.2 properly, in addition to editing the src/Config file I had to edit arch/i386/Config and switch to the CFLAGS+= relating to linuxbios. In etherboot 5.0.10 the only config file (that I know of) is the src/Config one. I did try reading the docs, but there was very little mention of linuxbios in the etherboot docs. This whole thing could have been avoided if etherboot had a top level README.Linuxbios or something like that. The whole point of this exercise was to be able to get etherboot to output to the vga even without a normal pc bios. I tried the CONSOLE_DIRECT_VGA option Eric mentioned, and it works as needed. There is still an issue with my epia-m vga init code that doesn't set the sync for composite/svideo properly. That means in order to view the output of etherboot you've got to plug in a vga monitor, which we want to avoid. The epia-m vga init code sometimes detects that a monitor is plugged into composite/svideo and automatically switches to the appropriate sync, but this appears somewhat random. -Dave

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coreboot January 2004