coreboot May 2003

coreboot@coreboot.org

70 participants
143 discussions

Flashing Intel (L440GX) BIOS
by Jonathan B. Horen 20 May '03

20 May '03

Shalom! With lots of assistance from Ron Minnich, I've been able to patch a 2.4.20 kernel with the LinuxBIOS extensions and successfully compile and boot from it. I've also succeeded in compiling a romimage for the Intel L440GX. I've downloaded Intel's latest System Update Package -- lsup2_0.exe -- for the L440GX motherboard. My question is about what to do with what I've now got. That is, how do I get this romimage onto my motherboard(s)? Running lsup2_0.exe on a Windows system gives me, among other things, a BIOS directory. This directory contains BAT files, README and RELNOTES, BIOS files, and their IFLASH.EXE utility. The 1.BAT file invokes: IFLASH.EXE /P P14-0133.BIO /R in which I assume /P gives the file to load (or the first file in a group of files to load), and /R reboots afterward... or not ;-) Since I don't want to install Intel's newer BIOS, but do want to install the LinuxBIOS I compiled, what do I do, from here? Any pointers to previous threads about flashing L440GX BIOS? -- JONATHAN B. HOREN UNIX SYSTEMS ADMINISTRATOR E: horen(a)mail.iucc.ac.il Inter-University Computation Center T: +972-(0)3-640-5203 Tel-Aviv University F: +972-(0)3-640-9118 Ramat-Aviv 69978 Israel

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Re: Reverse engineering
by Karl Hammar 20 May '03

20 May '03

> Is it legal to disassemble the proprietary VGA BIOS to learn how to > enable a particular VGA chip? > Of course, he (who?) will not copy any bits from the copyrighted code, > he'll just pick up register addresses and values, and its order. > If he would eventually write a code to enable VGA this way, > can we share the resulting code? > > -- > Takeshi A FreeBSD developer said that in the EU there is a law that says that you have the right to get the interface specifications. I don't know if he was right or wrong. Even if he is right, there could be conditions that makes it out of the reach anyhow. Regards, /Karl ----------------------------------------------------------------------- Karl Hammar Aspö Data karl(a)kalle.csb.ki.se Lilla Aspö 2340 Networks S-742 94 Östhammar +46 173 140 57 Computers Sweden +46 70 511 97 84 Consulting -----------------------------------------------------------------------

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RE: [PATCH] Automatic RAM detection for VT8601
by hcyun＠etri.re.kr 20 May '03

20 May '03

As for reset, you may can do it by asserting "Software PCI reset" on configuration space of PCI-to-ISA bridge. Heechul > -----Original Message----- > From: SONE Takeshi [mailto:ts1@cma.co.jp] > Sent: Tuesday, May 20, 2003 5:29 PM > To: NEWBELL7(a)magicn.com > Cc: linuxbios(a)clustermatic.org > Subject: Re: [PATCH] Automatic RAM detection for VT8601 > > > On Tue, May 20, 2003 at 02:15:23PM +0900, NEWBELL7(a)magicn.com wrote: > > I have a question about ADLO. My LinuxBIOS + etherboot + > ADLO go through > > to ADLO, but stop at " sti " instruction before jumping to > Bochs BIOS. > > I look up "sti" from Intel IA32 Instruction set Volume 2. > I read that > > "sti" is "protected mode virtual interrupt enable". > > > > I removed "sti" from ADLO because it is real mode. > > Does It affect badly to my EPIA operation ? > > sti should also work in real mode. > > > ps.> If I reset my system with LinuxBIOS after booting it > with PC BIOS, > > it works great. > > Linux's reboot code sometimes doesn't work for some reason. > (I think it resets only CPU) > > I wrote a small program to directly hit the power management device > found in EPIA to reset the system, not only CPU. > It works for me. > Changing 0x29 to 0x28 makes it power off instead of reboot. > See southbridge manual for detail. (0x4000 is PM base) > -- > Takeshi > > > > #include <sys/io.h> > > main() > { > iopl(3); > outb(0xff, 0x4001); > printf("01=%x\n", inb(0x4001)); > outb(0x20, 0x4005); > printf("05=%x\n", inb(0x4005)); > outw(0xff, 0x4020); > printf("20=%x\n", inw(0x4020)); > outb(0x29, 0x4005); > // while ((inb(0x4001) & 1) == 0) > // sleep(2); > } > _______________________________________________ > Linuxbios mailing list > Linuxbios(a)clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios >

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[PATCH] Automatic RAM detection for VT8601
by SONE Takeshi 19 May '03

19 May '03

Hi, This patch adds automatic detection of installed RAM presence, size, and MA mapping type for VIA VT8601 northbridge. I tested this with VIA EPIA 5000 and 3 different type DIMMs. A. 64MB single sided (borrowed from my server :) B. 256MB double sided (borrowed from my desktop :) C. 256MB single sided (bought for EPIA) Timing was set to PC100 CL=3. (it's configurable at build time) EPIA has 2 DIMM slots, and 'empty' is possible in addition to 3 DIMMs, so there are 12 (=4*3) possible installation patterns. All patterns are tested with memtest86 3.0 as payload, to at least Test #2, and no error was found. Additionally DIMM B+C (512MB total) with PC133 CL=2 configuration was tested and all tests of memtest86's Std Test found no error. -- Takeshi

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PIRQ problem (Please try using pci=biosirq)
by dkotian3＠vsnl.net 19 May '03

19 May '03

Hi, I am using 256kb BIOS flashrom, etherboot, and kernel image on compact flash IDE . I get this error in LinuxBIOS. ***Extract*** Copying IRQ routing tables to 0xf0000...done. Verifing priq routing tables copy at 0xf0000...failed Wrote linuxbios table at: 00000500 - 0000064c checksum b79a ***Extract*** When I try do read from 0xf0000 after copying, it does shows 0xff instead some value. I had forced the sizeram to return 1MB less then the actual Ramsize to make it work with etherboot. When the kernel boots up, the ethernet interface does not come up. **Extract for the Linux kernel messaage** eth0: RealTek RTL8139 Fast Ethernet at 0xc4800000, 00:30:02:09:02:93, IRQ 0 PCI: No IRQ known for interrupt pin A of device 01:05.0. Please try using pci=biosirq. eth1: RealTek RTL8139 Fast Ethernet at 0xc4802000, 00:30:02:09:02:92, IRQ 0 **Extract for the Linux kernel messaage** I have tried the checkpir,etc on the irq tables. It is OK at the command prompt. But I still get this error. Any suggestion on this. Regards Deepak Regards Deepak

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[Xavier Pegenaute <xpegenaute@telepolis.es>] Re: Map of the memory
by ebiederman＠lnxi.com 19 May '03

19 May '03

Don't just send questions to me. Thank you. Eric

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[Bochs] Do I need Bochs necessarily ?
by NEWBELL7＠magicn.com 19 May '03

19 May '03

Hello!! I adapt Takeshi's patch to my EPIA. Thanks for your help very much. So, It works great. But I want to know what Bochs does . I think that we need Bochs for VGA and HDD(LILO). Is that right ? Who can explain what Bochs does ? Please. regards newbie.

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am I wrong? about build romimage of k7sem mb.
by bendany 17 May '03

17 May '03

I found the Config of elitegroup/k7sem has missed something... without the following lines. I can't build the correct romimage. --------------------------- mainboardinit cpu/i386/reset16.inc ldscript cpu/i386/reset16.lds --------------------------- but with these lines, I can build the correct image, but linuxbios don't go. output message is : ---------------------------- LinuxBIOS-1.0.0 Sat May 17 19:34:29 CST 2003 starting... 0 LinuxBIOS-1.0.0 Sat May 17 19:34:29 CST 2003 starting... 0 LinuxBIOS-1.0.0 Sat May 17 19:34:29 CST 2003 starting... 0 ---------------------------- while I download the romimage from cwlinux.com. I can run LinuxBIOS. here is my config file ------------------------------------- target k7sem mainboard elitegroup/k7sem cpu k7 option ZKERNEL_START=0xfffc0000 option SERIAL_CONSOLE=1 option DEFAULT_CONSOLE_LOGLEVEL=8 option MAXIMUM_CONSOLE_LOGLEVEL=8 option DEBUG=1 option MII_ENABLE=1 option USE_GENERIC_ROM=1 option STD_FLASH=1 option CONFIG_COMPRESS=0 option ROM_SIZE=131072 option PAYLOAD_SIZE=65536 option USE_ELF_BOOT=1 payload ../sis900.ebi --------------------------------------- am I miss something?

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Map of the memory
by Xavier Pegenaute 17 May '03

17 May '03

Hi, i was trying to make a memory map in the eeprom but i have some questions when i saw linuxbios_c.map and linuxbios.map ... We "compile" linuxbios_c with c_start.o and linuxbios.a until generate linuxbios_payload and linuxbios_c.map. We "compile" crt0.S and we make the crt0.o. After we "compile" crt0.o with linuxbios_payload generating linuxbios binary and linuxbios.map If we see inside the map files, i can see that there are labels at the same position in the both map files for example: linuxbios_c.map : 00004000 A _RAMBASE 00080000 A _ROMBASE linuxbios.map: 00004000 A _RAMBASE 00080000 A _ROMBASE How is it possible ? when in theory al linuxbios_c is in the payload of linuxbios? linuxbios.map: 000805a0 D _payload 00085e5d D _epayload also i saw in some file (.ld) in the tree of freebios a picture of memory: Memory map: 0x00000 (4*4096 bytes) : stack 0x04000 (4096 bytes) : private data 0x05000 : data space 0x90000 : kernel stack 0xf0000 (64 Kbyte) : EPROM Is it right ? i think that i'm confusing the memory in RAM and the memory in EPROM. But i don't know how build a correct idea. Thanks. Xavi.

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[COMMIT] Baremetal environment
by steven james 17 May '03

17 May '03

Greetings, I have committed a few cleanups to baremetal to make the environment a bit more useful. The lib directory contains a new startup function in _main.c which locates the top of RAM using the linuxbios table and checks for a signature there. If absent, it moves the stack to high ram, and initializes a simple structure containing pointers to the lbmemory structs in the table, and the highest address of freely usable ram. Bounce buffers and such are allocated by subtracting from the dree RAM value. When an additional baremetal program is run, it will detect the existant structure and use its values. Together, this allows for arbitrary stacking of payloads and safely returning to the calling payload. A 'terminal payload' such as a kernel elf image may simply ignore all of that and do what it wants. This is still subject to change, and amounts to a platform for discussion and a little practical exprimentation. G'day, sjames -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 2701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 -----------------------------------------------------------------------

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coreboot May 2003