coreboot May 2003

coreboot@coreboot.org

70 participants
143 discussions

Re: debugger
by jarcher＠pobox.com 21 May '03

21 May '03

I'm going to look at doing that over the next week or so. Jordan At 10:17 AM 5/21/2003 +0800, ollie lho wrote: >On Fri, 2003-05-16 at 22:27, ron minnich wrote: > > On Thu, 15 May 2003, jarcher wrote: > > > > > It might be helpful in debugging the stuff that get loaded after the > core > > > BIOS runs. > > > > I mostly saw it as a useful learning tool for people trying to follow the > > code. > >Can we make the gdb stub reuseable as linuxbios_table or ELF loader >stuff ? In this way, both LinuxBIOS and the payload (BLOB ?) can be >debugged. > >-- >ollie lho <ollie(a)sis.com.tw>

1 0

VIA Eden BIOS interchangeable?
by Rene Caspari 21 May '03

21 May '03

Hi, i want to buy a VIA Epia V5000 Motherboard. Do you know wether i can use this board to install another BIOS-Chip and finally install Linuxbios? Thx, rene -- /* Ich hab mein Leben lang gehorcht. (Stengel über Mielke) */ /* http://www.reca.ahrcas.net */ /* remove 'spam': reca@'spam'ahrcas.net */

2 1

How to get technical information?
by Peter Busser 20 May '03

20 May '03

Hi! I'm sorry if this is a FAQ... How does one get technical information from chipset manufacturers? I have searched the SiS and VIA web sites and found no documentation or pointers to documentation whatsoever. Or am I simply not looking well enough? Groetjes, Peter Busser

4 4

getpir utility for creation of irq tables.c doubt ?
by dkotian3＠vsnl.net 20 May '03

20 May '03

Hi, My lspci O/P is as below, which seems to have 6 slots, 4 on bus 0 and 2 on bus 1. I hope this interpretation is correct. ****lspci O/P***** 00:00.0 Host bridge: Intel Corporation 82810E GMCH [Graphics Memory Controller Hub] (rev 03) 00:01.0 VGA compatible controller: Intel Corporation 82810E CGC [Chipset Graphics Controller] (rev 03) 00:1e.0 PCI bridge: Intel Corporation 82801AA 82810 PCI Bridge (rev 02) 00:1f.0 ISA bridge: Intel Corporation 82801AA 82810 Chipset ISA Bridge (LPC) (rev 02) 00:1f.1 IDE interface: Intel Corporation 82801AA 82810 Chipset IDE (rev 02) 00:1f.2 USB Controller: Intel Corporation 82801AA 82810 Chipset USB (rev 02) 00:1f.3 SMBus: Intel Corporation 82801AA 82810 Chipset SMBus (rev 02) 01:04.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL-8139 (rev 10) 01:05.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL-8139 (rev 10) ****lspci O/P***** And the irq_tables.c O/P after getpir is as below : ****getpir O/P***** /* This file was generated by getpir.c, do not modify! (but if you do, please run checkpir on it to verify) Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM */ #include <arch/pirq_routing.h> const struct irq_routing_table intel_irq_routing_table = { PIRQ_SIGNATURE, /* u32 signature */ PIRQ_VERSION, /* u16 version */ 32+16*4, /* there can be total 4 devices on the bus */ 0, /* Where the interrupt router lies (bus) */ 0xf8, /* Where the interrupt router lies (dev) */ 0x1c00, /* IRQs devoted exclusively to PCI usage */ 0x8086, /* Vendor */ 0x7000, /* Device */ 0, /* Crap (miniport) */ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ 0xa9, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ { {0,0x80, {{0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}}, 0x2, 0}, {0,0x8, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}}, 0, 0}, {0,0xf9, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}}, 0, 0}, {0x40,0, {{0, 0}, {0, 0}, {0, 0}, {0, 0}}, 0, 0}, } }; ****getpir O/P***** It does not seem to list the details of the bus 1 for ethernet controller. Any suggestions. Regards Deepak

4 5

Re: config language
by jarcher＠pobox.com 20 May '03

20 May '03

The meaning may be just as clear. But I would argue that it's not as easy for the eye to read. And "altimus/mpc7500" is closer to the environment you are actually trying to debug. It's an include file at the path altimus/mpc7500. Jordan At 10:45 AM 5/20/2003 -0400, Bob Drzyzgula wrote: >On Tue, May 20, 2003 at 07:56:59AM -0600, Greg Watson wrote: > > > > Hi Bob, > > > > The config language does lend itself to XML, (and it was my first > > thought when Ron suggested a new languge) but I would recommend > > against it for a couple of reasons. The first is that the language > > needs to serve the dual purpose of specifying *and documenting* a > > particular configuration. XML is great for the former, but is almost > > impossible to read easily, particularly for people not used to > > working with it. Sure, you could then add something that converts the > > XML into a more readable document, but then what is a simple idea is > > now becoming very complicated. Secondly, and more importantly, is > > that it would mean that LB relies on the existence of an extremely > > complex external component, that is out of the control of the LB > > community (be it pyRXP, libXML, or whatever). Arguably this is > > already the case, since the configuration process uses python, but if > > we adopt a new configuration language then the parser can be included > > as part of the distribution - making it effectively self-contained. > > So in my view the limitations of using XML outweigh any advantages > > that might be obtained. > > > > Regards, > > > > Greg > >Greg, > >Y'know, it's *OK* to say "I just don't like it". :-) >I know if Ron & y'all don't *want* to do it it won't >get done, which is, again, *OK*. :-) > >But understanding that I don't seriously expect this >to happen in LB, I do sort of want to respin a >couple of your points... > >It's interesting what you say about documentation, because >one of the oft-cited primary advantages of XML is that >it is self-documenting. Perhaps it takes some getting used >to but in the end the meaning of: > > <pmc vendor="altimus" model="mpc7500"> > >has got to be at least as clear as > > pmc altimus/mpc7500 > >even if it is a bit more longer. > >Beyond this, the formal specification for an XML document >is in the DTD (or schema): an overt, external data file >that all code can reference. With a config file of the >sort that LB has had thus far, the real specification is >embedded in the parser source code, perhaps supplemented >by usage notes. Thus it is fairly easy for disconnects to >occur not only between the implmentation and the user's >understanding thereof, but between the written, external >documentation and the implementation. > >The reliance on an external library is, I would think, >something of a red herring. As you point out, there are >myriad external libraries that are being relied upon. A >yacc/lex implementation relies on the implementation of >yacc & lex and all the lexical arcania that come with >them. Ron suggested YAPP, which relies on the YAPP >project. In the case of PyRXP, that whole thing is GPL'd, >so if the project wanted, a version of PyRXP could be >frozen into the LB CVS tree. Granted, that could mean >fixing it if it turns out to be broken, but that's a >separate issue from the one you cited, and is probably not >a significantly greater a risk than exists with many >other parser generators that could be chosen. > >The one other thing I'll add is that, while existing LB >developers may not be well-versed in XML, the fact is that, >industry-wide, XML literacy is growing if not exploding. In >the long term, finding people who understand and can work >with XML will be no harder, and probably easier, than >finding people who can program in C. A custom configuration >language, and the code to implement it, will be novel to >everyone who encounters it, now and forever. > >Just my $0.02. > >--Bob >_______________________________________________ >Linuxbios mailing list >Linuxbios(a)clustermatic.org >http://www.clustermatic.org/mailman/listinfo/linuxbios

1 0

Newbie questions: Linuxbios on Geode GX1
by Joep Jansen 20 May '03

20 May '03

Hi, I am new to this list, and I have a couple of questions. I have an embedded CPU module (Kontron ETX-MGX with a Geode GX1), and I am looking into the possibility of putting linuxbios on it. The board contains: * a Geode GX1 CPU * CS5530A I/O companion south bridge * 64 MB RAM * AM29F040B 512 KB flash ROM with Phoenix BIOS * Compact Flash slot on IDE1 master The flash chip is soldered on the board, so replacing the BIOS chip is no option. My main question is: How can I safely flash a new BIOS? I have a BIOS ROM image file, and the Phoenix Phlash utility which allows to restore and update the BIOS. I understand the flash has a boot block which is able to restore a corrupted BIOS. I don't know whether the boot block is protected from erasing and / or reprogramming. I do know that it needs a specialy wired "key" in the serial port to enable reprogramming. My idea would be to use this utility to put linuxbios in the flash ROM. I would leave the boot block in place so that I am able to restore the original BIOS if things go wrong, or to put in a new version of linuxbios. Does anyone have experience with this? What would I need to do to convince Phlash to flash the linuxbios? Do I need to make changes to linuxbios to accomodate this scheme? Another question: How do I configure linuxbios to boot a linux kernel from the Compact Flash card? Do I need a specific "payload" program in addition to linuxbios? Any help is greatly appreciated! Joep Jansen -- Frog Navigation Systems B.V. mail to: joep(a)frog.nl Krommewetering 21 URL: http://www.frog.nl 3543AP UTRECHT Tel: (+31) 30 2 440 550 Nederland / the Netherlands Fax: (+31) 30 2 440 700

3 4

Re: config language and 2.0
by jarcher＠pobox.com 20 May '03

20 May '03

Yeah, I agree it's hard to not go too far. But coming from a compiler company you begin to look at everything as a language. Honestly, having gone through my first port/debug this weekend, I would say another feature would be a index listing file of the include files, paths, and the generated options would be nice. I spent a lot of time figuring out just which include file was being used. A second point is on items for 2.0. I had to track down three places where the serial port got its baud rate reset. I kept loosing debug messages. How about some flags to test if a device is already initialized? Jordan At 07:54 AM 5/20/2003 -0600, ron minnich wrote: >On Tue, 20 May 2003 jarcher(a)pobox.com wrote: > > > I may be going to far here, but what about the ability to define new > > devices? Or composite devices. > > > > define warpdisk > > cpu p3 # Warp disk controller > > include vendor/warpdisk_driver.inc > > end > > > > mainboard vendor/model > > cpu p5 > > warpdisk > > ...config... > > end > > > > Also I don't know if the current structure allows options. > > > > superio vendor/model IDE2=0 # For setting #defines for this > > included device. > > warpdisk ID=0 MAXDISK=3 > > warpdisk ID=1 MAXDISK=2 > > > > Jordan > >well, at what point are we going overboard? but we'll look at it. It's an >interesting idea. > >There was a reason I made the original language so dumb ... :=) Once you >make it a real language too many things are possible :-) > >ron > >_______________________________________________ >Linuxbios mailing list >Linuxbios(a)clustermatic.org >http://www.clustermatic.org/mailman/listinfo/linuxbios

2 1

Re: config language
by jarcher＠pobox.com 20 May '03

20 May '03

I may be going to far here, but what about the ability to define new devices? Or composite devices. define warpdisk cpu p3 # Warp disk controller include vendor/warpdisk_driver.inc end mainboard vendor/model cpu p5 warpdisk ...config... end Also I don't know if the current structure allows options. superio vendor/model IDE2=0 # For setting #defines for this included device. warpdisk ID=0 MAXDISK=3 warpdisk ID=1 MAXDISK=2 Jordan >On Mon, 19 May 2003, Greg Watson wrote: > > > Defining the tree from bottom-up is somewhat non-intuitive and > > potentially confusing. It seems more natural to define the tree > > structure top-down as follows: > > > > mainboard vendor/model > > cpu p5 > > southbridge vendor/model > > end > > southbridge vendor/model2 > > superio vendor/model > > ...config... > > end > > end > > end > >OH, ok, you win. I had thought of this but hate the idea of writing a >parser ... string handling in C is like walking on broken glass. > > > > mainboard motorola/sandpoint > > pmc altimus/mpc7500 > > northbridge motorola/mpc107 > > end > > southbridge windbond/w83c553 > > superio NSC/pc97307 > > com1={1} > > com2={1} > > floppy=0 > > lpt=1 > > keyboard=1 > > hwmonitor=1 > > end > > end > > nvram > > flash > > end > >agreed, it's pretty. But NOBODY is allowed to suggest lexical scoping from >indentation. That's not allowed :-) > >Greg, parser in the usual lex/yacc/C mode or .... I'll see if anybody's >got parsers written in python. > >ron

2 1

new config tool
by ron minnich 20 May '03

20 May '03

I'm looking at a parser generator called YAPPS, more when I know how it will go. ron

1 0

Re: [PATCH] Automatic RAM detection for VT8601
by NEWBELL7＠magicn.com 20 May '03

20 May '03

Hi !!!! I have a question about ADLO. My LinuxBIOS + etherboot + ADLO go through to ADLO, but stop at " sti " instruction before jumping to Bochs BIOS. I look up "sti" from Intel IA32 Instruction set Volume 2. I read that "sti" is "protected mode virtual interrupt enable". I removed "sti" from ADLO because it is real mode. Does It affect badly to my EPIA operation ? ps.> If I reset my system with LinuxBIOS after booting it with PC BIOS, it works great. As result , What makes it works ? Need your help... Thanks. regards newbie

3 2

← Newer
1
2
3
4
5
6
7
...
15
Older →

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

2004

2003

2002

coreboot May 2003