coreboot April 2003

coreboot@coreboot.org

68 participants
177 discussions

Re: ADLO for EPIA
by NEWBELL7＠magicn.com 12 Apr '03

12 Apr '03

Hello! I'm also trying to enable VGA console for EPIA. Maybe, I think it difficult that I get some VGA BIOS from anywhere. I just read that you've enabled EPIA VGA. And your boot flow is linuxbios -> etherboot -> ADLO -> ? . By the way, why are you using ADLO ? I heard that ADLO was only bootloader, such as etherboot, doesn't it ? and what is the Boch ? I read all mailing list , but didn't understand its apearance. can you explain me that ? And please ! can you tell me any hints about the successful story of EPIA's VGA ? Also, What Should I do to enable VGA ? Maybe, I survey frame buffer .... How long will it take to enable VGA and Console , then see any penguin ??? I'm waiting for reply. Thank you. ======================================================================== === This message is in MIME format. Since your mail reader does not understand this format, some or all of this message may not be legible. ------_=_NextPart_001_01C2EC72.5263E320 Content-Type: text/plain; charset="iso-2022-kr" Thanks. It works and I can see something (just splash of colors) on my CRT. The screen, though it is not usable, is brought up by original VGABIOS using ADLO. Heechul.

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[COMMIT] LNXI synch up Pass 2
by ebiederman＠lnxi.com 11 Apr '03

11 Apr '03

This gets the easy stuff. There were a few oddities in the mainboard code that I think should be fixed but the work so I left them. Most notably we now have to mainboard entries for the s2466 and the p4dpeg2. Someone who has more energy can sit down and compare them. - intel.h removed false comment - p4dpe sync with LNXI tree * Make switching to fallback mode more robust Added boot_countdown to count the number of times booting has failed. * Added boot index to allow fully forcing the boot device with cmos options * Added missing irqs to the mptable. - p4dpr sync with LNXI tree * Make switching to fallback mode more robust Added boot_countdown to count the number of times booting has failed. * Added boot index to allow fully forcing the boot device with cmos options - tyan/guiness repair and update the Config file - northbridge/amd/amd76x/ * Support for up to 4GB of ram. * Correct handling of strange dimm sizes - northbridge/intel/E7500 * Tunned settings for better memory performance - northbridge/intel/E7501 * Fixed calculations based on a 100Mhz to use a 133Mhz clock. * Replaced hard codes for the supermicro x5dpr * Misc bug fixes - src/ram/spotcheck.inc * Removed someones temporary debugging code - src/sdram/generci_zero_ecc_sdram.inc * Handle addresses > 2GB - src/southbridge/amd/amd768/ * Changed references to the amd766 to the amd768 * misc fixes * Added a count to the failover code so we trigger fallback much less easily. * more attempts to disable the amd768 watchdog... * reset the board on a timeout reading from the smbus. - src/southbridge/intel/82801 * added a count of boot failers so we trigger fallback mode much leass easily. - Added motherboards p4dpeg2, x5dpr, s2466, s2469 Eric

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mkelfImage problem
by ron minnich 11 Apr '03

11 Apr '03

I've got an elfImage that has a text segment at 800000. When I run mkelfImage from the latest CVS, the elfImage that is created has that chunk at 800000 moved down to 100000. The segment in elfImage at 100000 has the exact size of the segment at 800000 in the input elf file. OK, anybody seen anything like this? any hints :-) ron

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Still not having success with SM P4DPE
by Atherton, Stephen 11 Apr '03

11 Apr '03

Ron and James, thanks for clueing me in on the fallback image stuff. I'm still not quite doing something right though, it seems. My config files are below. I based these on the samples in mainboard/supermicro/p4dpe. The fallback image is 81k and contains the etherboot payload...this doesn't seem right to me but I don't know what else to do. If I don't specify the etherboot payload, it tries to use vmlinux which is much, much bigger. So I run the config script on both files, then go to the fallback/ and primary/ directories and run make, and I get a primary romimage of 458752 bytes and a fallback image of 81920 bytes. That doesn't seem right. What am I doing wrong? Oh and though I was doubtful, I did do a "cat primary/romimage fallback/romimage > finalimage" and burned the final image. Also, from the looks of the makeprocess my two image files are basically the same binary stuff but one has a lot of null padding. They both contain the eepro100 elf image and linuxbios.rom... Anyone see what is wrong with this picture? -Steve fallback.config -------------------------------------------- target ./fallback mainboard supermicro/p4dpe option USE_FALLBACK_IMAGE=1 option ROM_SIZE=524288 option ROM_IMAGE_SIZE=49152 option SERIAL_CONSOLE=1 option TTYS0_BAUD=9600 option TTYS0_BASE=0x3f8 option TTYS0_LCS=0x3 option DEFAULT_CONSOLE_LOGLEVEL=9 option MAXIMUM_CONSOLE_LOGLEVEL=6 option USE_ELF_BOOT=1 option USE_GENERIC_ROM=1 payload ../eepro100.elf option CPU_CLOCK_MULTIPLIER=XEON_X8 option MAINBOARD_POWER_ON_AFTER_POWER_FAIL=MAINBOARD_POWER_ON primary.config -------------------------------------------------- target primary mainboard supermicro/p4dpe linux /usr/src/linux-2.4.18-14 commandline root=/dev/hda2 console=ttyS0,9600 single option USE_FALLBACK_IMAGE=0 option ROM_SIZE=524288 option ROM_IMAGE_SIZE=49152 option SERIAL_CONSOLE=1 option TTYS0_BAUD=9600 option TTYS0_BASE=0x3f8 option TTYS0_LCS=0x3 option DEFAULT_CONSOLE_LOGLEVEL=9 option MAXIMUM_CONSOLE_LOGLEVEL=8 option USE_ELF_BOOT=1 option BOOT_IDE=1 payload ../eepro100.elf option CPU_CLOCK_MULTIPLIER=XEON_X8 option MAINBOARD_POWER_ON_AFTER_POWER_FAIL=MAINBOARD_POWER_ON

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RE: Burning BIOS on FLASH ROMS, is the kernel also needs to burnt on it
by Terry B. Chen 11 Apr '03

11 Apr '03

Hi, I have read the ADLO install and README files, I know a lot from the files. But I have some questions. If I use Linuxbios + ADLO, which options should be set? Should the ouput payout replace the linuxkernel? ADLO support all chipset? Have some guide to teach how to merge ADLO with linuxbios? Thank you! Best regards Terry

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Suggested mechanism of burning a LinuxBIOS on FLASH ROMS
by Deepak Kotian 10 Apr '03

10 Apr '03

Hi, This may be a very basic simple question, but I do not know a very good answer/solution to do this. If I want to burn LinuxBIOS, I can use the burn_mtd script , it may write it successfully as well, but if linuxbios is not correctly built. I cannot get the any O.S started on this machine, which means I would need to replace the BIOS FLASH ROM with a one with proper BIOS and bring up the machine. Is there a way I can re-program the old BIOS on to the corrupted FLASH ROMS. Please note,I do not have a PLC or any kind of FLASH programmer with me. Can I do without it. If there are any suggestions, please let me know. Thanks and Regards Deepak

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Re: [ANNOUNCE] linuxbios utilities.
by ebiederman＠lnxi.com 10 Apr '03

10 Apr '03

Alexander Amelkin <spirit(a)reactor.ru> writes: > Hello Eric, > > Wednesday, April 9, 2003, 11:34:26 PM, you wrote: > > EWB> cmos_util which changes the few LinuxBIOS settings from Linux. > > Do we really use the CMOS already? What do we store there? There are several other people who could have answered and this is a question of general interest so back to the list, with this. I am frequently very busy so I do not appreciate LinuxBIOS mail directed exclusively at me. Yes. For normal vs fallback. For serial port baud rates, for the boot order that etherboot should use. Check out the appropriate cmos.layout files. Eric

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Codec
by Devi Priya 10 Apr '03

10 Apr '03

Hello, I have been assigned the job of writing BIOS. My device is based upon SC1200 chip(National) and it has external devices like ethernet, Audio codec LM4550. My device has linux OS.I need a driver for my LM4550. So I need to know where I shall get this driver either the source or an exe? _________________________________________________________________ Vrroooom Fasten your seatbelts. http://server1.msn.co.in/msnSpecials/formula2003/index.asp Get set for F1 2003

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Etherboot/LinuxBios on Supermicro P4DPE
by Atherton, Stephen 10 Apr '03

10 Apr '03

I'm trying to get etherboot and linuxbios running on a supermicro p4dpe. The config file I'm using is below. It builds okay, and I get a romimage of around 460k (not sure why it isn't 524288), but when I burn it (using flash_and_burn), it doesn't seem to work. I get no output on the serial port. Note that I have BOOT_IDE set to 1 because at this point I would be happy just to see it boot anything, and I have linux on the ide hard disk. Does BOOT_IDE do what I think it does, or is that for something else? Is there something wrong with my config file, or should I use some other flash program for this board? I tried the one from supermicro, and doesn't seem to like my romimage file, it exits with "cannot close filehandle". Also, a few other questions... Does linuxbios cause a beep or do anything so that when the machine is powered on I would have some clue that it is working? Since I'm using the etherboot elf image as a payload, the linux and commandline directives in the config file do nothing, right? What does USE_FALLBACK_IMAGE do exactly? LinuxBios Config file: target supermicro mainboard supermicro/p4dpe option USE_FALLBACK_IMAGE=0 option ROM_SIZE=524288 option ROM_IMAGE_SIZE=49152 option SERIAL_CONSOLE=1 option TTYS0_BAUD=9600 option TTYS0_BASE=0x3f8 option TTYS0_LCS=0x3 option DEFAULT_CONSOLE_LOGLEVEL=9 option MAXIMUM_CONSOLE_LOGLEVEL=8 option USE_ELF_BOOT=1 option BOOT_IDE=1 payload ../eepro100.elf option CPU_CLOCK_MULTIPLIER=XEON_X17 option MAINBOARD_POWER_ON_AFTER_POWER_FAIL=MAINBOARD_POWER_ON linux /usr/src/linux-2.4.18-14 commandline root=/dev/hda2 console=ttyS0,9600 single

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RE: 533Mhz FSB of E7501
by Terry B. Chen 10 Apr '03

10 Apr '03

We tested s2723 that use E7501 source code; I find linuxbios can not support dual channel memory. Then I try to disable hyper threading, the spot_check meet error again！ I have compare the E7501 with E7500 Bios spec, it have a lot of differences between these two chipsets including RCOMP programming. I suppose it need to modify in many site. This is the two the lspci file. I suppose you just need 00:00;0 400 FSB: 00:00.0 Host bridge: Intel Corp.: Unknown device 254c (rev 01) 00: 86 80 4c 25 06 01 90 00 01 00 00 06 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 00 00 00 00 40: 09 00 05 11 00 00 00 00 00 00 00 00 00 00 00 00 50: 04 60 0d 00 00 00 00 00 00 10 11 01 00 00 33 33 60: 00 00 08 08 08 08 08 08 00 00 00 00 00 00 00 00 70: 00 03 00 00 00 00 00 00 1f 04 01 39 79 02 67 20 80: b1 0b 71 00 00 00 00 00 00 98 10 d2 0d 00 00 00 90: 00 00 00 00 00 00 00 00 55 05 55 05 01 1a 38 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 44 c0 50 11 00 20 ff 03 00 00 00 00 00 00 00 00 d0: 02 28 00 0e 03 00 00 33 80 09 31 b5 00 00 01 01 e0: 1d 1d 00 00 00 00 00 00 56 46 00 00 00 00 00 00 f0: 00 00 00 00 74 00 30 40 40 0f 00 00 00 00 00 00 533 MHZ: 00:00.0 Host bridge: Intel Corp.: Unknown device 254c (rev 01) 00: 86 80 4c 25 06 01 90 00 01 00 00 06 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 00 00 00 00 40: 09 00 05 11 00 00 00 00 00 00 00 00 00 00 00 00 50: 04 60 0d 00 00 00 00 00 00 10 11 01 00 00 33 33 60: 00 00 08 08 08 08 08 08 00 00 00 00 00 00 00 00 70: 00 03 00 00 00 00 00 00 04 02 01 28 79 02 67 20 80: 62 06 71 00 00 00 00 00 00 98 10 d2 8d 00 00 00 90: 00 00 00 00 00 00 00 00 55 05 55 05 01 1a 38 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 44 c0 50 11 00 20 ff 03 00 00 00 00 00 00 00 00 d0: 02 28 00 0e 03 00 00 33 80 09 31 b5 00 00 01 01 e0: 1d 1d 00 00 00 00 00 00 54 4a 00 00 00 00 00 00 f0: 00 00 00 00 74 00 30 40 40 0f 00 00 00 00 00 00 -----Original Message----- From: steven james [mailto:pyro@linuxlabs.com] Sent: 2003年4月8日 23:16 To: Terry B. Chen Cc: linuxbios(a)clustermatic.org Subject: Re: 533Mhz FSB of E7501 Greetings, Most likely, there is an undocumented register issue in the northbridge. With the OEM BIOS, can you send me an lspci with a 400 FSB and a 533 FSB. That should narrow things down. G'day, sjames On Tue, 8 Apr 2003, Terry B. Chen wrote: > Dear all; > I am trying the Tyan 2723(E7501), but I find it will report > spot_check error if the board run in 533 FSB. But if the CPU or the > memory is 400 FSB it will be ok. Does anyone else meet the same problem? > > Best regards > Terry chen > _______________________________________________ > Linuxbios mailing list > Linuxbios(a)clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 2701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 -----------------------------------------------------------------------

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coreboot April 2003