April 2003 - coreboot - mail.coreboot.org

Re: rombios with linuxbios
by Ronald G. Minnich April 8, 2003

April 8, 2003

sorry, what is rombios.c? is that my old thing or something new? ron

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Re: rombios with linuxbios
by Adam Sulmicki April 8, 2003

April 8, 2003

are you talking about Bochs BIOS? If so have a look at the ADLO project which does just that. It in the LinuxBIOS sources. > I would like to use rombios.c with linuxbios. > I have seen that rombios.c includes all bios services. > I have compiled rombios.c an I have produced rombios.bin. > Questions: > 1) How do I install rommbios.bin ? My romimage is 64k, > rombios is 64k and both of them are pure binary files. > 2)Can linuxbios call rombios.c services even if they are 2 binary files ? no, nor it has any need to. -- Adam Sulmicki http://www.eax.com The Supreme Headquarters of the 32 bit registers

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IRQ assignment on my IBM X24
by ron minnich April 8, 2003

April 8, 2003

this seems really poor bios design: @mini rminnich]# lspci -v -v | grep Interrupt Interrupt: pin A routed to IRQ 11 Interrupt: pin B routed to IRQ 11 Interrupt: pin C routed to IRQ 11 Interrupt: pin A routed to IRQ 11 Interrupt: pin B routed to IRQ 11 Interrupt: pin B routed to IRQ 11 Interrupt: pin B routed to IRQ 11 Interrupt: pin A routed to IRQ 11 Interrupt: pin A routed to IRQ 11 Interrupt: pin B routed to IRQ 11 Interrupt: pin A routed to IRQ 11 Interrupt: pin A routed to IRQ 11 Pretty much everyone goes to IRQ 11. And a bunch of Interrupts go unused: CPU0 0: 3381694 XT-PIC timer 1: 13873 XT-PIC keyboard 2: 0 XT-PIC cascade 8: 1 XT-PIC rtc 11: 77842 XT-PIC usb-uhci, usb-uhci, usb-uhci, eth0, wlan0, Ricoh Co Ltd RL5c476 II, Ricoh Co Ltd RL5c476 II (#2) 12: 360259 XT-PIC PS/2 Mouse 14: 85559 XT-PIC ide0 NMI: 0 ERR: 0 Is there any reason a BIOS would do this? ron

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rombios with linuxbios
by Pellanda Luca April 8, 2003

April 8, 2003

Hi list, I would like to use rombios.c with linuxbios. I have seen that rombios.c includes all bios services. I have compiled rombios.c an I have produced rombios.bin. Questions: 1) How do I install rommbios.bin ? My romimage is 64k, rombios is 64k and both of them are pure binary files. 2)Can linuxbios call rombios.c services even if they are 2 binary files ? regards, Luca

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help!!!
by kewal karavinkoppa April 8, 2003

April 8, 2003

hi, i need some help reguarding in choosing the motherboard for the linuxbios project.. please help me...... kewal b k, contact no: 91 0831 455116 _________________________________________________________________ Find a partner. For life. http://www.shaadi.com/ptnr.php?ptnr=hmlql Meet(a)Shaadi.com

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Re: your mail (fwd)
by Ronald G. Minnich April 7, 2003

April 7, 2003

interesting ... from Chuck Cranor: BTW, not direcly related to the paper, but i found another open source BIOS if you are interested: ftp://bakfull.campus.luth.se/bios/nbsd-bios.tar.gz written by the guy who does NetBSD/vax support :) chuck

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Re: IRQ assignment on my IBM X24
by Karl Hammar April 7, 2003

April 7, 2003

> > this seems really poor bios design: > @mini rminnich]# lspci -v -v | grep Interrupt > Interrupt: pin A routed to IRQ 11 > Interrupt: pin B routed to IRQ 11 > Interrupt: pin C routed to IRQ 11 > Interrupt: pin A routed to IRQ 11 > Interrupt: pin B routed to IRQ 11 > Interrupt: pin B routed to IRQ 11 > Interrupt: pin B routed to IRQ 11 > Interrupt: pin A routed to IRQ 11 > Interrupt: pin A routed to IRQ 11 > Interrupt: pin B routed to IRQ 11 > Interrupt: pin A routed to IRQ 11 > Interrupt: pin A routed to IRQ 11 > > Pretty much everyone goes to IRQ 11. > > And a bunch of Interrupts go unused: > > CPU0 > 0: 3381694 XT-PIC timer > 1: 13873 XT-PIC keyboard > 2: 0 XT-PIC cascade > 8: 1 XT-PIC rtc > 11: 77842 XT-PIC usb-uhci, usb-uhci, usb-uhci, eth0, > wlan0, Ricoh Co Ltd RL5c476 II, Ricoh Co Ltd RL5c476 II (#2) > 12: 360259 XT-PIC PS/2 Mouse > 14: 85559 XT-PIC ide0 > NMI: 0 > ERR: 0 > > > Is there any reason a BIOS would do this? > > ron ... You can go into your laptops bios and reassign them if you don't like that setup, I had the same setting in my tpx20. Is there anyone who knows if that setup is bad or not? Does it do any difference? The things I can think of is: . drivers don't like to share interrupts, possible resulting in errors I have seen this previously, but not tested it resently . I have heard something like: "to use the irq 0-15 you have to access the interrupt controller (8259) and to that end you have to access the ISA bus, which means slow access" Is that true? The only hint I can find is: $ grep -A3 'Interrupt ReQuest' /usr/src/kernel-source-2.4.20/Documentation/Configure.help (there is a small number of Interrupt ReQuest lines in your computer that are used by the attached devices to gain the CPU's attention -- often a source of trouble if two devices are mistakenly configured to use the same IRQ). The program procinfo to display some $ grep -A2 distributing /usr/src/kernel-source-2.4.20/Documentation/i386/IO-APIC.txt between the PIRQ lines. (distributing IRQ sources properly is not a necessity, PCI IRQs can be shared at will, but it's a good for performance to have non shared interrupts). Slot5 should be used for videocards, they $ grep -A16 'Level-Triggered Interrupts' /usr/src/kernel-source-2.4.20/Documentation/mca.txt Level-Triggered Interrupts ========================== Because MCA uses level-triggered interrupts, a few problems arise with what might best be described as the ISA mindset and its effects on drivers. These sorts of problems are expected to become less common as more people use shared IRQs on PCI machines. In general, an interrupt must be acknowledged not only at the ICU (which is done automagically by the kernel), but at the device level. In particular, IRQ 0 must be reset after a timer interrupt (now done in arch/i386/kernel/time.c) or the first timer interrupt hangs the system. There were also problems with the 1.3.x floppy drivers, but that seems to have been fixed. IRQs are also shareable, and most MCA-specific devices should be coded with shared IRQs in mind. $ grep -A1 'SA_SHIRQ' /usr/src/kernel-source-2.4.20/Documentation/pci.txt All interrupt handlers should be registered with SA_SHIRQ and use the devid to map IRQs to devices (remember that all PCI interrupts are shared). $ grep -A1 'Switching between' /usr/src/kernel-source-2.4.20/arch/i386/kernel/i8259.c * This function assumes to be called rarely. Switching between * 8259A registers is slow. $ grep -A1 'interr' /usr/src/kernel-source-2.4.20/arch/i386/kernel/io_apic.c | grep pola /* EISA interrupts are always polarity zero and can be edge or level /* ISA interrupts are always polarity zero edge triggered, /* PCI interrupts are always polarity one level triggered, /* MCA interrupts are always polarity zero level triggered, Are there any other issues abut irq assignments? BTW, does things crash on you, do you get worse performance, can't different drivers function with the same irq, or what? Regards, /Karl ----------------------------------------------------------------------- Karl Hammar Aspö Data karl(a)kalle.csb.ki.se Lilla Aspö 2340 Networks S-742 94 Östhammar +46 173 140 57 Computers Sweden +46 70 511 97 84 Consulting -----------------------------------------------------------------------

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romcc
by ebiederman＠lnxi.com April 7, 2003

April 7, 2003

After a lot of pound the code generator seems stable, and I can take a break to release romcc. Currently it appears that any time it completes without error the code generated is correct. And most importantly with a few minor tweaks it compiles the code written for l440gx memory initialization, before the compiler was written. Currently ``constant propagation'', ineffectual code elimination (code that does not affect the output), a good register allocator and always inlining are the only optimizations implemented. On the wishlist are: - using the mmx & sse registers on x86. - x86-64 and Itanium ports. - struct support - non string constant initializers. - A bibliography. But it should be good enough to start playing with. The version gets to be 1.0 when the compiler is useful enough to compile a LinuxBIOS port. ftp://ftp.lnxi.com/pub/src/linuxbios/romcc-0.21.tar.gz Eric

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Cyrix 5520 Chipset
by Robert Boardman April 6, 2003

April 6, 2003

Hi List This is my first post this looks like exactly what I'm looking for (hopefully) just one question Does the linuxbios project support the cyrix 5520 chipset? reguards robb

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BIOS
by Devi Priya April 3, 2003

April 3, 2003

Hello, I am working on a project on personal video recorder based on National's geode sc1200 chip. I have been assigned the task of writing BIOS for it. I have the xpress loader from NSC. This has the mainboard initialization part. My device has linux OS. It has other external peripherals like Audio codec, audio video decoder, IR, TV tuner etc. Should I have to initialize these external peripherals too in my BIOS program? _________________________________________________________________ Vrroooom Fasten your seatbelts. http://server1.msn.co.in/msnSpecials/formula2003/index.asp Get set for F1 2003

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