coreboot January 2003

coreboot@coreboot.org

63 participants
95 discussions

DDR SDRAM Initialization.
by sivakumar 17 Jan '03

17 Jan '03

Hi, I want to support DDR SDRAM in linuxbios. When was browsing the code, I found only the SDRAM support. Also I found from the specification that Initialization sequence of DDR SDRAM and SDRAM are different. Have any one coded for initialization of DDR SDRAM. Currently I am writing the code to support the DDR SDRAM using DDR SDRAM spec. I am facing some problem with that. Can any send me the DDR SDRAM initialization sample code for reference , if you have? Thanks, Siva.S -- sivakumar <sivakumar.subramani(a)wipro.com> wipro

5 8

CVS problem?
by steven james 16 Jan '03

16 Jan '03

Greetings, Does anyone know what's up with CVS? The checkout hangs up on RON_GA6-BXC. The CVS browser on the web page just refuses connections. G'day, sjames -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 -----------------------------------------------------------------------

3 2

rom image dates
by John Allen 16 Jan '03

16 Jan '03

I noticed that the romimage files created by the linuxBIOS build do not have a date in the last few bytes of the image. I believe that most rom images use this area to identify the date the rom was compiled. Is there a tool in the LinuxBIOS "arsenal" that can add the date to the correct file, say linuxbios.rom, before performing the cat to get romimage? John

3 4

Jumping to LinuxBIOS
by sivakumar 16 Jan '03

16 Jan '03

Hi, My image boots up to the following serial output message, Ram5 Ram6 Copying LinuxBIOS to ram. Jumping to LinuxBIOS. It says that it is jumpimg to LinuxBIOS, that means it has copied the images to RAM. So next step is to CALL(harwaremain). It is not jumping in to hardwaremain function. >From the linuxbios.map I found that address of hardwaremain function is 00000904 T hardwaremain I have checked my DDR SDRAM register programming and initialization progams with specification. It looks ok to me. If you want I can send it for reference. I want to verify that following option that I am using are correct are not, Some configuration I am using are as follow, I am not currently enabling MTRR. Currently I am look with the performance. I am not supporting SMP now. I also verified some of the DDR SDRAM register by read it back. I am using 256 KB Flash ROM and 256 MB RAM. While burning the Flash I am burning the 65 KB linuxbios.strip file on FLASH ROM. I have attached the makefile.settings along with this mail. Can any one help me in resolving the problem ;-( -Siva -- sivakumar <sivakumar.subramani(a)wipro.com> wipro

4 9

Newbie install question
by Jeffrey Knight 16 Jan '03

16 Jan '03

Hi all: I'm looking for a linux version/distribution that will boot as fast as possible. I have a PII intel motherboard, and am interested in trying to get linuxBIOS on it (the Phoenix BIOS alone take a good 15+ seconds). My questions are: do I need any special *hardware* to install linuxBIOS? In reading the FAQ's on the website, I'm a bit confused by "burning a flash ROM" using a flash burner. and is there any documentation on installing linuxBIOS other than the FAQ's? Although I'm very familiar with linux, a lot of this is new to me. Thanks! Jeff _________________________________________________________________ Help STOP SPAM: Try the new MSN 8 and get 2 months FREE* http://join.msn.com/?page=features/junkmail

1 0

quick start
by Paweł Wojtal 16 Jan '03

16 Jan '03

Hi! Is there somewhere a site, I can find an idiot-image(s) of linuxbios ready to flash into rom? Any kind of support: ide0 boot, or dhcp or others... any board (I will find any board on second-hand market). I need to temporary decrease my frustration with compiling from sources and start to play with anything ;-))). Excuse my English, please. Thanks. femur

2 1

subscription
by erto＠katamail.com 15 Jan '03

15 Jan '03

Hi! Please UNSUBSCRIBE my address. Best Regards

1 0

Latest source code of LinuxBIOS.
by sivakumar 15 Jan '03

15 Jan '03

Hi, I have downloaded the source code tar from the following link, http://sourceforge.net/project/showfiles.php?group_id=3206&release_id=42674 But it seems to br one year old. I am not able to connect to CVS respository. Where can I get the latest tar ball of the Linuxbios source code. Thanks, Siva -- sivakumar <sivakumar.subramani(a)wipro.com> wipro

2 1

RE: Boot from etherboot - blocked by INT 10
by Lawrence LL. Dai 14 Jan '03

14 Jan '03

Hi, All I have made my image download the kernel from the server and boot up successfully. But an error comes out at the end of the serial output: ... ... Kernel command line: bz.elf -retaddr 0X000940A4 ... ... VFS: Cannot open root device "" or 00:00 Please append a correct "root=" boot option Kernel panic: VFS: Unable to mount root fs on 00:00 Compare with the normal Linux output: ... ... Kernel command line: auto BOOT_IMAGE=linux ro root=301 BOOT_FILE=/boot/vmlinuz-2 .4.18-3 console=tty0 console=ttyS0,9600n8 ... ... So I have tried the followings: 1. Add the option (--command-line= "root= ..." or --append="root= ...") when I mkelfimage. 2. Try the latest version 2.0 of mkelfimage 3. Add command line ="root = ..." in Linux bios CONFIG file But the error does exit. How can I fix it? Thanks, Lawrence -----Original Message----- From: Eric W. Biederman [mailto:ebiederman@lnxi.com] Sent: 2003?1?10? 15:38 To: LinuxBIOS Cc: Lawrence LL. Dai Subject: Re: Boot from etherboot - blocked by INT 10 "Lawrence LL. Dai" <lawrence(a)tyanchina.com> writes: > Hi, Eric > > I suppose that mknbi and mkelf would also cause this problem.Because > they both tag a kernel, but the kernel must be the one like vmlinuz and vmlinux > needs BIOS functions such as INT 10. (I know vmlinux does not need INT X, but > vmlinux can not be tagged by mknbi and mkelf. Or I have missed something else?) The difference is mknbi/mkelf that come standard with etherboot when the process the linux kernel start the kernel in 16bit mode and run it's BIOS code, mkelfImage simulates the effect of the 16bit BIOS code by reading LinuxBIOS tables or making the needed BIOS calls itself, and then it enters Linux at it's unofficial 32bit entry point. mkelfImage can take either a bzImage or a vmlinux. Eric

1 0

Wow! A hole in linuxbios PCI mastery setup?
by Kevin Hester 14 Jan '03

14 Jan '03

Hi all, I think I've noticed a general linux-BIOS problem: Some PCI devices are not being enabled for bus mastery! Let me more clearly explain the context: 1) According to my handy PCI book: All bus master capable PCI devices must implement bit 2 of the command register. 2) Most devices that implement this bit power up default to 1. This is good, because linuxbios has not been setting this bit to 1. 3) A user reported a problem with a 802.11b card, and upon investigation I discovered the chip used on this card does not default to a 1 for bus master enable. (See attached lspci output) After some testing, I realized that the same card on a non LinuxBIOS based machine works correctly - i.e. by the time the kernel is up I see that this bus master enable bit is 1. I know that the Award BIOS on this second machine must have set this bus master enable bit - because the kernel and drivers are identical. I verified this by dumping the appropriate config registers early on in kernel start-up. My theory is that the Award BIOS is doing something that we are not: During the IO/Mem space assignment process it is setting the bus master bit for most devices. By "most devices" I mean any device that is not behind a bridge that inhibits bus mastery. My PCI Sys Arch book (by Shanley and Anderson) says that some crummy bridges may not support bus mastery (i.e. they have a bit 2 of the command register that always reads as zero). If a device is behind a bridge that does not support mastery, it must have its mastery bit cleared. Does anyone have a copy of the $$$ PCI architecture spec so they can check this? My PCI System Architecture book is vague on the topic. My proposed fix: * Add pci_enable_bus_masters() that does the following: * Calls pci_enable_bus_master(0) to enable devices directly connected to the host bridge * Add pci_enable_bus_master(devfn) that does the following: * Try to enable bus mastery for this device. * If the device is a bridge: * If the write of master enable fails, then write zero to all "bus master enable" bits for devices behind that bridge (including all subordinate buses) * If the write of master enable succeeds, then call pci_enable_bus_master for all devices on the secondary bus behind this bridge. (i.e. not for all subordinate busses) I've added these functions and called them after the standard linuxbios PCI setup. The problem card now works as well as it did with Award BIOS. What to ya'll think? I'm particularly interested in quotes from the PCI architecture spec. Kevin --- On a linux BIOS machine: 00:14.0 Network controller: Harris Semiconductor: Unknown device 3873 (rev 01) Subsystem: D-Link System Inc: Unknown device 3501 Flags: medium devsel, IRQ 5 Memory at feb00000 (32-bit, prefetchable) [size=4K] Capabilities: [dc] Power Management version 2 00: 60 12 73 38 02 00 90 02 01 00 80 02 08 40 00 00 10: 08 00 b0 fe 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 86 11 01 35 30: 00 00 00 00 dc 00 00 00 00 00 00 00 05 01 00 00 40: 80 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 01 00 02 7e e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 On a non linux BIOS machine: 00:0a.0 Network controller: Harris Semiconductor: Unknown device 3873 (rev 01) Subsystem: D-Link System Inc: Unknown device 3501 Flags: bus master, medium devsel, latency 32, IRQ 10 Memory at ee000000 (32-bit, prefetchable) [size=4K] Capabilities: [dc] Power Management version 2 00: 60 12 73 38 07 00 90 02 01 00 80 02 08 20 00 00 10: 08 00 00 ee 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 86 11 01 35 30: 00 00 00 00 dc 00 00 00 00 00 00 00 0a 01 00 00 40: 80 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 01 00 02 7e e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

4 5

← Newer
1
2
3
4
5
6
7
8
9
10
Older →

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

2004

2003

2002

coreboot January 2003