DDR SDRAM Initialization.

[sivakumar]

Hi,

I want to support DDR SDRAM in linuxbios. When was browsing the code, I
found only the SDRAM support. Also  I found from the specification that
Initialization sequence of DDR SDRAM and SDRAM are different.

Have any one coded for initialization of DDR SDRAM. Currently I am
writing the code to support the DDR SDRAM using DDR SDRAM spec. I am
facing some problem with that.

Can any send me the DDR SDRAM initialization sample code for reference ,
if you have?

Thanks,
Siva.S

[Ronald G. Minnich]

On 12 Jan 2003, sivakumar wrote:
> I want to support DDR SDRAM in linuxbios. When was browsing the code, I
> found only the SDRAM support. Also  I found from the specification that
> Initialization sequence of DDR SDRAM and SDRAM are different.

DDR is in there, see the 7500 port.

kron

regarding flash ROM

[sivakumar]

Before asking this question , I have gone through some of the old mails
in this group. I am bit confused after that ;-(

OK the question is as follow:

I have 256 KB flash ROM. I have built the linuxbios image
(linuxbios.strip file) and burned the image on the ROM at
0x30000 to 0x40000 (Image size 64 KB)

Do I need to load any thing else in the flash ROM ?
I don't want to have kernel image on the ROM,

Regarding the kernel image, I want to have IDE connected Harddisk where
the linux Operating system is installed. i.e., I want to enable the IDE
option and boot from the OS present on the hard disk.

Is it possible to do it using 256KB?

Thanks,
Siva

My Makefile.seting file (Not complete):

export PAYLOAD_SIZE:=458752
export ROM_IMAGE_SIZE:=65536
export STACK_SIZE:=0x2000
export XIP_ROM_BASE:=0xffff0000
export XIP_ROM_SIZE:=0x10000
export ZKERNEL_MASK:=0x3ed
export ZKERNEL_START:=0xfff40000
export _RAMBASE:=0x00000800
export _ROMBASE:=0xffff0000

On Mon, 2003-01-13 at 05:07, Ronald G. Minnich wrote:
> On 12 Jan 2003, sivakumar wrote:
> > I want to support DDR SDRAM in linuxbios. When was browsing the code, I
> > found only the SDRAM support. Also  I found from the specification that
> > Initialization sequence of DDR SDRAM and SDRAM are different.
>
> DDR is in there, see the 7500 port.
>
> kron

regarding flash ROM

[Ronald G. Minnich]

On 13 Jan 2003, sivakumar wrote:
> Regarding the kernel image, I want to have IDE connected Harddisk where
> the linux Operating system is installed. i.e., I want to enable the IDE
> option and boot from the OS present on the hard disk.
> Is it possible to do it using 256KB?

yes. I have done this. It is not a problem at all. You just tell linuxbios 
to use the IDE for the boot. If that has problems with IDE, then use 
etherboot to load from IDE.

ron

[sivakumar]

Thanks for the information.

I have gone through the code and have following query.
Following is the one of the step in Initialization of DDR SDRAM.

-Next a MODE REGISTER SET command should be issued for the Extended
 Mode Register to enable the DLL,

/* 5. Issue EMRS to enable DLL */
        SET_RAM_COMMAND(RAM_COMMAND_EMRS)
        movl (0x0000<<MD_SHIFT), %eax
        DO_DELAY

First we are setting the Mode select bit of DRAM controller Mode
Register to Extended Mode Register Set Enable.
> From DDR spec, it is given that zero bit of EMRS will enable the DLL.

Here I want to know how by moving the (0x0000 << MD_SHIFT) to eax
register, we are writting to Extended mode register.

Can any one explain this?

Thanks,
Siva

On Mon, 2003-01-13 at 05:07, Ronald G. Minnich wrote:
> On 12 Jan 2003, sivakumar wrote:
> > I want to support DDR SDRAM in linuxbios. When was browsing the code, I
> > found only the SDRAM support. Also  I found from the specification that
> > Initialization sequence of DDR SDRAM and SDRAM are different.
>
> DDR is in there, see the 7500 port.
>
> kron

sivakumar  writes:
> Thanks for the information.
>
> I have gone through the code and have following query.
> Following is the one of the step in Initialization of DDR SDRAM.
>
> -Next a MODE REGISTER SET command should be issued for the Extended
>  Mode Register to enable the DLL,
>     /* 5. Issue EMRS to enable DLL */
>     SET_RAM_COMMAND(RAM_COMMAND_EMRS)
>     movl (0x0000<<MD_SHIFT), %eax
>     DO_DELAY
>
> First we are setting the Mode select bit of DRAM controller Mode
> Register to Extended Mode Register Set Enable.
> > From DDR spec, it is given that zero bit of EMRS will enable the DLL.
>
> Here I want to know how by moving the (0x0000 << MD_SHIFT) to eax
> register, we are writting to Extended mode register.
>
> Can any one explain this?

It is performing a memory read.   A memory read in intel chipsets
when the command register is set properly causes commands to be sent
to memory.  Reads seem to work a little bit more reliably than writes
in my experience.

Eric

[Ronald G. Minnich]

On 16 Jan 2003, Eric W. Biederman wrote:
> It is performing a memory read.   A memory read in intel chipsets
> when the command register is set properly causes commands to be sent
> to memory.  Reads seem to work a little bit more reliably than writes
> in my experience.

except on 430TX, where due to a seeming bug in the chipset you have to 
write :-)

ron

[Andrew Kohlsmith]

> except on 430TX, where due to a seeming bug in the chipset you have to
> write :-)

Shh!  I don't want to hear about 430TX bugs!  :-)

Regards,
Andrew

[ollie lho]

On Sun, 2003-01-12 at 18:52, sivakumar wrote:
> Can any send me the DDR SDRAM initialization sample code for reference ,
> if you have?

Init of DDR SDRAM is not much more difficult than SDR if you get 
familiar to the spec. You can read and compare the 630/ipl.S which
support SDR and 635/ipl.S which support DDR.