[commit] r5426 - in trunk/src: cpu/amd/mtrr cpu/x86/mtrr lib mainboard/amd/dbm690t mainboard/amd/mahogany mainboard/amd/mahogany_fam10 mainboard/amd/pistachio mainboard/amd/serengeti_cheetah_fam10 ...
Author: stepan Date: Wed Apr 14 13:40:34 2010 New Revision: 5426 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5426
Log: drop quite a lot of dead code that did nothing but produce warnings and make the rest of the code unreadable.
Signed-off-by: Stefan Reinauer stepan@coresystems.de Acked-by: Stefan Reinauer stepan@coresystems.de
Deleted: trunk/src/cpu/amd/mtrr/amd_earlymtrr.c Modified: trunk/src/cpu/x86/mtrr/earlymtrr.c trunk/src/lib/debug.c trunk/src/mainboard/amd/dbm690t/romstage.c trunk/src/mainboard/amd/mahogany/romstage.c trunk/src/mainboard/amd/mahogany_fam10/romstage.c trunk/src/mainboard/amd/pistachio/romstage.c trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c trunk/src/mainboard/arima/hdama/romstage.c trunk/src/mainboard/asrock/939a785gmh/romstage.c trunk/src/mainboard/asus/a8n_e/romstage.c trunk/src/mainboard/asus/a8v-e_se/romstage.c trunk/src/mainboard/asus/m2v-mx_se/romstage.c trunk/src/mainboard/broadcom/blast/romstage.c trunk/src/mainboard/dell/s1850/romstage.c trunk/src/mainboard/digitallogic/msm586seg/romstage.c trunk/src/mainboard/gigabyte/ga_2761gxdk/romstage.c trunk/src/mainboard/gigabyte/m57sli/romstage.c trunk/src/mainboard/hp/dl145_g3/romstage.c trunk/src/mainboard/ibm/e325/romstage.c trunk/src/mainboard/ibm/e326/romstage.c trunk/src/mainboard/intel/eagleheights/romstage.c trunk/src/mainboard/intel/jarrell/romstage.c trunk/src/mainboard/intel/mtarvon/romstage.c trunk/src/mainboard/intel/truxton/romstage.c trunk/src/mainboard/intel/xe7501devkit/reset.c trunk/src/mainboard/intel/xe7501devkit/romstage.c trunk/src/mainboard/iwill/dk8_htx/romstage.c trunk/src/mainboard/iwill/dk8s2/romstage.c trunk/src/mainboard/iwill/dk8x/romstage.c trunk/src/mainboard/kontron/kt690/romstage.c trunk/src/mainboard/msi/ms7135/irq_tables.c trunk/src/mainboard/msi/ms7135/romstage.c trunk/src/mainboard/msi/ms7260/romstage.c trunk/src/mainboard/msi/ms9185/romstage.c trunk/src/mainboard/msi/ms9282/romstage.c trunk/src/mainboard/msi/ms9652_fam10/romstage.c trunk/src/mainboard/newisys/khepri/romstage.c trunk/src/mainboard/nvidia/l1_2pvv/romstage.c trunk/src/mainboard/sunw/ultra40/romstage.c trunk/src/mainboard/supermicro/h8dme/romstage.c trunk/src/mainboard/supermicro/h8dmr/romstage.c trunk/src/mainboard/supermicro/h8dmr_fam10/romstage.c trunk/src/mainboard/supermicro/h8qme_fam10/romstage.c trunk/src/mainboard/supermicro/x6dai_g/romstage.c trunk/src/mainboard/supermicro/x6dhe_g/romstage.c trunk/src/mainboard/supermicro/x6dhe_g2/romstage.c trunk/src/mainboard/supermicro/x6dhr_ig/romstage.c trunk/src/mainboard/supermicro/x6dhr_ig2/romstage.c trunk/src/mainboard/technexion/tim5690/romstage.c trunk/src/mainboard/technexion/tim8690/romstage.c trunk/src/mainboard/tyan/s2735/romstage.c trunk/src/mainboard/tyan/s2850/romstage.c trunk/src/mainboard/tyan/s2875/romstage.c trunk/src/mainboard/tyan/s2880/romstage.c trunk/src/mainboard/tyan/s2881/romstage.c trunk/src/mainboard/tyan/s2882/romstage.c trunk/src/mainboard/tyan/s2885/romstage.c trunk/src/mainboard/tyan/s2891/romstage.c trunk/src/mainboard/tyan/s2892/romstage.c trunk/src/mainboard/tyan/s2912/romstage.c trunk/src/mainboard/tyan/s2912_fam10/romstage.c trunk/src/mainboard/tyan/s4880/romstage.c trunk/src/mainboard/tyan/s4882/romstage.c trunk/src/mainboard/via/epia-cn/romstage.c trunk/src/mainboard/via/epia-m/romstage.c trunk/src/mainboard/via/epia-n/romstage.c trunk/src/northbridge/intel/e7501/raminit.c trunk/src/northbridge/intel/i3100/raminit.c trunk/src/northbridge/via/vt8623/northbridge.c
Modified: trunk/src/cpu/x86/mtrr/earlymtrr.c ============================================================================== --- trunk/src/cpu/x86/mtrr/earlymtrr.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/cpu/x86/mtrr/earlymtrr.c Wed Apr 14 13:40:34 2010 (r5426) @@ -2,6 +2,7 @@ #define EARLYMTRR_C #include <cpu/x86/cache.h> #include <cpu/x86/mtrr.h> +#include <cpu/amd/mtrr.h> #include <cpu/x86/msr.h>
#if 0
Modified: trunk/src/lib/debug.c ============================================================================== --- trunk/src/lib/debug.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/lib/debug.c Wed Apr 14 13:40:34 2010 (r5426) @@ -33,7 +33,7 @@ { device_t dev; for (dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); dev += PCI_DEV(0, 0, 1)) { + dev <= PCI_DEV(0xff, 0x1f, 0x7); dev += PCI_DEV(0, 0, 1)) { u32 id; id = pci_read_config32(dev, PCI_VENDOR_ID); if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff)
Modified: trunk/src/mainboard/amd/dbm690t/romstage.c ============================================================================== --- trunk/src/mainboard/amd/dbm690t/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/amd/dbm690t/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -54,7 +54,7 @@ #include "northbridge/amd/amdk8/reset_test.c" #include "superio/ite/it8712f/it8712f_early_serial.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/amd/mahogany/romstage.c ============================================================================== --- trunk/src/mainboard/amd/mahogany/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/amd/mahogany/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -54,7 +54,7 @@ #include "northbridge/amd/amdk8/reset_test.c" #include "superio/ite/it8718f/it8718f_early_serial.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/amd/mahogany_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/amd/mahogany_fam10/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/amd/mahogany_fam10/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -71,14 +71,6 @@ #include "southbridge/amd/sb700/sb700_early_setup.c" #include "northbridge/amd/amdfam10/debug.c"
-static void memreset_setup(void) -{ -} - -static void memreset(int controllers, const struct mem_controller *ctrl) -{ -} - static void activate_spd_rom(const struct mem_controller *ctrl) { } @@ -245,9 +237,7 @@ /* It's the time to set ctrl in sysinfo now; */ printk(BIOS_DEBUG, "fill_mem_ctrl()\n"); fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr); - post_code(0x3D);
- memreset_setup(); post_code(0x40);
// die("Die Before MCT init.");
Modified: trunk/src/mainboard/amd/pistachio/romstage.c ============================================================================== --- trunk/src/mainboard/amd/pistachio/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/amd/pistachio/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -48,7 +48,7 @@ #include "northbridge/amd/amdk8/reset_test.c" #include "superio/ite/it8712f/it8712f_early_serial.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c" @@ -57,7 +57,7 @@ #include "southbridge/amd/sb600/sb600_early_setup.c" #include "northbridge/amd/amdk8/debug.c" /* After sb600_early_setup.c! */
-/* CAN'T BE REMOVED! crt0.S will use it. I don't know WHY!*/ +/* CAN'T BE REMOVED! memory bus reset hook for some broken amd k8 boards. */ static void memreset(int controllers, const struct mem_controller *ctrl) { }
Modified: trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -68,7 +68,7 @@
#include "northbridge/amd/amdfam10/debug.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c" -#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "northbridge/amd/amdfam10/setup_resource_map.c"
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) @@ -81,10 +81,6 @@ outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 17); }
-static void memreset(int controllers, const struct mem_controller *ctrl) -{ -} - static void activate_spd_rom(const struct mem_controller *ctrl) { #define SMBUS_HUB 0x18
Modified: trunk/src/mainboard/arima/hdama/romstage.c ============================================================================== --- trunk/src/mainboard/arima/hdama/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/arima/hdama/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -23,7 +23,7 @@ #include "northbridge/amd/amdk8/debug.c" #include "superio/nsc/pc87360/pc87360_early_serial.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/asrock/939a785gmh/romstage.c ============================================================================== --- trunk/src/mainboard/asrock/939a785gmh/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/asrock/939a785gmh/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -55,7 +55,7 @@ #include "northbridge/amd/amdk8/reset_test.c" #include "superio/winbond/w83627dhg/w83627dhg_early_serial.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/asus/a8n_e/romstage.c ============================================================================== --- trunk/src/mainboard/asus/a8n_e/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/asus/a8n_e/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -57,7 +57,7 @@ #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" #include "northbridge/amd/amdk8/debug.c" -#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" #include "northbridge/amd/amdk8/coherent_ht.c"
Modified: trunk/src/mainboard/asus/a8v-e_se/romstage.c ============================================================================== --- trunk/src/mainboard/asus/a8v-e_se/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/asus/a8v-e_se/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -58,7 +58,7 @@ #include "superio/winbond/w83627ehg/w83627ehg_early_serial.c" #include "southbridge/via/vt8237r/vt8237r_early_smbus.c" #include "northbridge/amd/amdk8/debug.c" /* After vt8237r_early_smbus.c! */ -#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/asus/m2v-mx_se/romstage.c ============================================================================== --- trunk/src/mainboard/asus/m2v-mx_se/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/asus/m2v-mx_se/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -63,7 +63,7 @@ #include "northbridge/amd/amdk8/early_ht.c" #include "superio/ite/it8712f/it8712f_early_serial.c" #include "southbridge/via/vt8237r/vt8237r_early_smbus.c" -#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/broadcom/blast/romstage.c ============================================================================== --- trunk/src/mainboard/broadcom/blast/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/broadcom/blast/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -29,7 +29,7 @@ #include "northbridge/amd/amdk8/debug.c" #include "superio/nsc/pc87417/pc87417_early_serial.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/dell/s1850/romstage.c ============================================================================== --- trunk/src/mainboard/dell/s1850/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/dell/s1850/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -41,10 +41,6 @@ #define RECVENA_CONFIG 0x0808090a #define RECVENB_CONFIG 0x0808090a
-static inline void activate_spd_rom(const struct mem_controller *ctrl) -{ - /* nothing to do */ -} static inline int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address); @@ -339,7 +335,6 @@ disable_watchdogs(); // dump_ipmi_registers(); mainboard_set_e7520_leds(); -// memreset_setup();
sdram_initialize(ARRAY_SIZE(mch), mch); #if 0
Modified: trunk/src/mainboard/digitallogic/msm586seg/romstage.c ============================================================================== --- trunk/src/mainboard/digitallogic/msm586seg/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/digitallogic/msm586seg/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -44,19 +44,6 @@ int i; };
-static void memreset_setup(void) -{ -} - -static void memreset(int controllers, const struct mem_controller *ctrl) -{ -} - -static inline void activate_spd_rom(const struct mem_controller *ctrl) -{ - /* nothing to do */ -} - static inline int spd_read_byte(unsigned device, unsigned address) { // return smbus_read_byte(device, address);
Modified: trunk/src/mainboard/gigabyte/ga_2761gxdk/romstage.c ============================================================================== --- trunk/src/mainboard/gigabyte/ga_2761gxdk/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/gigabyte/ga_2761gxdk/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -78,7 +78,7 @@
#include "northbridge/amd/amdk8/debug.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/gigabyte/m57sli/romstage.c ============================================================================== --- trunk/src/mainboard/gigabyte/m57sli/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/gigabyte/m57sli/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -75,7 +75,7 @@
#include "northbridge/amd/amdk8/debug.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/hp/dl145_g3/romstage.c ============================================================================== --- trunk/src/mainboard/hp/dl145_g3/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/hp/dl145_g3/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -79,7 +79,7 @@
#include "northbridge/amd/amdk8/debug.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdk8/setup_resource_map.c"
@@ -88,10 +88,6 @@
#include "southbridge/broadcom/bcm5785/bcm5785_early_setup.c"
-static void memreset_setup(void) -{ -} - static void memreset(int controllers, const struct mem_controller *ctrl) { } @@ -185,36 +181,34 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { static const uint16_t spd_addr[] = { - //first node + // first node DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, -#if CONFIG_MAX_PHYSICAL_CPUS > 1 - //second node + + // second node DIMM4, DIMM6, 0, 0, DIMM5, DIMM7, 0, 0, -#endif - };
struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
- int needs_reset; - unsigned bsp_apicid = 0; + int needs_reset; + unsigned bsp_apicid = 0;
- if (!cpu_init_detectedx && boot_cpu()) { - /* Nothing special needs to be done to find bus 0 */ - /* Allow the HT devices to be found */ - - enumerate_ht_chain(); - bcm5785_enable_rom(); - bcm5785_enable_lpc(); - //enable RTC + if (!cpu_init_detectedx && boot_cpu()) { + /* Nothing special needs to be done to find bus 0 */ + /* Allow the HT devices to be found */ + + enumerate_ht_chain(); + bcm5785_enable_rom(); + bcm5785_enable_lpc(); + //enable RTC pc87417_enable_dev(RTC_DEV); - } + }
- if (bist == 0) { - bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo); - } + if (bist == 0) { + bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo); + }
pilot_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
@@ -284,10 +278,9 @@ fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr); enable_smbus();
- memreset_setup(); //do we need apci timer, tsc...., only debug need it for better output /* all ap stopped? */ -// init_timer(); // Need to use TMICT to synconize FID/VID + // init_timer(); // Need to use TMICT to synconize FID/VID
sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
Modified: trunk/src/mainboard/ibm/e325/romstage.c ============================================================================== --- trunk/src/mainboard/ibm/e325/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/ibm/e325/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -25,7 +25,7 @@ #include "northbridge/amd/amdk8/debug.c" #include "superio/nsc/pc87366/pc87366_early_serial.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/ibm/e326/romstage.c ============================================================================== --- trunk/src/mainboard/ibm/e326/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/ibm/e326/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -25,7 +25,7 @@ #include "northbridge/amd/amdk8/debug.c" #include "superio/nsc/pc87366/pc87366_early_serial.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/intel/eagleheights/romstage.c ============================================================================== --- trunk/src/mainboard/intel/eagleheights/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/intel/eagleheights/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -102,10 +102,6 @@ #define RCBA_FD 0x3418 /* 32 bit */ #define RCBA_PRC 0x341C /* 32 bit */
-static inline void activate_spd_rom(const struct mem_controller *ctrl) -{ - /* nothing to do */ -} static inline int spd_read_byte(u16 device, u8 address) { return smbus_read_byte(device, address); @@ -119,8 +115,8 @@ #include "northbridge/intel/i3100/reset_test.c" #include "debug.c"
-void early_config(void) { - device_t dev; +static void early_config(void) +{ u32 gcs, rpc, fd;
/* Enable RCBA */
Modified: trunk/src/mainboard/intel/jarrell/romstage.c ============================================================================== --- trunk/src/mainboard/intel/jarrell/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/intel/jarrell/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -38,10 +38,6 @@ #define RECVENB_CONFIG 0x000a090a #define DIMM_MAP_LOGICAL 0x0124
-static inline void activate_spd_rom(const struct mem_controller *ctrl) -{ - /* nothing to do */ -} static inline int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address);
Modified: trunk/src/mainboard/intel/mtarvon/romstage.c ============================================================================== --- trunk/src/mainboard/intel/mtarvon/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/intel/mtarvon/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -46,10 +46,6 @@ #define DEVPRES_CONFIG (DEVPRES_D1F0 | DEVPRES_D2F0) #define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0)
-static inline void activate_spd_rom(const struct mem_controller *ctrl) -{ - /* nothing to do */ -} static inline int spd_read_byte(u16 device, u8 address) { return smbus_read_byte(device, address);
Modified: trunk/src/mainboard/intel/truxton/romstage.c ============================================================================== --- trunk/src/mainboard/intel/truxton/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/intel/truxton/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -46,10 +46,6 @@
#define DEVPRES_CONFIG (DEVPRES_D1F0 | DEVPRES_D2F0 | DEVPRES_D3F0 | DEVPRES_D4F0)
-static inline void activate_spd_rom(const struct mem_controller *ctrl) -{ - /* nothing to do */ -} static inline int spd_read_byte(u16 device, u8 address) { return smbus_read_byte(device, address);
Modified: trunk/src/mainboard/intel/xe7501devkit/reset.c ============================================================================== --- trunk/src/mainboard/intel/xe7501devkit/reset.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/intel/xe7501devkit/reset.c Wed Apr 14 13:40:34 2010 (r5426) @@ -1,3 +1,5 @@ +#include <reset.h> + void i82801cx_hard_reset(void);
void hard_reset(void)
Modified: trunk/src/mainboard/intel/xe7501devkit/romstage.c ============================================================================== --- trunk/src/mainboard/intel/xe7501devkit/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/intel/xe7501devkit/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -27,11 +27,6 @@ outb(0x0e, 0x0cf9); }
-static inline void activate_spd_rom(const struct mem_controller *ctrl) -{ - /* nothing to do */ -} - static inline int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address); @@ -56,31 +51,28 @@ if (bist == 0) { // Skip this if there was a built in self test failure - early_mtrr_init(); - enable_lapic(); - } + enable_lapic(); + }
// Get the serial port running and print a welcome banner
- lpc47b272_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - uart_init(); - console_init(); + lpc47b272_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); + uart_init(); + console_init();
- // Halt if there was a built in self test failure + // Halt if there was a built in self test failure report_bist_failure(bist);
-// print_pci_devices(); + // print_pci_devices();
// If this is a warm boot, some initialization can be skipped
if (!bios_reset_detected()) { enable_smbus(); -// dump_spd_registers(&memctrl[0]); -// dump_smbus_registers(); - -// memreset_setup(); No-op for this chipset + // dump_spd_registers(&memctrl[0]); + // dump_smbus_registers(); sdram_initialize(ARRAY_SIZE(memctrl), memctrl); }
Modified: trunk/src/mainboard/iwill/dk8_htx/romstage.c ============================================================================== --- trunk/src/mainboard/iwill/dk8_htx/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/iwill/dk8_htx/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -44,7 +44,7 @@ #include "lib/delay.c"
#include "northbridge/amd/amdk8/debug.c" -#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
#include "northbridge/amd/amdk8/setup_resource_map.c" @@ -126,20 +126,19 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { static const uint16_t spd_addr[] = { - //first node + // first node DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, -#if CONFIG_MAX_PHYSICAL_CPUS > 1 - //second node + + // second node DIMM4, DIMM6, 0, 0, DIMM5, DIMM7, 0, 0, -#endif - };
- struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); + struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
- int needs_reset; int i; + int needs_reset; unsigned bsp_apicid = 0;
if (!cpu_init_detectedx && boot_cpu()) {
Modified: trunk/src/mainboard/iwill/dk8s2/romstage.c ============================================================================== --- trunk/src/mainboard/iwill/dk8s2/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/iwill/dk8s2/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -44,7 +44,7 @@ #include "lib/delay.c"
#include "northbridge/amd/amdk8/debug.c" -#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
#include "northbridge/amd/amdk8/setup_resource_map.c" @@ -126,20 +126,19 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { static const uint16_t spd_addr[] = { - //first node + // first node DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, -#if CONFIG_MAX_PHYSICAL_CPUS > 1 - //second node + + // second node DIMM4, DIMM6, 0, 0, DIMM5, DIMM7, 0, 0, -#endif - };
- struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); + struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
- int needs_reset; int i; + int needs_reset; unsigned bsp_apicid = 0;
if (!cpu_init_detectedx && boot_cpu()) {
Modified: trunk/src/mainboard/iwill/dk8x/romstage.c ============================================================================== --- trunk/src/mainboard/iwill/dk8x/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/iwill/dk8x/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -44,7 +44,7 @@ #include "lib/delay.c"
#include "northbridge/amd/amdk8/debug.c" -#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
#include "northbridge/amd/amdk8/setup_resource_map.c" @@ -126,20 +126,19 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { static const uint16_t spd_addr[] = { - //first node + // first node DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, -#if CONFIG_MAX_PHYSICAL_CPUS > 1 - //second node + + // second node DIMM4, DIMM6, 0, 0, DIMM5, DIMM7, 0, 0, -#endif - };
- struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); + struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
- int needs_reset; int i; + int needs_reset; unsigned bsp_apicid = 0;
if (!cpu_init_detectedx && boot_cpu()) {
Modified: trunk/src/mainboard/kontron/kt690/romstage.c ============================================================================== --- trunk/src/mainboard/kontron/kt690/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/kontron/kt690/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -56,7 +56,7 @@ #include "northbridge/amd/amdk8/debug.c" #include "superio/winbond/w83627dhg/w83627dhg_early_serial.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/msi/ms7135/irq_tables.c ============================================================================== --- trunk/src/mainboard/msi/ms7135/irq_tables.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/msi/ms7135/irq_tables.c Wed Apr 14 13:40:34 2010 (r5426) @@ -62,8 +62,6 @@ pirq_info->rfu = rfu; }
-void pci_assign_irqs(unsigned, unsigned, const unsigned char *); - /** * Create the IRQ routing table. * Values are derived from getpir generated code.
Modified: trunk/src/mainboard/msi/ms7135/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms7135/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/msi/ms7135/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -59,7 +59,7 @@ #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" #include "northbridge/amd/amdk8/debug.c" -#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" #include "northbridge/amd/amdk8/coherent_ht.c" @@ -98,7 +98,6 @@
static void sio_setup(void) { - unsigned value; uint32_t dword; uint8_t byte;
Modified: trunk/src/mainboard/msi/ms7260/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms7260/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/msi/ms7260/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -75,7 +75,7 @@
#include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/debug.c" -#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "northbridge/amd/amdk8/setup_resource_map.c"
/* Yes, on the MSI K9N Neo (MS-7260) the Super I/O is at 0x4e! */
Modified: trunk/src/mainboard/msi/ms9185/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms9185/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/msi/ms9185/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -63,7 +63,7 @@ #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include "superio/nsc/pc87417/pc87417_early_serial.c" -#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/msi/ms9282/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms9282/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/msi/ms9282/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -58,7 +58,7 @@ #include "northbridge/amd/amdk8/debug.c" #include "superio/winbond/w83627ehg/w83627ehg_early_serial.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/msi/ms9652_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms9652_fam10/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/msi/ms9652_fam10/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -67,7 +67,7 @@
#include "northbridge/amd/amdfam10/debug.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdfam10/setup_resource_map.c"
@@ -76,14 +76,6 @@
#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c"
-static void memreset_setup(void) -{ -} - -static void memreset(int controllers, const struct mem_controller *ctrl) -{ -} - static inline void activate_spd_rom(const struct mem_controller *ctrl) { /* nothing to do */ @@ -292,9 +284,7 @@
printk(BIOS_DEBUG, "enable_smbus()\n"); enable_smbus(); - post_code(0x3E);
- memreset_setup(); post_code(0x40);
printk(BIOS_DEBUG, "raminit_amdmct()\n");
Modified: trunk/src/mainboard/newisys/khepri/romstage.c ============================================================================== --- trunk/src/mainboard/newisys/khepri/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/newisys/khepri/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -31,7 +31,7 @@ #include "northbridge/amd/amdk8/debug.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/nvidia/l1_2pvv/romstage.c ============================================================================== --- trunk/src/mainboard/nvidia/l1_2pvv/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/nvidia/l1_2pvv/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -75,7 +75,7 @@
#include "northbridge/amd/amdk8/debug.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/sunw/ultra40/romstage.c ============================================================================== --- trunk/src/mainboard/sunw/ultra40/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/sunw/ultra40/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -32,7 +32,7 @@ #include "northbridge/amd/amdk8/debug.c" #include "superio/smsc/lpc47b397/lpc47b397_early_serial.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h"
#include "superio/smsc/lpc47b397/lpc47b397_early_gpio.c"
Modified: trunk/src/mainboard/supermicro/h8dme/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/h8dme/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/supermicro/h8dme/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -69,7 +69,7 @@
#include "northbridge/amd/amdk8/debug.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/supermicro/h8dmr/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/h8dmr/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/supermicro/h8dmr/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -72,7 +72,7 @@
#include "northbridge/amd/amdk8/debug.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/supermicro/h8dmr_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/h8dmr_fam10/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/supermicro/h8dmr_fam10/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -65,7 +65,7 @@
#include "northbridge/amd/amdfam10/debug.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdfam10/setup_resource_map.c"
@@ -73,14 +73,6 @@
#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c"
-static void memreset_setup(void) -{ -} - -static void memreset(int controllers, const struct mem_controller *ctrl) -{ -} - static inline void activate_spd_rom(const struct mem_controller *ctrl) { /* nothing to do */ @@ -281,10 +273,6 @@ //printk(BIOS_DEBUG, "enable_smbus()\n"); // enable_smbus(); /* enable in sio_setup */
-post_code(0x3E); - - memreset_setup(); - post_code(0x40);
printk(BIOS_DEBUG, "raminit_amdmct()\n");
Modified: trunk/src/mainboard/supermicro/h8qme_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/h8qme_fam10/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/supermicro/h8qme_fam10/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -66,7 +66,7 @@
#include "northbridge/amd/amdfam10/debug.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdfam10/setup_resource_map.c"
@@ -74,14 +74,6 @@
#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c"
-static void memreset_setup(void) -{ -} - -static void memreset(int controllers, const struct mem_controller *ctrl) -{ -} - static inline void activate_spd_rom(const struct mem_controller *ctrl) { #define SMBUS_SWITCH1 0x70 @@ -326,10 +318,6 @@ //printk(BIOS_DEBUG, "enable_smbus()\n"); // enable_smbus(); /* enable in sio_setup */
-post_code(0x3E); - - memreset_setup(); - post_code(0x40);
printk(BIOS_DEBUG, "raminit_amdmct()\n");
Modified: trunk/src/mainboard/supermicro/x6dai_g/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/x6dai_g/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/supermicro/x6dai_g/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -40,10 +40,6 @@ #define RECVENA_CONFIG 0x0808090a #define RECVENB_CONFIG 0x0808090a
-static inline void activate_spd_rom(const struct mem_controller *ctrl) -{ - /* nothing to do */ -} static inline int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address);
Modified: trunk/src/mainboard/supermicro/x6dhe_g/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/x6dhe_g/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/supermicro/x6dhe_g/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -41,10 +41,6 @@ #define RECVENA_CONFIG 0x0808090a #define RECVENB_CONFIG 0x0808090a
-static inline void activate_spd_rom(const struct mem_controller *ctrl) -{ - /* nothing to do */ -} static inline int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address); @@ -121,7 +117,6 @@ disable_watchdogs(); // dump_ipmi_registers(); // mainboard_set_e7520_leds(); -// memreset_setup(); sdram_initialize(ARRAY_SIZE(mch), mch); #if 0 dump_pci_devices();
Modified: trunk/src/mainboard/supermicro/x6dhe_g2/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/x6dhe_g2/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/supermicro/x6dhe_g2/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -41,10 +41,6 @@ #define RECVENA_CONFIG 0x0708090a #define RECVENB_CONFIG 0x0708090a
-static inline void activate_spd_rom(const struct mem_controller *ctrl) -{ - /* nothing to do */ -} static inline int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address); @@ -122,7 +118,6 @@ disable_watchdogs(); // dump_ipmi_registers(); // mainboard_set_e7520_leds(); -// memreset_setup(); sdram_initialize(ARRAY_SIZE(mch), mch); #if 0 dump_pci_devices();
Modified: trunk/src/mainboard/supermicro/x6dhr_ig/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/x6dhr_ig/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/supermicro/x6dhr_ig/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -42,10 +42,6 @@ #define RECVENA_CONFIG 0x0808090a #define RECVENB_CONFIG 0x0808090a
-static inline void activate_spd_rom(const struct mem_controller *ctrl) -{ - /* nothing to do */ -} static inline int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address); @@ -122,7 +118,6 @@ disable_watchdogs(); // dump_ipmi_registers(); mainboard_set_e7520_leds(); -// memreset_setup(); sdram_initialize(ARRAY_SIZE(mch), mch); #if 1 dump_pci_devices();
Modified: trunk/src/mainboard/supermicro/x6dhr_ig2/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/x6dhr_ig2/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/supermicro/x6dhr_ig2/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -42,10 +42,6 @@ #define RECVENA_CONFIG 0x0808090a #define RECVENB_CONFIG 0x0808090a
-static inline void activate_spd_rom(const struct mem_controller *ctrl) -{ - /* nothing to do */ -} static inline int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address); @@ -122,7 +118,6 @@ disable_watchdogs(); // dump_ipmi_registers(); mainboard_set_e7520_leds(); -// memreset_setup(); sdram_initialize(ARRAY_SIZE(mch), mch); #if 0 dump_pci_devices();
Modified: trunk/src/mainboard/technexion/tim5690/romstage.c ============================================================================== --- trunk/src/mainboard/technexion/tim5690/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/technexion/tim5690/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -55,7 +55,7 @@ #include "northbridge/amd/amdk8/debug.c" #include "superio/ite/it8712f/it8712f_early_serial.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/technexion/tim8690/romstage.c ============================================================================== --- trunk/src/mainboard/technexion/tim8690/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/technexion/tim8690/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -55,7 +55,7 @@ #include "northbridge/amd/amdk8/debug.c" #include "superio/ite/it8712f/it8712f_early_serial.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/tyan/s2735/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2735/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/tyan/s2735/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -41,19 +41,6 @@ #endif }
-static void memreset_setup(void) -{ -} - -static void memreset(int controllers, const struct mem_controller *ctrl) -{ -} - -static inline void activate_spd_rom(const struct mem_controller *ctrl) -{ - /* nothing to do */ -} - static inline int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address); @@ -76,12 +63,9 @@ unsigned cpu_reset = 0;
- if (bist == 0) - { -// early_mtrr_init(); - enable_lapic(); - - } + if (bist == 0) { + enable_lapic(); + }
// post_code(0x32); @@ -106,7 +90,6 @@ dump_smbus_registers(); #endif
- memreset_setup(); sdram_initialize(1, memctrl);
#if 0
Modified: trunk/src/mainboard/tyan/s2850/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2850/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/tyan/s2850/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -25,7 +25,7 @@ #include "northbridge/amd/amdk8/debug.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/tyan/s2875/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2875/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/tyan/s2875/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -25,7 +25,7 @@ #include "northbridge/amd/amdk8/debug.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/tyan/s2880/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2880/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/tyan/s2880/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -25,7 +25,7 @@ #include "northbridge/amd/amdk8/debug.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/tyan/s2881/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2881/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/tyan/s2881/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -30,7 +30,7 @@ #include "northbridge/amd/amdk8/debug.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/tyan/s2882/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2882/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/tyan/s2882/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -25,7 +25,7 @@ #include "northbridge/amd/amdk8/debug.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/tyan/s2885/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2885/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/tyan/s2885/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -25,7 +25,7 @@ #include "northbridge/amd/amdk8/debug.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/tyan/s2891/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2891/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/tyan/s2891/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -30,7 +30,7 @@ #include "northbridge/amd/amdk8/debug.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/tyan/s2892/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2892/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/tyan/s2892/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -31,7 +31,7 @@ #include "northbridge/amd/amdk8/debug.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/tyan/s2912/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2912/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/tyan/s2912/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -75,7 +75,7 @@
#include "northbridge/amd/amdk8/debug.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/tyan/s2912_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2912_fam10/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/tyan/s2912_fam10/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -68,7 +68,7 @@
#include "northbridge/amd/amdfam10/debug.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdfam10/setup_resource_map.c"
@@ -76,14 +76,6 @@
#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c"
-static void memreset_setup(void) -{ -} - -static void memreset(int controllers, const struct mem_controller *ctrl) -{ -} - static inline void activate_spd_rom(const struct mem_controller *ctrl) { /* nothing to do */ @@ -287,9 +279,7 @@
printk(BIOS_DEBUG, "enable_smbus()\n"); enable_smbus(); - post_code(0x3E);
- memreset_setup(); post_code(0x40);
printk(BIOS_DEBUG, "raminit_amdmct()\n");
Modified: trunk/src/mainboard/tyan/s4880/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s4880/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/tyan/s4880/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -25,7 +25,7 @@ #include "northbridge/amd/amdk8/debug.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/tyan/s4882/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s4882/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/tyan/s4882/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -24,7 +24,7 @@ #include "northbridge/amd/amdk8/debug.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
-#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c"
Modified: trunk/src/mainboard/via/epia-cn/romstage.c ============================================================================== --- trunk/src/mainboard/via/epia-cn/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/via/epia-cn/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -38,10 +38,6 @@ #include "southbridge/via/vt8237r/vt8237r_early_smbus.c" #include "southbridge/via/vt8235/vt8235_early_serial.c"
-static void memreset_setup(void) -{ -} - static inline int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address);
Modified: trunk/src/mainboard/via/epia-m/romstage.c ============================================================================== --- trunk/src/mainboard/via/epia-m/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/via/epia-m/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -1,9 +1,6 @@ #include <stdint.h> #include <device/pci_def.h> #include <device/pci_ids.h> -#if 0 -#include <cpu/x86/lapic.h> -#endif #include <arch/io.h> #include <device/pnp_def.h> #include <arch/romcc_io.h> @@ -22,10 +19,6 @@ #include "southbridge/via/vt8235/vt8235_early_smbus.c" #include "southbridge/via/vt8235/vt8235_early_serial.c"
-static void memreset_setup(void) -{ -} - static inline int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address);
Modified: trunk/src/mainboard/via/epia-n/romstage.c ============================================================================== --- trunk/src/mainboard/via/epia-n/romstage.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/mainboard/via/epia-n/romstage.c Wed Apr 14 13:40:34 2010 (r5426) @@ -54,10 +54,6 @@ .channel0 = { 0x50 }, };
-static void memreset_setup(void) -{ -} - static inline int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address);
Modified: trunk/src/northbridge/intel/e7501/raminit.c ============================================================================== --- trunk/src/northbridge/intel/e7501/raminit.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/northbridge/intel/e7501/raminit.c Wed Apr 14 13:40:34 2010 (r5426) @@ -1919,14 +1919,11 @@
RAM_DEBUG_MESSAGE("Reading SPD data...\n");
- //activate_spd_rom(ctrl); Not necessary for this chipset - - dimm_mask = spd_get_supported_dimms(ctrl); + dimm_mask = spd_get_supported_dimms(ctrl);
if (dimm_mask == 0) { print_debug("No usable memory for this controller\n"); - } else { - + } else { enable_e7501_clocks(dimm_mask);
RAM_DEBUG_MESSAGE("setting based on SPD data...\n"); @@ -1967,7 +1964,7 @@ DUMPNORTH();
ram_set_rcomp_regs(); - ram_set_d0f0_regs(); + ram_set_d0f0_regs(); }
/*^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^*/
Modified: trunk/src/northbridge/intel/i3100/raminit.c ============================================================================== --- trunk/src/northbridge/intel/i3100/raminit.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/northbridge/intel/i3100/raminit.c Wed Apr 14 13:40:34 2010 (r5426) @@ -88,7 +88,7 @@ { /* Calculate the log base 2 size of a DIMM in bits */ struct dimm_size sz; - int value, low, ddr2; + int value, low; sz.side1 = 0; sz.side2 = 0;
@@ -594,8 +594,6 @@
goto out;
- val_err: - die("Bad SPD value\n"); /* If an hw_error occurs report that I have no memory */ hw_err: drc = 0; @@ -715,7 +713,6 @@ u32 dimm; u32 edge; int32_t data32; - u32 data32_dram; u32 dcal_data32_0; u32 dcal_data32_1; u32 dcal_data32_2; @@ -948,10 +945,6 @@ u32 data32; u32 mode_reg; u32 *iptr; - volatile u32 *iptrv; - msr_t msr; - u32 scratch; - u8 byte; u16 data16; static const struct { u32 clkgr[4];
Modified: trunk/src/northbridge/via/vt8623/northbridge.c ============================================================================== --- trunk/src/northbridge/via/vt8623/northbridge.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/northbridge/via/vt8623/northbridge.c Wed Apr 14 13:40:34 2010 (r5426) @@ -60,7 +60,7 @@ } }
-static void nullfunc(void) +static void nullfunc(device_t dev) { /* Nothing to do */ }
On Wed, Apr 14, 2010 at 5:40 AM, repository service svn@coreboot.orgwrote:
Author: stepan Date: Wed Apr 14 13:40:34 2010 New Revision: 5426 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5426
Log: drop quite a lot of dead code that did nothing but produce warnings and make the rest of the code unreadable.
Modified: trunk/src/lib/debug.c
============================================================================== --- trunk/src/lib/debug.c Wed Apr 14 12:12:23 2010 (r5425) +++ trunk/src/lib/debug.c Wed Apr 14 13:40:34 2010 (r5426) @@ -33,7 +33,7 @@ { device_t dev; for (dev = PCI_DEV(0, 0, 0);
dev <= PCI_DEV(0, 0x1f, 0x7); dev += PCI_DEV(0, 0, 1)) {
dev <= PCI_DEV(0xff, 0x1f, 0x7); dev += PCI_DEV(0, 0, 1)) {
It looks like this slipped in. I thought it hangs some boards to probe PCI busses that aren't there.
Thanks, Myles
-
Myles Watson -
repository service