I write the 'ls -xxx' results to the PCI config registers. Can it work?
----- Original Message ---- From: Richard Smith smithbone@gmail.com To: Li Haiqiang haiqiang2linux@yahoo.com Cc: LinuxBIOS mailinglist linuxbios@linuxbios.org Sent: Monday, November 6, 2006 12:25:38 PM Subject: Re: [LinuxBIOS] Fwd: Hello, I have a problem to put the linuxbios on my mainboard ms6163.
Li Haiqiang wrote:
What does debug code 0xf9 mean? It stopped here.
Li,
The 440bx is NOT COMPLETE. It will NOT function. It is BROKEN. The port is not finished. Its does not enable RAM.
Hopefully, one of those translates correctly. Do you understand?
To make it work you need to add a lot of code. My earlier email talks about the necessary steps to get 440bx into a working shape.
* Li Haiqiang haiqiang2linux@yahoo.com [061106 05:45]:
I write the 'ls -xxx' results to the PCI config registers. Can it work?
As a first step this is worth a try, yes.
But you need to find out which are relevant, and the order plays a big role. Grab yourself a datasheet for the 440BX northbridge... Otherwise it will break as soon as you put in another DIMM module.
Stefan Reinauer wrote:
- Li Haiqiang haiqiang2linux@yahoo.com [061106 05:45]:
I write the 'ls -xxx' results to the PCI config registers. Can it work?
As a first step this is worth a try, yes.
But you need to find out which are relevant, and the order plays a big role. Grab yourself a datasheet for the 440BX northbridge... Otherwise it will break as soon as you put in another DIMM module.
I think there is slightly more than zero chance this will work. The ram init routines in that code are for VIA. None of the ram commands are correct.
* Richard Smith smithbone@gmail.com [061106 11:53]:
Stefan Reinauer wrote:
- Li Haiqiang haiqiang2linux@yahoo.com [061106 05:45]:
I write the 'ls -xxx' results to the PCI config registers. Can it work?
As a first step this is worth a try, yes.
But you need to find out which are relevant, and the order plays a big role. Grab yourself a datasheet for the 440BX northbridge... Otherwise it will break as soon as you put in another DIMM module.
I think there is slightly more than zero chance this will work. The ram init routines in that code are for VIA. None of the ram commands are correct.
Ah, I understood he wants to omit the ram init code and just poke the lspci -xxx values into the northbridge. This might work for a start, right? At least thats how we started working on the k8 port