Hello all,
I was very excited when I saw that the Supermicro X9SCL(+-F) and X9SCM(+F) boards seem to be supported by coreboot.
Can somebody please tell me whether the -F versions are supported, and how well? I have several X9SCM-F boards, and I would love for coreboot to be an option for them. If it helps I would be very happy to test coreboot on the X9SCM-F to help understand the unknowns.
Kind regards,
Andrew
On Thu, Jul 09, 2020 at 11:12:39PM +0100, U'll Be King of the Stars wrote:
Hello all,
I was very excited when I saw that the Supermicro X9SCL(+-F) and X9SCM(+F) boards seem to be supported by coreboot.
Can somebody please tell me whether the -F versions are supported, and how well? I have several X9SCM-F boards, and I would love for coreboot to be an option for them. If it helps I would be very happy to test coreboot on the X9SCM-F to help understand the unknowns.
While I have "successfully" tested on X9SCM-F, I have not extensively tested the BMC functionality while booted with coreboot, among other less-trivial to test features. Currently coreboot ignores the IPMI KCS functionality of X9SCL family boards, and even when it's enabled in coreboot, about all it does is wait for the BMC to finish booting. In any case, there doesn't seem to be glaringly obvious problems caused by ignoring the BMC in coreboot.
Some BMC feature completeness could perhaps be improved with some changes that are/were going through review recently.
I do not have complete information on what signals exist between the BMC and the rest of the mainboard other than the obvious PCI, LPC, and power state management signals. This may limit what degree of completeness can be accomplished with a reasonable amount of work.
I should look at my working tree to see what else may need to be submitted upstream for a more complete port. I know there are some things missing upstream still, such as thermostat setup for the fan controller.
I currently have X9SCL, X9SCM-F, and X9SCL+-F boards to test with.
These boards have a jumper and header for SPI access should the coreboot build not function correctly. The initial coreboot flashing can be completed without an external programmer, although I strongly recommend having a suitable external programmer setup (and backup flash image) that is known to work should any problems arise.
Jonathan