Re: [coreboot] coreboot Digest, Vol 147, Issue 19

[Keith Hui]

Hi (again) coreboot:

I read the below from the digest.

Having brought the P2B-LS into coreboot along with RAM init to 440BX
northbridge and cache init to Slot 1 CPUs back in 2010, I am
interested in bringing this platform up to standard. Where can I read
up on this cbmem in romstage standard?

However, of the family I only have P2B-LS and P3B-F on hand to boot test.

I just checked out the master from git in case they are part of the readings.

Thanks
Keith

On Thu, May 11, 2017 at 3:55 PM,   wrote:
> Date: Thu, 11 May 2017 10:24:16 -0600
> From: Martin Roth 
> To: coreboot 
> Subject: [coreboot] Platform / Chip removals after upcoming releases
> Message-ID:
>         
> Content-Type: text/plain; charset="utf-8"
>
> Along with the latest coreboot release, coreboot announced some standards
> for removing platforms after upcoming releases.
>
> Summary:
> After the 4.7 release platforms that do not support cbmem in romstage
>
> will be removed.  Please see the list of platforms to be removed if no work
> is done to update them at the end of this email.

<snip>
> Code removal after the 4.7 release

<snip>
> The next expectation that will need to be met for all platforms is cbmem in
> romstage. This currently affects numerous platforms, including most, if not
> all of AMD's platforms. Work to update many of these platforms has started,
> but there are others that have not made any progress towards this goal. A
> list
> of the platforms that are affected by this is included at the end of this
> email.

<snip>
> 146 Platforms currently scheduled for removal after 4.7 if no work is done
> to update them

<snip>
> ASUS_P2B
> ASUS_P2B_D
> ASUS_P2B_DS
> ASUS_P2B_F
> ASUS_P2B_LS
> ASUS_P3B_F