It appears we've got 3 people interested in having this functional, Ron, Andrew and myself. Myself = I need it working asap just to round out our epia-m solution Andrew = Seems to be working on it right now, priority unknown Ron = Seems to want it eventually but if it's in freebios2 that would be ok
As I understand it Ron doesn't have an epia-m to experiment with anyway. I can't do anything with freebios2 at this stage since everything is working so well with the freebios mechanics as it is. I don't mind doing bit banging in X86 code to get stuff done. Someone else can clean that up at a later date and convert it to C/romcc for maintainability.
Now realistically I knew nothing concrete about DRAM configuration or the details on the SPD system itself until some time 2 days ago and the time since. With the lm_sensors project I've managed to read out the serial eeprom contents and view it with a perl script and it looks like the right stuff. But I wouldn't know how to interpret that data and configure the dram controller and the ddr ram itself appropriately without more studying.
What I can contribute quickly could be figuring out how to read the SPD data from the VT8235 I2C or SMB bus or whatever early in the boot process. I was going to look into this right now anyway. Then maybe one of you other guys can run with this info to get the SPD dram configuration working.
-Dave
are you sure that the I2C is not being read now on EPIA-M? I have not looked but it seems it ought to be.
ron
Hi Ron,
are you sure that the I2C is not being read now on EPIA-M? I have not looked but it seems it ought to be.
DDR init is now hardcoded such that it might work for some DDR but not all. In long term, SPD will be implemented.
-Andrew