Am Montag, den 26.02.2018, 17:14 -0300 schrieb Sumo:
Hi,
In the coreboot build menu there is no option regarding the Intel ME integration. The 'coreboot.rom' file is the full SPI flash image or this file is suitable to replace the BIOS region of the SPI flash (0x00800000--0x00ffffff)? (i.e. in the SPI flash we already have a region for Intel ME firmware)
I'm not sure what the question is.
When configuring CB with menuconfig you have to select your platform and type in the path to your ME-binary-blob. The later has to be provided by you; meaning you have to extract the BIOS from the flash, extract the ME-binary using coreboot/utils, clean it with ME-cleaner (optional) and then build coreboot with your blob.
The toolchain takes care automatically about the correct placement of the ME in the right address-ranges.
I hope this was helpful.
Thanks, Sumo
My questions are:1. has anyone else seen a hang during smm relocation, w/cb 4.6/4.7, on a Broadwell-DE?2. if so, is the wbinvd() a valid way to resolve the hang?3. should our wbinvd() fix be upstreamed, without fully understanding why it is needed? All of code (cb, fsp, microcode, etc.) worked just fine with CB 4.5. With 4.6 and 4.7 LOGLEVEL=7 was needed to make things boot (by adding delays apparently). We configured CB with menuconfig and specified "Intel" as the platform. We are using an Intel supplied FSP binary. Kevin Herbert did the CB work, adding him to the thread. Thank you,Mark
On Monday, February 26, 2018 2:49 PM, Philipp Stanner stanner@posteo.de wrote:
Am Montag, den 26.02.2018, 17:14 -0300 schrieb Sumo:
Hi,
In the coreboot build menu there is no option regarding the Intel ME integration. The 'coreboot.rom' file is the full SPI flash image or this file is suitable to replace the BIOS region of the SPI flash (0x00800000--0x00ffffff)? (i.e. in the SPI flash we already have a region for Intel ME firmware)
I'm not sure what the question is.
When configuring CB with menuconfig you have to select your platform and type in the path to your ME-binary-blob. The later has to be provided by you; meaning you have to extract the BIOS from the flash, extract the ME-binary using coreboot/utils, clean it with ME-cleaner (optional) and then build coreboot with your blob.
The toolchain takes care automatically about the correct placement of the ME in the right address-ranges.
I hope this was helpful.
Thanks, Sumo
When configuring CB with menuconfig you have to select your platform and type in the path to your ME-binary-blob.
For the Harcuvar CRB there is no such configuration.
This conf. is available to other mainboards (e.g. Intel "Little Plains" mainboard: menu "Chipset"->"Intel Firmware"->"Add Intel descriptor.bin file"->"Add Intel ME/TXE firmware"->"Path to management engine firmware").
Maybe for the Harcuvar CRB the Intel ME FW is installed in the second SPI flash, therefore there is no need to add the ME blob in the coreboot build? I´m not sure about this, some board maintainer can confirm this?
Do we have any documentation regarding the coreboot port for Harcuvar?
Thanks, Sumo
2018-02-26 19:42 GMT-03:00 Philipp Stanner stanner@posteo.de:
Am Montag, den 26.02.2018, 17:14 -0300 schrieb Sumo:
Hi,
In the coreboot build menu there is no option regarding the Intel ME integration. The 'coreboot.rom' file is the full SPI flash image or this file is suitable to replace the BIOS region of the SPI flash (0x00800000--0x00ffffff)? (i.e. in the SPI flash we already have a region for Intel ME firmware)
I'm not sure what the question is.
When configuring CB with menuconfig you have to select your platform and type in the path to your ME-binary-blob. The later has to be provided by you; meaning you have to extract the BIOS from the flash, extract the ME-binary using coreboot/utils, clean it with ME-cleaner (optional) and then build coreboot with your blob.
The toolchain takes care automatically about the correct placement of the ME in the right address-ranges.
I hope this was helpful.
Thanks, Sumo
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mark pleso -
Philipp Stanner -
Sumo