I boot my board (Fam10/RS780/SB700) with coreboot. Sometimes it hangs at a place where it seems to a multi-core initialization. Before I debug this, could anyone give me a hint?
Dmesg is below.
Zheng
coreboot-4.0-r964:968M Mon Jan 10 17:17:17 CST 2011 starting...
BSP Family_Model: 00100f81 *sysinfo range: [000cc000,000cf360] bsp_apicid = 00 cpu_init_detectedx = 00000000 microcode: equivalent rev id = 0x1081, current patch id = 0x00000000 microcode: patch id to apply = 0x010000c4 microcode: updated to patch id = 0x010000c4 success
cpuSetAMDMSR done Enter amd_ht_init() AMD_CB_EventNotify() event class: 02 event: 2005 data: 05 00 00 00 01 AMD_CB_EventNotify() event class: 05 event: 2006 data: 04 00 00 ff Exit amd_ht_init() cpuSetAMDPCI 00 done Prep FID/VID Node:00 F3x80: e600a681 F3x84: a0e641e6 F3xD4: c8810f27 F3xD8: 03000c16 F3xDC: 0000543a core0 started: start_other_cores() init node: 00 cores: 05 Start other core - nodeid: 00 cores: 05 started ap apicid: c ccococoroorrrereexeex:xx:x: :: -- ----------- --{ {{{ {AA AAAPPPIIPPCIIICCCIICDDIII DD D == === 002100053 4NN NNOONDDOOODDDEEEIIEEDIIIDDD D== === 00 0000000 0CC CCCOORROOORRREEEIIEEDIIIDDD D== === 00 1000245}}3 }}} ------ -------
eequuPiimmmcc iiirr0cccroo1rrooccsocccootoooddardddee:teee: e:::eed eqq dd quuii*uiivv iaAvvvallPaaalee llenn0eenntt2nttt s rrtarrreereeevv tvvv iie idddiid rrenne ==* === A 00Pxx000 xx11x00101108803088118s11,,1ta,, , r ccctccuurueuurrrrdrreer 00xx0 ennttn*tt t A pp pPppaaa aatttcct0tcchhc4hh hsi t iddiaii drdd == t == =e 00 d 0t xx00x0*000000 00000A000000P000000 0000000000005s00
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immmicdi rcrro ciiccr oroooccscrccoodo5ooded6dde::e5ee: :0: pp _ppaapeaaattatrttcchclcch hyhh ii _ iddisid d pppllp tuttootpoo o ( aapa)aappp ppyylllg yyye == t ===_c00 pxx000xxxu001000_100111r00000ev000000 00000Ecc00ccA44c444 =
:::iimmmciii1crccc0roorrr0fccooo8oocccooo1ddeddd.e::eee uu CuuppuPddpUppdaad dattaRatetteedeveed d dd tt isttooto oo n ppapoppatataatttcct 11000chehh c iidioiid dgdd == ni== =z 00 0e00xx0xdxx010.001001 ssss 0000000NB00000 0cc00cRc44c44e4 v ss issuussiuccuucoccccccnceesee essssiss
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_devices_por_init() sb700_devices_por_init(): SMBus Device, BDF:0-20-0 SMBus controller enabled, sb revision is A15 sb700_devices_por_init(): IDE Device, BDF:0-20-1 sb700_devices_por_init(): LPC Device, BDF:0-20-3 sb700_devices_por_init(): P2P Bridge, BDF:0-20-4 sb700_devices_por_init(): SATA Device, BDF:0-18-0 sb700_pmio_por_init()
Begin FIDVID MSR 0xc0010071 0x38ae00e4 0x38047440 FIDVID on BSP, APIC_id: 00 BSP fid = 0 Wait for AP stage 1: ap_apicid = 1 readback = 1000001 common_fid(packed) = 0 Wait for AP stage 1: ap_apicid = 2 readback = 2000001 common_fid(packed) = 0 Wait for AP stage 1: ap_apicid = 3 readback = 3000001 common_fid(packed) = 0 Wait for AP stage 1: ap_apicid = 4 readback = 4000001 common_fid(packed) = 0 Wait for AP stage 1: ap_apicid = 5 readback = 5000001 common_fid(packed) = 0 common_fid = 0 End FIDVIDMSR 0xc0010071 0x38ae00e4 0x38047440 sr5650_htinit cpu_ht_freq=0. sr5650_htinit: HT1 mode ...WARM RESET...
coreboot-4.0-r964:968M Mon Jan 10 17:17:17 CST 2011 starting...
BSP Family_Model: 00100f81 *sysinfo range: [000cc000,000cf360] bsp_apicid = 00 cpu_init_detectedx = 00000000 microcode: equivalent rev id = 0x1081, current patch id = 0x00000000 microcode: patch id to apply = 0x010000c4 microcode: updated to patch id = 0x010000c4 success
cpuSetAMDMSR done Enter amd_ht_init() AMD_CB_EventNotify() event class: 02 event: 2005 data: 05 00 00 00 01 AMD_CB_EventNotify() event class: 05 event: 2006 data: 04 00 00 ff Exit amd_ht_init() cpuSetAMDPCI 00 done Prep FID/VID Node:00 F3x80: e600a681 F3x84: a0e641e6 F3xD4: c8810f27 F3xD8: 03000c16 F3xDC: 0000543a core0 started: start_other_cores() init node: 00 cores: 05 Start other core - nodeid: 00 cores: 05 started ap apicid: c cocccooororrrreexeeexx:xx:::: - ------------- -{ { {{{ A AAAAPPIPPPIIICICCCCIIDIIIDD DD === == 0100004 523 N ONNNNODOOODDDEDIEEEEIDIIIDDD D= === =0 00000000 0C OCCCCOOROORRRREEIEEEIIIDI DDDD = ==== 0 00010}2534} }}} ------ -------
eeeiAcPmmmm iiiircccco0rrrc1rooosoocdtccceaoooordddd:eeee t:::ee: qd eu qqqq*uuuuviiiia vvvlAvaaePaaln lllt0eeee2nnnn ttttrs et rrvarre reeeitvvvve diiii dddd d = nrrrrteeee ====0 xA 1P0000xxx 0x110811031000s,8888 1111tc,,,,a ruccctrcuueruurderrr nnnn* ttt pt Aa pPtppp caaaa0htttt cccc4hhhhsi td iia iidr=dddt 0====e dx0 00xx 000s0xx0*0000 0000000000A0000P0000 0000000005 t 0000
iiccrctremmmmodcii rrdrccor ooeoocc:ccsro ooo5dpdddeaeee6t:::5: 0 cpp_phpaea aaatitttcdcccr hhhlh y tii_ioidsd dde p=ppttptttopooou p laaa(aypp)p pp 000 l llly0yyyg ex =t0===_1 0000c0xxxp0x00u0001_0111rc000040000e0000v = 0cccEcm44A4i4 r
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d vsiiiinnnirniid5iit_6ttt_s5___t0ffff_iiiiaddddgpvvveovii2riid _dddai____nsssspittttiaaaactggg geed iiicee2:222 0aaaap1pppi ccc
-----Original Message----- From: coreboot-bounces+scott=notabs.org@coreboot.org [mailto:coreboot-bounces+scott=notabs.org@coreboot.org] On Behalf Of Bao, Zheng Sent: Monday, January 10, 2011 12:00 AM To: coreboot@coreboot.org Subject: [coreboot] dmesg of a board which hangs at somewhere
]I boot my board (Fam10/RS780/SB700) with coreboot. Sometimes it hangs at ]a place where it seems to a multi-core initialization. Before I debug ]this, could anyone give me a hint?
I had a similar problem. It seems to be caused by multiple cores accessing the cf8/cfc interface simutaneously. Using the MMCONF_SUPPORT completely eliminates the problem for me.
Thanks, Scott
]Dmesg is below.
]Zheng
On Mon, Jan 10, 2011 at 8:59 AM, Scott Duplichan scott@notabs.org wrote:
-----Original Message----- From: coreboot-bounces+scott=notabs.org@coreboot.org [mailto:coreboot-bounces+scott=notabs.org@coreboot.org] On Behalf Of Bao, Zheng Sent: Monday, January 10, 2011 12:00 AM To: coreboot@coreboot.org Subject: [coreboot] dmesg of a board which hangs at somewhere
]I boot my board (Fam10/RS780/SB700) with coreboot. Sometimes it hangs at ]a place where it seems to a multi-core initialization. Before I debug ]this, could anyone give me a hint?
I had a similar problem. It seems to be caused by multiple cores accessing the cf8/cfc interface simutaneously. Using the MMCONF_SUPPORT completely eliminates the problem for me.
All AMD CPUs should be using MMCONF_SUPPORT now. I thought that had been added several months ago.
Xavi brings up a good point, Check the BKDG and revision guide for settings and bug fixes that need to be implemented for newer CPUs. Also check the the FID/VID setting is correct for the CPU.
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Bao, Zheng -
Marc Jones -
Scott Duplichan