Eric,
I find the problem, need to call init_timer in p6 cpu fixup. It works well now.
Some code should be moved to p6 or even p5.
For example: apic_timper.c enable_mmx_sse.inc/disable_mmx_sse.inc
regards
YH
-----邮件原件----- 发件人: YhLu 发送时间: 2004年6月25日 14:12 收件人: ebiederman@lnxi.com 抄送: ron minnich; Stefan Reinauer; LinuxBIOS 主题: Re: E7501 support in V2
Eric,
I made some progress. Till now it can not start other CPUs. And post code is 75. What can cause that?
Regards
YH
LinuxBIOS-1.1.62.0_Fallback Fri Jun 25 12:32:23 PDT 2004 starting... SMBus controller enabled Ram1.00 Setting RCOMP registers. PCI: 00:00.00 00: 86 80 4c 25 06 00 90 00 01 00 00 06 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 00 00 00 00 40: 09 00 05 11 00 00 00 00 00 00 00 00 00 00 00 00 50: 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 10 00 00 00 09 00 44 00 80: 00 00 71 00 00 00 00 00 00 a0 31 02 80 00 00 00 90: 00 00 00 00 00 00 00 00 55 05 55 05 01 02 38 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 44 c0 50 11 00 08 ff 03 00 00 00 00 00 00 00 00 d0: 02 28 00 0e 03 00 00 33 80 69 31 b5 00 00 00 00 e0: 1d 1d 00 00 00 00 00 00 54 48 00 00 00 00 00 00 f0: 00 00 00 00 74 00 00 40 40 0f 00 00 00 00 00 00 0000002c <-358015d9 00000080 <-00000bb1 00000088 <-00000080 00000058 <-33333000 0000005c <-33333333 00000060 <-04030201 00000064 <-08070605 00000068 <-00000000 0000006c <-00000000 00000070 <-00000000 00000074 <-00000000 00000078 <-3901041f 0000007c <-00650000 00000088 <-d20a9800 0000008c <-0000000f 000000c4 <-03ff2000 000000c8 <-00000000 000000e0 <-0000001c 000000d8 <-00000000 000000f4 <-40300002 00001050 <-00000030 PCI: 00:00.00 00: 86 80 4c 25 06 00 90 00 01 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 d9 15 80 35 30: 00 00 00 00 40 00 00 00 00 00 00 00 00 00 00 00 40: 09 00 05 11 00 00 00 00 00 00 00 00 00 00 00 00 50: 04 00 00 00 00 00 00 00 00 30 33 33 33 33 33 33 60: 01 02 03 04 05 06 07 08 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 1f 04 01 39 09 00 65 00 80: b1 0b 71 00 00 00 00 00 00 98 0a d2 8f 00 00 00 90: 00 00 00 00 00 00 00 00 55 05 55 05 01 02 38 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 44 c0 50 11 00 20 ff 03 00 00 00 00 00 00 00 00 d0: 02 28 00 0e 03 00 00 33 80 09 31 b5 00 00 00 00 e0: 1c 1d 00 00 00 00 00 00 54 48 00 00 00 00 00 00 f0: 00 00 00 00 76 00 30 40 40 0f 00 00 00 00 00 00 Ram2.00 Reading SPD data... setting based on SPD data... page size =00000011 00000011 width =00000008 00000008 page size =00000011 00000011 width =00000008 00000008 page size =00000000 00000000 width =00000000 00000000 page size =00000000 00000000 width =00000000 00000000 done Ram3 Ram Enable 1 Ram Enable 2 Ram Enable 3 Ram Enable 4 Ram Enable 5 Ram Enable 6 Ram Enable 7 Ram Enable 8 Ram Enable 9 Ram Enable 10 Ram Enable 11 dimm size =00000020 00000020 dimm size =00000020 00000020 dimm size =00000000 00000000 dimm size =00000000 00000000 Initializing ECC state... ECC state initialized. PCI: 00:00.00 00: 86 80 4c 25 06 00 90 00 01 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 d9 15 80 35 30: 00 00 00 00 40 00 00 00 00 00 00 00 00 00 00 00 40: 09 00 05 11 00 00 00 00 00 00 00 00 00 00 00 00 50: 04 00 0d 00 00 00 00 00 00 30 33 33 33 33 33 33 60: 10 20 30 40 40 40 40 40 00 00 00 00 00 00 00 00 70: 44 44 00 00 00 00 00 00 14 02 01 39 79 02 67 20 80: b1 0b 71 00 00 00 00 00 00 98 10 d2 8c 00 00 00 90: 00 00 00 00 00 00 00 00 55 05 55 05 01 02 38 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 44 c0 50 11 00 c0 40 00 50 00 00 00 00 00 00 00 d0: 02 28 00 0e 03 00 00 33 80 09 31 b5 00 00 00 00 e0: 1c 1d 00 00 00 00 00 00 54 48 00 00 00 00 00 00 f0: 00 00 00 00 76 00 30 40 40 0f 00 00 00 00 00 00 Ram4 Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-1.1.62.0_Fallback Fri Jun 25 12:32:23 PDT 2004 booting... Finding PCI configuration type. PCI: Using configuration type 1 Enumerating static devices... Enumerating: intel E7501 Northbridge Enumerating: Intel 82801er Southbridge Enumerating: Winbond w83627hf Enumerating buses... PCI: pci_scan_bus for bus 0 PCI: 00:00.0 [8086/254c] enabled PCI: 00:00.1 [8086/2541] enabled PCI: 00:02.0 [8086/2543] enabled PCI: 00:06.0 [8086/2549] enabled PCI: 00:1d.0 [8086/24d2] ops PCI: 00:1d.0 [8086/24d2] enabled PCI: 00:1d.1 [8086/24d4] ops PCI: 00:1d.1 [8086/24d4] enabled PCI: 00:1d.2 [8086/24d7] ops PCI: 00:1d.2 [8086/24d7] enabled PCI: 00:1d.3 [8086/24de] ops PCI: 00:1d.3 [8086/24de] enabled PCI: 00:1d.7 [8086/24dd] ops PCI: 00:1d.7 [8086/24dd] enabled PCI: 00:1e.0 [8086/244e] enabled PCI: 00:1f.0 [8086/24d0] bus ops PCI: 00:1f.0 [8086/24d0] enabled PCI: 00:1f.1 [8086/24db] ops PCI: 00:1f.1 [8086/24db] enabled PCI: 00:1f.2 [8086/24df] enabled PCI: 00:1f.3 [8086/24d3] enabled PCI: 00:1f.5 [8086/24d5] ops PCI: 00:1f.5 [8086/24d5] enabled PCI: 00:1f.6 [8086/24d6] ops PCI: 00:1f.6 [8086/24d6] enabled PCI: pci_scan_bus for bus 1 PCI: 01:1c.0 [8086/1461] enabled PCI: 01:1d.0 [8086/1460] enabled PCI: 01:1e.0 [8086/1461] enabled PCI: 01:1f.0 [8086/1460] enabled PCI: pci_scan_bus for bus 2 PCI: 02:01.0 [8086/1010] enabled PCI: 02:01.1 [8086/1010] enabled PCI: pci_scan_bus returning with max=02 PCI: pci_scan_bus for bus 3 PCI: pci_scan_bus returning with max=03 PCI: pci_scan_bus returning with max=03 PCI: pci_scan_bus for bus 4 PCI: 04:02.0 [1002/4752] enabled PCI: pci_scan_bus returning with max=04 scan_static_bus for PCI: 00:1f.0 scan_static_bus done PCI: pci_scan_bus returning with max=04 done Allocating resources... Allocating VGA resource PCI: 04:02.0 ASSIGN RESOURCES, bus 0 PCI: 00:02.0 1c <- [0x00001000 - 0x00001fff] bus 1 io PCI: 00:02.0 24 <- [0xfe300000 - 0xfe2fffff] bus 1 prefmem PCI: 00:02.0 20 <- [0xfe100000 - 0xfe2fffff] bus 1 mem ASSIGN RESOURCES, bus 1 PCI: 01:1c.0 10 <- [0xfe200000 - 0xfe200fff] mem PCI: 01:1d.0 1c <- [0x00001000 - 0x00001fff] bus 2 io PCI: 01:1d.0 24 <- [0xfe300000 - 0xfe2fffff] bus 2 prefmem PCI: 01:1d.0 20 <- [0xfe100000 - 0xfe1fffff] bus 2 mem ASSIGN RESOURCES, bus 2 PCI: 02:01.0 10 <- [0xfe100000 - 0xfe11ffff] mem PCI: 02:01.0 20 <- [0x00001000 - 0x0000103f] io PCI: 02:01.1 10 <- [0xfe120000 - 0xfe13ffff] mem PCI: 02:01.1 20 <- [0x00001040 - 0x0000107f] io ASSIGNED RESOURCES, bus 2 PCI: 01:1e.0 10 <- [0xfe201000 - 0xfe201fff] mem PCI: 01:1f.0 1c <- [0x00002000 - 0x00001fff] bus 3 io PCI: 01:1f.0 24 <- [0xfe300000 - 0xfe2fffff] bus 3 prefmem PCI: 01:1f.0 20 <- [0xfe200000 - 0xfe1fffff] bus 3 mem ASSIGNED RESOURCES, bus 1 PCI: 00:1d.0 20 <- [0x00003480 - 0x0000349f] io PCI: 00:1d.1 20 <- [0x000034a0 - 0x000034bf] io PCI: 00:1d.2 20 <- [0x000034c0 - 0x000034df] io PCI: 00:1d.3 20 <- [0x000034e0 - 0x000034ff] io PCI: 00:1d.7 10 <- [0xfe300000 - 0xfe3003ff] mem PCI: 00:1e.0 1c <- [0x00002000 - 0x00002fff] bus 4 io PCI: 00:1e.0 24 <- [0xfe300000 - 0xfe2fffff] bus 4 prefmem PCI: 00:1e.0 20 <- [0xfd000000 - 0xfe0fffff] bus 4 mem ASSIGN RESOURCES, bus 4 PCI: 04:02.0 10 <- [0xfd000000 - 0xfdffffff] mem PCI: 04:02.0 14 <- [0x00002000 - 0x000020ff] io PCI: 04:02.0 18 <- [0xfe000000 - 0xfe000fff] mem ASSIGNED RESOURCES, bus 4 PCI: 00:1f.0 00 <- [0x00000000 - 0xffffffff] io PCI: 00:1f.0 00 <- [0x00000000 - 0xffffffff] mem PCI: 00:1f.1 10 <- [0x00003840 - 0x00003847] io PCI: 00:1f.1 14 <- [0x00003880 - 0x00003883] io PCI: 00:1f.1 18 <- [0x00003850 - 0x00003857] io PCI: 00:1f.1 1c <- [0x00003890 - 0x00003893] io PCI: 00:1f.1 20 <- [0x00003820 - 0x0000382f] io PCI: 00:1f.1 24 <- [0xfe301000 - 0xfe3013ff] mem PCI: 00:1f.2 10 <- [0x00003860 - 0x00003867] io PCI: 00:1f.2 14 <- [0x000038a0 - 0x000038a3] io PCI: 00:1f.2 18 <- [0x00003870 - 0x00003877] io PCI: 00:1f.2 1c <- [0x000038b0 - 0x000038b3] io PCI: 00:1f.2 20 <- [0x00003830 - 0x0000383f] io PCI: 00:1f.3 20 <- [0x00003800 - 0x0000381f] io PCI: 00:1f.5 18 <- [0xfe302000 - 0xfe3021ff] mem PCI: 00:1f.5 1c <- [0xfe303000 - 0xfe3030ff] mem PCI: 00:1f.6 10 <- [0x00003000 - 0x000030ff] io PCI: 00:1f.6 14 <- [0x00003400 - 0x0000347f] io ASSIGNED RESOURCES, bus 0 done. Enabling resourcess... PCI: 00:00.0 cmd <- 146 PCI: 00:00.1 cmd <- 140 PCI: 00:02.0 bridge ctrl <- 0003 PCI: 00:02.0 cmd <- 147 PCI: 01:1c.0 cmd <- 142 PCI: 01:1d.0 bridge ctrl <- 0003 PCI: 01:1d.0 cmd <- 147 PCI: 02:01.0 cmd <- 143 PCI: 02:01.1 cmd <- 143 PCI: 01:1e.0 cmd <- 142 PCI: 01:1f.0 bridge ctrl <- 0003 PCI: 01:1f.0 cmd <- 147 PCI: 00:06.0 cmd <- 140 PCI: 00:1d.0 cmd <- 141 PCI: 00:1d.1 cmd <- 141 PCI: 00:1d.2 cmd <- 141 PCI: 00:1d.3 cmd <- 141 PCI: 00:1d.7 cmd <- 142 PCI: 00:1e.0 bridge ctrl <- 000b PCI: 00:1e.0 cmd <- 147 PCI: 04:02.0 cmd <- 1c3 PCI: 00:1f.0 cmd <- 14f PCI: 00:1f.1 cmd <- 143 PCI: 00:1f.2 cmd <- 141 PCI: 00:1f.3 cmd <- 141 PCI: 00:1f.5 cmd <- 142 PCI: 00:1f.6 cmd <- 141 done. Initializing devices... PNP: 002e.0 init PNP: 002e.2 init PNP: 002e.5 init PNP: 002e.b init PCI: 00:1d.0 init PCI: 00:1d.1 init PCI: 00:1d.2 init PCI: 00:1d.3 init PCI: 00:1d.7 init PCI: 00:1f.0 init ioapic southbridge enabled 2186 Southbridge apic id = 2000000 set power on after power fail RTC Init Invalid CMOS LB checksum PCI: 00:1f.1 init Devices initialized remap_high is 0 totalram: 4096M Initializing CPU #0 Enabling cache... Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) type: WB Setting fixed MTRRs(24-88) type: WB DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB Setting variable MTRR 2, base: 3072MB, range: 512MB, type WB Setting variable MTRR 3, base: 3584MB, range: 256MB, type WB Setting variable MTRR 4, base: 3840MB, range: 128MB, type WB Setting variable MTRR 5, base: 4096MB, range: 128MB, type WB DONE variable MTRRs Clear out the extra MTRR's call intel_enable_fixed_mtrr() call intel_enable_var_mtrr() Leave setup_mtrrs done.
Max cpuid index : 2 Vendor ID : GenuineIntel Processor Type : 0x00 Processor Family : 0x0f Processor Model : 0x02 Processor Mask : 0x00 Processor Stepping : 0x04 Feature flags : 0x3febfbff
Cache/TLB descriptor values: 1 reads required Desc 0x50 : UNKNOWN Desc 0x5b : UNKNOWN Desc 0x66 : UNKNOWN Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x40 : No L2 cache Desc 0x70 : UNKNOWN Desc 0x7b : UNKNOWN Desc 0x00 : null
MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled
Updating microcode microcode_info: sig = 0x00000f24 pf=0x00000002 rev = 0x00000000 Setting up local apic... apic_id: 0 done. CPU #0 Initialized _______________________________________________ Linuxbios mailing list Linuxbios@clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios
YhLu YhLu@tyan.com writes:
Eric,
I find the problem, need to call init_timer in p6 cpu fixup. It works well now.
Some code should be moved to p6 or even p5.
For example: apic_timper.c enable_mmx_sse.inc/disable_mmx_sse.inc
Except for the Opteron init_timer is really not appropriate as a cpu thing. In general it is a motherboard type decision. It is one of the rough areas in V2 right now.
For the rest you can see why I am in the process of reworking the cpu initialization code.
Eric
-
ebiederman＠lnxi.com -
YhLu