After some toing and froing with Aaron Durbin over the last 6 hours this is where we are:
mrc.cache is now working but cold boot still takes roughly 5 seconds to get to SeaBIOS display. Warm boot/reset is instantaneous. Aaron says the mrc.bin blob is not happy (and we can't have an unhappy blob now, can we).
In order to get mrc.cache working this is what's required:
1. Remove 'select CHROMEOS' from src/mainboard/samsung/lumpy/Kconfig. 2. Add this patch:
diff --git a/src/vendorcode/google/chromeos/gnvs.h b/src/vendorcode/google/chrom index 00fe443..5384423 100644 --- a/src/vendorcode/google/chromeos/gnvs.h +++ b/src/vendorcode/google/chromeos/gnvs.h @@ -61,9 +61,13 @@ typedef struct { // dbe } __attribute__((packed)) chromeos_acpi_t;
+#if CONFIG_CHROMEOS extern chromeos_acpi_t *vboot_data; void chromeos_init_vboot(chromeos_acpi_t *chromeos); void chromeos_set_me_hash(u32*, int); void acpi_get_vdat_info(uint64_t *vdat_addr, uint32_t *vdat_size); +#else +static inline void chromeos_init_vboot(chromeos_acpi_t *chromeos) {} +#endif
#endif 3. make oldconfig 4. make clean 5. make (obviously)
Additionally, to get timing information in cbmem -c and cbmem -t the following was necessary:
1. Add 'select LAPIC_MONOTONIC_TIMER' to src/mainboard/samsung/lumpy/Kconfig 2. make oldconfig 3. make (again obviously)
The cbmem output is attached. Where to go from here? Many thanks to Aaron for all his help.
Looking at cbmem -c output this seems to be where the 5 seconds is being lost, but it's truncating the output. How can I stop cbmem from truncating the output so I can see what's going on?
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffff9d0/0x800000 CBFS: CBFS location: 0x700000~0x7ff9f0, align: 64 CBFS: Looking for 'mrc.bin' starting from 0x700000. CBFS: - load entry 0x700000 file name (16 bytes)... CBFS: (unmatched file @0x700000: cmos_layout.bin) CBFS: - load entry 0x7004c0 file name (32 bytes)... CBFS: (unmatched file @0x7004c0: pci8086,0106.rom) CBFS: - load entry 0x710500 file name (72 bytes)... CBFS: (unmatched file @0x710500: cpu_microcode_blob.bin) CBFS: - load entry 0x7155c0 file name (32 bytes)... CBFS: (unmatched file @0x7155c0: fallback/romstage) CBFS: - load entry 0x71d8c0 file name (32 bytes)... CBFS: (unmatched file @0x71d8c0: fallback/coreboot_ram) CBFS: - load entry 0x731c80 file name (32 bytes)... CBFS: (unmatched file @0x731c80: fallback/payload) CBFS: - load entrypsmb@<B5>^?
*** Log truncated, 2146 characters dropped. ***
John.
On 31/07/2013 23:29, John Lewis wrote:
After some toing and froing with Aaron Durbin over the last 6 hours this is where we are:
mrc.cache is now working but cold boot still takes roughly 5 seconds to get to SeaBIOS display. Warm boot/reset is instantaneous. Aaron says the mrc.bin blob is not happy (and we can't have an unhappy blob now, can we).
In order to get mrc.cache working this is what's required:
- Remove 'select CHROMEOS' from src/mainboard/samsung/lumpy/Kconfig.
- Add this patch:
diff --git a/src/vendorcode/google/chromeos/gnvs.h b/src/vendorcode/google/chrom index 00fe443..5384423 100644 --- a/src/vendorcode/google/chromeos/gnvs.h +++ b/src/vendorcode/google/chromeos/gnvs.h @@ -61,9 +61,13 @@ typedef struct { // dbe } __attribute__((packed)) chromeos_acpi_t;
+#if CONFIG_CHROMEOS extern chromeos_acpi_t *vboot_data; void chromeos_init_vboot(chromeos_acpi_t *chromeos); void chromeos_set_me_hash(u32*, int); void acpi_get_vdat_info(uint64_t *vdat_addr, uint32_t *vdat_size); +#else +static inline void chromeos_init_vboot(chromeos_acpi_t *chromeos) {} +#endif
#endif 3. make oldconfig 4. make clean 5. make (obviously)
Additionally, to get timing information in cbmem -c and cbmem -t the following was necessary:
- Add 'select LAPIC_MONOTONIC_TIMER' to
src/mainboard/samsung/lumpy/Kconfig 2. make oldconfig 3. make (again obviously)
The cbmem output is attached. Where to go from here? Many thanks to Aaron for all his help.
-
John Lewis