I really should check this list more often. However I've been really busy...
I think I gathered that the VGA isn't showing up in the lspci. I looked at the latest CVS and found my earlysetup.inc isn't getting included in the Config in src/mainboard/via/epia-m. Actually the earlysetup.inc isn't even there.
Here's what I have. This can go after mainboardinit southbridge/via/vt8235/setup_misc.inc // enable VGA device movl $CONFIG_ADDR(0, 0x00, 0xe1), %eax movb $0xbd, %dl // enable vga with 8 megs PCI_WRITE_CONFIG_BYTE
// The stupid firewire device (undocumented) steps on IO 0+ on reset movl $CONFIG_ADDR(0, 0x0d*8, 0x15), %eax movb $0x1c, %dl PCI_WRITE_CONFIG_BYTE
Both of the above are *required*.
The following is optional but works well for me. Our application has a pci card in the slot that can impose an interrupt even after a cpu reset, so this can cause a lockup. I got around this by doing a single hard pci bus reset. In order to know if I've already done the reset once, I store a flag in the CMOS memory. I think this is a good idea but my choice of where in the CMOS to store the flag is probably not kosher.
// use CMOS byte 0x0e as marker so we only reboot once movb $0x0e, %al mov $0x70, %dx outb %al, %dx inc %dx inb %dx, %al cmpb $0xda, %al je 1f
movl $0x100000, %ecx 0: movw $0x70,%dx mov $0x0e,%al outb %al, %dx inc %dx movb $0xda, %al outb %al, %dx inb %dx, %al cmpb $0xda, %al je 4f dec %ecx jne 0b
4:
CONSOLE_INFO_TX_CHAR($'R') CONSOLE_INFO_TX_CHAR($'B') CONSOLE_INFO_TX_CHAR($'!') movl $CONFIG_ADDR(0, 0x88, 0x4f), %eax movb $0x09, %dl PCI_WRITE_CONFIG_BYTE
2: jmp 2b
1: sub %al,%al outb %al, %dx 3:
Finally, I implemented the SMBUS io for being able to access the serial eeprom on the DDR module. I had it print out the contents of the serial eeprom on bootup. I had hoped Ron or Eric or cwlinux would run with this and implement the auto ddr memory config but that didn't happen.
Anyway after the topmost fix the VGA will probably appear in lspci.
-Dave
dave, can you send me a diff -u and I'll apply that patch.
thanks
ron
sorry, Dave, I saw that last part of your note where I had not used your smbus stuff yet for V2. It's in the queue, hang in there, we had some K8 stuff take longer than we hoped.
ron
On Sat, 27 Mar 2004, Dave Ashley wrote:
Here's what I have. This can go after mainboardinit southbridge/via/vt8235/setup_misc.inc // enable VGA device movl $CONFIG_ADDR(0, 0x00, 0xe1), %eax movb $0xbd, %dl // enable vga with 8 megs PCI_WRITE_CONFIG_BYTE
This code is in there but set for 32M.
// The stupid firewire device (undocumented) steps on IO 0+ on reset movl $CONFIG_ADDR(0, 0x0d*8, 0x15), %eax movb $0x1c, %dl PCI_WRITE_CONFIG_BYTE
it seems to be in there.
// use CMOS byte 0x0e as marker so we only reboot once . . .
this is in there too.
ron