Bridge Mem Window/Prefetch Window

[Dan Lykowski]

Can anyone point me in the right direction as to where the Bridge Mem Window/Prefetch Window PCI configurations are defined/setup/used/etc. Coreboot does not set these correctly in my case. ( As compared to the standard BIOS )

Thanks,
Dan Lykowski

[Myles Watson]

On Tue, Jan 27, 2009 at 1:43 PM, Dan Lykowski  wrote:
> Can anyone point me in the right direction as to where the Bridge Mem
> Window/Prefetch Window PCI configurations are defined/setup/used/etc.
> Coreboot does not set these correctly in my case. ( As compared to the
> standard BIOS )

v2, right?

Resource allocation happens in compute_allocate_resource in src/devices/device.c

That function gets passed a type and a type mask.  Depending on what
type the children's resources are they get added to the Mem/Prefetch
allocation.  In the log you should be able to see calls to
compute_allocate_resource and follow it through.

Good Luck,
Myles

[Stefan Reinauer]

Dan Lykowski wrote:
> Can anyone point me in the right direction as to where the Bridge Mem
> Window/Prefetch Window PCI configurations are defined/setup/used/etc.
> Coreboot does not set these correctly in my case. ( As compared to the
> standard BIOS )

What's the difference?

Stefan

[Dan Lykowski]

CoreBoot Kernel Log:
[    0.412025] PCI: Bridge: 0000:00:01.0
[    0.416027]   IO window: 1000-1fff
[    0.420032]   MEM window: 0xfc500000-0xfc6fffff
[    0.427975]   PREFETCH window: 0x00000000f0000000- 0x00000000f7ffffff
[    0.440718] PCI: Bridge: 0000:00:04.0
[    0.448082]   IO window: 2000-2fff
[    0.454929]   MEM window: 0xfc700000-0xfc7fffff
[    0.464029]   PREFETCH window: disabled.
[    0.471919] PCI: Bridge: 0000:00:07.0
[    0.479285]   IO window: 3000-3fff
[    0.486133]   MEM window: 0xfc000000-0xfc4fffff
[    0.495233]   PREFETCH window: disabled.
[    0.503122] PCI: Bridge: 0000:00:14.4
[    0.510485]   IO window: disabled.
[    0.517322]   MEM window: disabled.
[    0.524338]   PREFETCH window: disabled.

Closed BIOS:
[    0.412025] PCI: Bridge: 0000:00:01.0
[    0.416027]   IO window: c000-cfff
[    0.420032]   MEM window: 0xfdd00000-0xfdefffff
[    0.427975]   PREFETCH window: 0x00000000d0000000- 0x00000000dfffffff
[    0.440718] PCI: Bridge: 0000:00:04.0
[    0.448082]   IO window: e000-efff
[    0.454929]   MEM window: 0xfda00000-0xfdafffff
[    0.464029]   PREFETCH window: 0x00000000fd900000 - 0x00000000fd9fffff
[    0.471919] PCI: Bridge: 0000:00:07.0
[    0.479285]   IO window: d000-dfff
[    0.486133]   MEM window: 0xfd000000-0xfd7fffff
[    0.495233]   PREFETCH window: 0x00000000fdf00000-0x00000000fdffffff
[    0.503122] PCI: Bridge: 0000:00:14.4
[    0.510485]   IO window: b000-bffff
[    0.517322]   MEM window: 0xfdc00000-0xfdcfffff
[    0.524338]   PREFETCH window: 0x00000000fdb00000-0x00000000fdbfffff

There are some pretty big differences. If we can explain them away great! if not, it would seem we have an allocation problem somewhere.

Thanks,
Dan Lykowski

________________________________
From: Stefan Reinauer 
To: Dan Lykowski 
Cc: [e-mail]
Sent: Sunday, February 1, 2009 4:52:26 PM
Subject: Re: [coreboot] Bridge Mem Window/Prefetch Window

Dan Lykowski wrote:
> Can anyone point me in the right direction as to where the Bridge Mem
> Window/Prefetch Window PCI configurations are defined/setup/used/etc.
> Coreboot does not set these correctly in my case. ( As compared to the
> standard BIOS )

What's the difference?

Stefan

[Myles Watson]

On Mon, Feb 2, 2009 at 9:01 AM, Dan Lykowski  wrote:
> CoreBoot Kernel Log:
> [    0.412025] PCI: Bridge: 0000:00:01.0
> [    0.416027]   IO window: 1000-1fff
> [    0.420032]   MEM window: 0xfc500000-0xfc6fffff
> [    0.427975]   PREFETCH window: 0x00000000f0000000- 0x00000000f7ffffff
> [    0.440718] PCI: Bridge: 0000:00:04.0
> [    0.448082]   IO window: 2000-2fff
> [    0.454929]   MEM window: 0xfc700000-0xfc7fffff
> [    0.464029]   PREFETCH window: disabled.
> [    0.471919] PCI: Bridge: 0000:00:07.0
> [    0.479285]   IO window: 3000-3fff
> [    0.486133]   MEM window: 0xfc000000-0xfc4fffff
> [    0.495233]   PREFETCH window: disabled.
> [    0.503122] PCI: Bridge: 0000:00:14.4
> [    0.510485]   IO window: disabled.
> [    0.517322]   MEM window: disabled.
> [    0.524338]   PREFETCH window: disabled.
>
> Closed BIOS:
> [    0.412025] PCI: Bridge: 0000:00:01.0
> [    0.416027]   IO window: c000-cfff
> [    0.420032]   MEM window: 0xfdd00000-0xfdefffff
> [    0.427975]   PREFETCH window: 0x00000000d0000000- 0x00000000dfffffff
> [    0.440718] PCI: Bridge: 0000:00:04.0
> [    0.448082]   IO window: e000-efff
> [    0.454929]   MEM window: 0xfda00000-0xfdafffff
> [    0.464029]   PREFETCH window: 0x00000000fd900000 - 0x00000000fd9fffff
> [    0.471919] PCI: Bridge: 0000:00:07.0
> [    0.479285]   IO window: d000-dfff
> [    0.486133]   MEM window: 0xfd000000-0xfd7fffff
> [    0.495233]   PREFETCH window: 0x00000000fdf00000-0x00000000fdffffff
> [    0.503122] PCI: Bridge: 0000:00:14.4
> [    0.510485]   IO window: b000-bffff
> [    0.517322]   MEM window: 0xfdc00000-0xfdcfffff
> [    0.524338]   PREFETCH window: 0x00000000fdb00000-0x00000000fdbfffff

I think lspci -tv would help us know what's going on here.

What devices are behind the bridges that don't have prefetchable
memory allocated to them?  Is it space reserved for hot-plug?

Thanks,
Myles