Hi, all,
In PCI, the IDSEL pin defines the device number. But in PCIe, there is no such pin, how is the device number defined?
Best Regards
丰立波 Feng Libo @ AMD Ext: 20906 Mobile Phone: 13683249071 Office Phone: 0086-010-62801406
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In PCI, the IDSEL pin defines the device number. But in PCIe, there is no such pin, how is the device number defined?
Imho for each slot there is PCI-PCI bridge.
00:02.0 PCI bridge: VIA Technologies, Inc. K8T890 PCI to PCI Bridge Controller 00:03.0 PCI bridge: VIA Technologies, Inc. K8T890 PCI to PCI Bridge Controller 00:03.1 PCI bridge: VIA Technologies, Inc. K8T890 PCI to PCI Bridge Controller 00:03.2 PCI bridge: VIA Technologies, Inc. K8T890 PCI to PCI Bridge Controller 00:03.3 PCI bridge: VIA Technologies, Inc. K8T890 PCI to PCI Bridge Controller
You can turn on/off in the bridge if the bridge decodes just one address - otherwise you will see it as all devices possible behind the bridge. xx:00-xx:31
Thats all I know. :) Maybe you can take a look to PCIe express specs.
Rudolf
On 1/6/08, Feng, Libo Libo.Feng@amd.com wrote:
In PCI, the IDSEL pin defines the device number. But in PCIe, there is no such pin, how is the device number defined?
"Each PCI Express Link is equivalent to a logical PCI bus. In other words, each Link is assigned a bus number by the bus enumerating software. A PCI Express endpoint is device 0 on a PCI Express Link of a given bus number. Only one device (device 0) exists per PCI Express Link."
-- PCI Express System Architecture, p. 51
--Ed