[commit] r6115 - in trunk/src/mainboard: advantech/pcm-5820 amd/db800 amd/mahogany_fam10 amd/norwich amd/rumba amd/serengeti_cheetah_fam10 amd/tilapia_fam10 artecgroup/dbe61 asi/mb_5blgp asi/mb_5bl...
Author: uwe Date: Mon Nov 22 16:57:57 2010 New Revision: 6115 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6115
Log: Drop per-board ram_check() calls for now.
Every board had a slightly different invokation, very often commented out anyway. We could either decide that this is only to be used by developers during bringup (and thus added manually to romstage.c and removed before the board gets committed). This method seems to be preferred from what I have heard on IRC / mailing list in the past.
Or, we add the ram_check() somewhere globally and allow the user to enable it via menuconfig (possibly only if EXPERT is selected).
Either way, the current method of spreading the calls all over the place is not really the way to go.
Signed-off-by: Uwe Hermann uwe@hermann-uwe.de Acked-by: Uwe Hermann uwe@hermann-uwe.de
Modified: trunk/src/mainboard/advantech/pcm-5820/romstage.c trunk/src/mainboard/amd/db800/romstage.c trunk/src/mainboard/amd/mahogany_fam10/romstage.c trunk/src/mainboard/amd/norwich/romstage.c trunk/src/mainboard/amd/rumba/romstage.c trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c trunk/src/mainboard/amd/tilapia_fam10/romstage.c trunk/src/mainboard/artecgroup/dbe61/romstage.c trunk/src/mainboard/asi/mb_5blgp/romstage.c trunk/src/mainboard/asi/mb_5blmp/romstage.c trunk/src/mainboard/asus/m4a785-m/romstage.c trunk/src/mainboard/axus/tc320/romstage.c trunk/src/mainboard/bcom/winnet100/romstage.c trunk/src/mainboard/bcom/winnetp680/romstage.c trunk/src/mainboard/dell/s1850/romstage.c trunk/src/mainboard/digitallogic/adl855pc/romstage.c trunk/src/mainboard/digitallogic/msm586seg/romstage.c trunk/src/mainboard/digitallogic/msm800sev/romstage.c trunk/src/mainboard/eaglelion/5bcm/romstage.c trunk/src/mainboard/gigabyte/ma785gmt/romstage.c trunk/src/mainboard/gigabyte/ma78gm/romstage.c trunk/src/mainboard/iei/juki-511p/romstage.c trunk/src/mainboard/iei/kino-780am2-fam10/romstage.c trunk/src/mainboard/iei/nova4899r/romstage.c trunk/src/mainboard/iei/pcisa-lx-800-r10/romstage.c trunk/src/mainboard/intel/jarrell/romstage.c trunk/src/mainboard/intel/mtarvon/romstage.c trunk/src/mainboard/intel/truxton/romstage.c trunk/src/mainboard/intel/xe7501devkit/romstage.c trunk/src/mainboard/jetway/j7f24/romstage.c trunk/src/mainboard/jetway/pa78vm5/romstage.c trunk/src/mainboard/lanner/em8510/romstage.c trunk/src/mainboard/lippert/frontrunner/romstage.c trunk/src/mainboard/lippert/hurricane-lx/romstage.c trunk/src/mainboard/lippert/literunner-lx/romstage.c trunk/src/mainboard/lippert/roadrunner-lx/romstage.c trunk/src/mainboard/lippert/spacerunner-lx/romstage.c trunk/src/mainboard/pcengines/alix1c/romstage.c trunk/src/mainboard/pcengines/alix2d/romstage.c trunk/src/mainboard/rca/rm4100/romstage.c trunk/src/mainboard/supermicro/x6dai_g/romstage.c trunk/src/mainboard/supermicro/x6dhe_g/romstage.c trunk/src/mainboard/supermicro/x6dhe_g2/romstage.c trunk/src/mainboard/supermicro/x6dhr_ig/romstage.c trunk/src/mainboard/supermicro/x6dhr_ig2/romstage.c trunk/src/mainboard/technologic/ts5300/romstage.c trunk/src/mainboard/televideo/tc7020/romstage.c trunk/src/mainboard/thomson/ip1000/romstage.c trunk/src/mainboard/traverse/geos/romstage.c trunk/src/mainboard/via/epia-cn/romstage.c trunk/src/mainboard/via/epia-m/romstage.c trunk/src/mainboard/via/epia-n/romstage.c trunk/src/mainboard/via/epia/romstage.c trunk/src/mainboard/via/pc2500e/romstage.c trunk/src/mainboard/winent/pl6064/romstage.c trunk/src/mainboard/wyse/s50/romstage.c
Modified: trunk/src/mainboard/advantech/pcm-5820/romstage.c ============================================================================== --- trunk/src/mainboard/advantech/pcm-5820/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/advantech/pcm-5820/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -24,7 +24,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <console/console.h> -#include "lib/ramtest.c" #include "northbridge/amd/gx1/raminit.c" #include "cpu/x86/bist.h" #include "superio/winbond/w83977f/w83977f_early_serial.c" @@ -40,5 +39,4 @@ report_bist_failure(bist); cs5530_enable_rom(); sdram_init(); - /* ram_check(0, 640 * 1024); */ }
Modified: trunk/src/mainboard/amd/db800/romstage.c ============================================================================== --- trunk/src/mainboard/amd/db800/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/amd/db800/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -83,9 +83,6 @@
sdram_initialize(1, memctrl);
- /* Check memory. */ - /* ram_check(0x00000000, 640 * 1024); */ - /* Memory is setup. Return to cache_as_ram.inc and continue to boot. */ return; }
Modified: trunk/src/mainboard/amd/mahogany_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/amd/mahogany_fam10/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/amd/mahogany_fam10/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -217,9 +217,6 @@ dump_pci_device_range(PCI_DEV(0, 0x18, 3), 0, 0x200); */
-// ram_check(0x00200000, 0x00200000 + (640 * 1024)); -// ram_check(0x40200000, 0x40200000 + (640 * 1024)); - // die("After MCT init before CAR disabled.");
rs780_before_pci_init();
Modified: trunk/src/mainboard/amd/norwich/romstage.c ============================================================================== --- trunk/src/mainboard/amd/norwich/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/amd/norwich/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -84,9 +84,6 @@
sdram_initialize(1, memctrl);
- /* Check memory. */ - /* ram_check(0x00000000, 640 * 1024); */ - /* Memory is setup. Return to cache_as_ram.inc and continue to boot. */ return; }
Modified: trunk/src/mainboard/amd/rumba/romstage.c ============================================================================== --- trunk/src/mainboard/amd/rumba/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/amd/rumba/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -56,7 +56,4 @@ sdram_initialize(1, memctrl);
msr_init(); - - /* Check all of memory */ - //ram_check(0x00000000, 640*1024); }
Modified: trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -328,9 +328,6 @@ dump_pci_device_range(PCI_DEV(0, 0x18, 3), 0, 0x200); */
-// ram_check(0x00200000, 0x00200000 + (640 * 1024)); -// ram_check(0x40200000, 0x40200000 + (640 * 1024)); - // die("After MCT init before CAR disabled.");
post_code(0x42);
Modified: trunk/src/mainboard/amd/tilapia_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/amd/tilapia_fam10/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/amd/tilapia_fam10/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -217,10 +217,6 @@ dump_pci_device_range(PCI_DEV(0, 0x18, 3), 0, 0x200); */
-// ram_check(0x00200000, 0x00200000 + (640 * 1024)); -// ram_check(0x40200000, 0x40200000 + (640 * 1024)); - - // die("After MCT init before CAR disabled.");
rs780_before_pci_init();
Modified: trunk/src/mainboard/artecgroup/dbe61/romstage.c ============================================================================== --- trunk/src/mainboard/artecgroup/dbe61/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/artecgroup/dbe61/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -133,8 +133,4 @@ msr = rdmsr(MC_CF8F_DATA); print_debug(" \n"); #endif - - /* Check memory. */ - // ram_check(0x00000000, 640 * 1024); - // ram_check(1024 * 1024, 2 * 1024 * 1024); }
Modified: trunk/src/mainboard/asi/mb_5blgp/romstage.c ============================================================================== --- trunk/src/mainboard/asi/mb_5blgp/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/asi/mb_5blgp/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -24,7 +24,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <console/console.h> -#include "lib/ramtest.c" #include "northbridge/amd/gx1/raminit.c" #include "cpu/x86/bist.h" #include "superio/nsc/pc87351/pc87351_early_serial.c" @@ -40,5 +39,4 @@ report_bist_failure(bist); cs5530_enable_rom(); sdram_init(); - /* ram_check(0, 640 * 1024); */ }
Modified: trunk/src/mainboard/asi/mb_5blmp/romstage.c ============================================================================== --- trunk/src/mainboard/asi/mb_5blmp/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/asi/mb_5blmp/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -25,7 +25,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <console/console.h> -#include "lib/ramtest.c" #include "northbridge/amd/gx1/raminit.c" #include "superio/nsc/pc87351/pc87351_early_serial.c" #include "cpu/x86/bist.h" @@ -41,5 +40,4 @@ report_bist_failure(bist); cs5530_enable_rom(); sdram_init(); - /* ram_check(0x00000000, 0x4000); */ }
Modified: trunk/src/mainboard/asus/m4a785-m/romstage.c ============================================================================== --- trunk/src/mainboard/asus/m4a785-m/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/asus/m4a785-m/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -218,10 +218,6 @@ dump_pci_device_range(PCI_DEV(0, 0x18, 3), 0, 0x200); */
-// ram_check(0x00200000, 0x00200000 + (640 * 1024)); -// ram_check(0x40200000, 0x40200000 + (640 * 1024)); - - // die("After MCT init before CAR disabled.");
rs780_before_pci_init();
Modified: trunk/src/mainboard/axus/tc320/romstage.c ============================================================================== --- trunk/src/mainboard/axus/tc320/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/axus/tc320/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -25,7 +25,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <console/console.h> -#include "lib/ramtest.c" #include "northbridge/amd/gx1/raminit.c" #include "superio/nsc/pc97317/pc97317_early_serial.c" #include "cpu/x86/bist.h" @@ -41,5 +40,4 @@ report_bist_failure(bist); cs5530_enable_rom(); sdram_init(); - /* ram_check(0, 640 * 1024); */ }
Modified: trunk/src/mainboard/bcom/winnet100/romstage.c ============================================================================== --- trunk/src/mainboard/bcom/winnet100/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/bcom/winnet100/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -25,7 +25,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <console/console.h> -#include "lib/ramtest.c" #include "northbridge/amd/gx1/raminit.c" #include "superio/nsc/pc97317/pc97317_early_serial.c" #include "cpu/x86/bist.h" @@ -41,5 +40,4 @@ report_bist_failure(bist); cs5530_enable_rom(); sdram_init(); - /* ram_check(0, 640 * 1024); */ }
Modified: trunk/src/mainboard/bcom/winnetp680/romstage.c ============================================================================== --- trunk/src/mainboard/bcom/winnetp680/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/bcom/winnetp680/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -99,6 +99,4 @@ enable_mainboard_devices();
ddr_ram_setup(&ctrl); - - /* ram_check(0, 640 * 1024); */ }
Modified: trunk/src/mainboard/dell/s1850/romstage.c ============================================================================== --- trunk/src/mainboard/dell/s1850/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/dell/s1850/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -6,7 +6,6 @@ #include <cpu/x86/lapic.h> #include <stdlib.h> #include <console/console.h> -#include "lib/ramtest.c" #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c" #include "northbridge/intel/e7520/raminit.h" #include "superio/nsc/pc8374/pc8374_early_init.c" @@ -323,17 +322,4 @@ dump_pci_device(PCI_DEV(0, 0x00, 0)); // dump_bar14(PCI_DEV(0, 0x00, 0)); #endif - -#if 1 // temporarily disabled - /* Check the first 1M */ -// ram_check(0x00000000, 0x000100000); -// ram_check(0x00000000, 0x000a0000); -// ram_check(0x00100000, 0x01000000); - ram_check(0x00100000, 0x00100100); - /* check the first 1M in the 3rd Gig */ -// ram_check(0x30100000, 0x31000000); -#endif -#if 0 - ram_check(0x00000000, 0x02000000); -#endif }
Modified: trunk/src/mainboard/digitallogic/adl855pc/romstage.c ============================================================================== --- trunk/src/mainboard/digitallogic/adl855pc/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/digitallogic/adl855pc/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -62,12 +62,5 @@ #if 0 dump_pci_devices(); dump_pci_device(PCI_DEV(0, 0, 0)); - - // Check all of memory - ram_check(0x00000000, msr.lo+(msr.hi<<32)); - // Check 16MB of memory @ 0 - ram_check(0x00000000, 0x01000000); - // Check 16MB of memory @ 2GB - ram_check(0x80000000, 0x81000000); #endif }
Modified: trunk/src/mainboard/digitallogic/msm586seg/romstage.c ============================================================================== --- trunk/src/mainboard/digitallogic/msm586seg/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/digitallogic/msm586seg/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -6,7 +6,6 @@ #include <arch/hlt.h> #include <pc80/mc146818rtc.h> #include <console/console.h> -#include "lib/ramtest.c" #include "cpu/x86/bist.h"
void setup_pars(void) @@ -203,16 +202,6 @@ dump_pci_device(PCI_DEV(0, 0, 0)); #endif
-#if 0 - print_err("RAM CHECK!\n"); - // Check 16MB of memory @ 0 - ram_check(0x00000000, 0x01000000); -#endif -#if 0 - print_err("RAM CHECK for 32 MB!\n"); - // Check 32MB of memory @ 0 - ram_check(0x00000000, 0x02000000); -#endif #if 1 { volatile unsigned char *src = (unsigned char *) 0x2000000 + 0x60000;
Modified: trunk/src/mainboard/digitallogic/msm800sev/romstage.c ============================================================================== --- trunk/src/mainboard/digitallogic/msm800sev/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/digitallogic/msm800sev/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -66,9 +66,6 @@
sdram_initialize(1, memctrl);
- /* Check all of memory */ - ram_check(0x00000000, 640*1024); - /* Switch from Cache as RAM to real RAM */ /* There are two ways we could think about this. 1. If we are using the romstage.inc ROMCC way, the stack is going to be re-setup in the code following this code.
Modified: trunk/src/mainboard/eaglelion/5bcm/romstage.c ============================================================================== --- trunk/src/mainboard/eaglelion/5bcm/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/eaglelion/5bcm/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -6,7 +6,6 @@ #include <arch/hlt.h> #include <stdlib.h> #include <console/console.h> -#include "lib/ramtest.c" #include "superio/nsc/pc97317/pc97317_early_serial.c" #include "cpu/x86/bist.h" #include "southbridge/amd/cs5530/cs5530_enable_rom.c"
Modified: trunk/src/mainboard/gigabyte/ma785gmt/romstage.c ============================================================================== --- trunk/src/mainboard/gigabyte/ma785gmt/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/gigabyte/ma785gmt/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -214,10 +214,6 @@ dump_pci_device_range(PCI_DEV(0, 0x18, 3), 0, 0x200); */
-// ram_check(0x00200000, 0x00200000 + (640 * 1024)); -// ram_check(0x40200000, 0x40200000 + (640 * 1024)); - - // die("After MCT init before CAR disabled.");
rs780_before_pci_init();
Modified: trunk/src/mainboard/gigabyte/ma78gm/romstage.c ============================================================================== --- trunk/src/mainboard/gigabyte/ma78gm/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/gigabyte/ma78gm/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -216,9 +216,6 @@ dump_pci_device_range(PCI_DEV(0, 0x18, 3), 0, 0x200); */
-// ram_check(0x00200000, 0x00200000 + (640 * 1024)); -// ram_check(0x40200000, 0x40200000 + (640 * 1024)); - // die("After MCT init before CAR disabled.");
rs780_before_pci_init();
Modified: trunk/src/mainboard/iei/juki-511p/romstage.c ============================================================================== --- trunk/src/mainboard/iei/juki-511p/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/iei/juki-511p/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -25,7 +25,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <console/console.h> -#include "lib/ramtest.c" #include "superio/winbond/w83977f/w83977f_early_serial.c" #include "southbridge/amd/cs5530/cs5530_enable_rom.c" #include "cpu/x86/bist.h" @@ -47,5 +46,4 @@
cs5530_enable_rom(); sdram_init(); - /* ram_check(0x00000000, 640 * 1024); */ }
Modified: trunk/src/mainboard/iei/kino-780am2-fam10/romstage.c ============================================================================== --- trunk/src/mainboard/iei/kino-780am2-fam10/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/iei/kino-780am2-fam10/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -219,9 +219,6 @@ dump_pci_device_range(PCI_DEV(0, 0x18, 3), 0, 0x200); */
-// ram_check(0x00200000, 0x00200000 + (640 * 1024)); -// ram_check(0x40200000, 0x40200000 + (640 * 1024)); - // die("After MCT init before CAR disabled.");
rs780_before_pci_init();
Modified: trunk/src/mainboard/iei/nova4899r/romstage.c ============================================================================== --- trunk/src/mainboard/iei/nova4899r/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/iei/nova4899r/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -25,7 +25,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <console/console.h> -#include "lib/ramtest.c" #include "superio/winbond/w83977tf/w83977tf_early_serial.c" #include "southbridge/amd/cs5530/cs5530_enable_rom.c" #include "cpu/x86/bist.h" @@ -42,5 +41,4 @@ report_bist_failure(bist); cs5530_enable_rom(); sdram_init(); - /* ram_check(0x00000000, 640 * 1024); */ }
Modified: trunk/src/mainboard/iei/pcisa-lx-800-r10/romstage.c ============================================================================== --- trunk/src/mainboard/iei/pcisa-lx-800-r10/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/iei/pcisa-lx-800-r10/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -87,8 +87,6 @@
sdram_initialize(1, memctrl);
- /* ram_check(0, 640 * 1024); */ - /* Memory is setup. Return to cache_as_ram.inc and continue to boot. */ return; }
Modified: trunk/src/mainboard/intel/jarrell/romstage.c ============================================================================== --- trunk/src/mainboard/intel/jarrell/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/intel/jarrell/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -6,7 +6,6 @@ #include <cpu/x86/lapic.h> #include <stdlib.h> #include <console/console.h> -#include "lib/ramtest.c" #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c" #include "northbridge/intel/e7520/raminit.h" #include "superio/nsc/pc87427/pc87427.h" @@ -105,17 +104,4 @@ dump_pci_device(PCI_DEV(0, 0x00, 0)); dump_bar14(PCI_DEV(0, 0x00, 0)); #endif - -#if 0 // temporarily disabled - /* Check the first 1M */ -// ram_check(0x00000000, 0x000100000); -// ram_check(0x00000000, 0x000a0000); - ram_check(0x00100000, 0x01000000); - /* check the first 1M in the 3rd Gig */ - ram_check(0x30100000, 0x31000000); -#if 0 - ram_check(0x00000000, 0x02000000); -#endif - -#endif }
Modified: trunk/src/mainboard/intel/mtarvon/romstage.c ============================================================================== --- trunk/src/mainboard/intel/mtarvon/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/intel/mtarvon/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -118,6 +118,4 @@ /* dump_pci_devices(); */ /* dump_pci_device(PCI_DEV(0, 0x00, 0)); */ /* dump_bar14(PCI_DEV(0, 0x00, 0)); */ - - ram_check(0, 1024 * 1024); }
Modified: trunk/src/mainboard/intel/truxton/romstage.c ============================================================================== --- trunk/src/mainboard/intel/truxton/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/intel/truxton/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -28,7 +28,6 @@ #include <pc80/mc146818rtc.h> #include "pc80/udelay_io.c" #include <console/console.h> -#include "lib/ramtest.c" #include "southbridge/intel/i3100/i3100_early_smbus.c" #include "southbridge/intel/i3100/i3100_early_lpc.c" #include "northbridge/intel/i3100/raminit_ep80579.h" @@ -98,9 +97,4 @@ #ifdef TRUXTON_DEBUG dump_bar14(PCI_DEV(0, 0x00, 0)); #endif - -#ifdef TRUXTON_DEBUG - ram_fill(0x00000000, 0x02000000); - ram_verify(0x00000000, 0x02000000); -#endif }
Modified: trunk/src/mainboard/intel/xe7501devkit/romstage.c ============================================================================== --- trunk/src/mainboard/intel/xe7501devkit/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/intel/xe7501devkit/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -8,7 +8,6 @@ #include <stdlib.h> #include <pc80/mc146818rtc.h> #include <console/console.h> -#include "lib/ramtest.c" #include "southbridge/intel/i82801cx/i82801cx_early_smbus.c" #include "northbridge/intel/e7501/raminit.h" #include "cpu/x86/lapic/boot_cpu.c"
Modified: trunk/src/mainboard/jetway/j7f24/romstage.c ============================================================================== --- trunk/src/mainboard/jetway/j7f24/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/jetway/j7f24/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -104,6 +104,4 @@ enable_mainboard_devices();
ddr_ram_setup(&ctrl); - - /* ram_check(0, 640 * 1024); */ }
Modified: trunk/src/mainboard/jetway/pa78vm5/romstage.c ============================================================================== --- trunk/src/mainboard/jetway/pa78vm5/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/jetway/pa78vm5/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -224,9 +224,6 @@ dump_pci_device_range(PCI_DEV(0, 0x18, 3), 0, 0x200); */
-// ram_check(0x00200000, 0x00200000 + (640 * 1024)); -// ram_check(0x40200000, 0x40200000 + (640 * 1024)); - // die("After MCT init before CAR disabled.");
rs780_before_pci_init();
Modified: trunk/src/mainboard/lanner/em8510/romstage.c ============================================================================== --- trunk/src/mainboard/lanner/em8510/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/lanner/em8510/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -80,16 +80,4 @@ sdram_set_spd_registers(); sdram_enable(); } - -#if 0 - dump_pci_devices(); - dump_pci_device(PCI_DEV(0, 0, 0)); - - // Check all of memory - ram_check(0x00000000, msr.lo+(msr.hi<<32)); - // Check 16MB of memory @ 0 - ram_check(0x00000000, 0x01000000); - // Check 16MB of memory @ 2GB - ram_check(0x80000000, 0x81000000); -#endif }
Modified: trunk/src/mainboard/lippert/frontrunner/romstage.c ============================================================================== --- trunk/src/mainboard/lippert/frontrunner/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/lippert/frontrunner/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -127,8 +127,4 @@ outb( temp, 0x4F); temp = inb(0x4F); //watchdog function. Make sure to let the other Bits unchanged! print_debug_hex8(temp);print_debug("\n"); - /* Check all of memory */ -// ram_check(0, 16384); - ram_check(0x20000, 0x24000); -// ram_check(0x00000000, 640*1024); }
Modified: trunk/src/mainboard/lippert/hurricane-lx/romstage.c ============================================================================== --- trunk/src/mainboard/lippert/hurricane-lx/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/lippert/hurricane-lx/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -157,9 +157,6 @@
sdram_initialize(1, memctrl);
- /* Check memory. */ - /* ram_check(0, 640 * 1024); */ - /* Memory is setup. Return to cache_as_ram.inc and continue to boot. */ return; }
Modified: trunk/src/mainboard/lippert/literunner-lx/romstage.c ============================================================================== --- trunk/src/mainboard/lippert/literunner-lx/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/lippert/literunner-lx/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -197,9 +197,6 @@
sdram_initialize(1, memctrl);
- /* Check memory. */ - /* ram_check(0, 640 * 1024); */ - /* Memory is setup. Return to cache_as_ram.inc and continue to boot. */ return; }
Modified: trunk/src/mainboard/lippert/roadrunner-lx/romstage.c ============================================================================== --- trunk/src/mainboard/lippert/roadrunner-lx/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/lippert/roadrunner-lx/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -122,9 +122,6 @@
sdram_initialize(1, memctrl);
- /* Check memory. */ - /* ram_check(0x00000000, 640 * 1024); */ - /* Memory is setup. Return to cache_as_ram.inc and continue to boot. */ return; }
Modified: trunk/src/mainboard/lippert/spacerunner-lx/romstage.c ============================================================================== --- trunk/src/mainboard/lippert/spacerunner-lx/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/lippert/spacerunner-lx/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -194,9 +194,6 @@
sdram_initialize(1, memctrl);
- /* Check memory. */ - /* ram_check(0, 640 * 1024); */ - /* Memory is setup. Return to cache_as_ram.inc and continue to boot. */ return; }
Modified: trunk/src/mainboard/pcengines/alix1c/romstage.c ============================================================================== --- trunk/src/mainboard/pcengines/alix1c/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/pcengines/alix1c/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -142,10 +142,6 @@
sdram_initialize(1, memctrl);
- /* Check memory */ - /* Enable this only if you are having questions. */ - /* ram_check(0, 640 * 1024); */ - /* Switch from Cache as RAM to real RAM. * * There are two ways we could think about this.
Modified: trunk/src/mainboard/pcengines/alix2d/romstage.c ============================================================================== --- trunk/src/mainboard/pcengines/alix2d/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/pcengines/alix2d/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -166,10 +166,6 @@
sdram_initialize(1, memctrl);
- /* Check memory */ - /* Enable this only if you are having questions. */ - /* ram_check(0, 640 * 1024); */ - /* Switch from Cache as RAM to real RAM. * * There are two ways we could think about this.
Modified: trunk/src/mainboard/rca/rm4100/romstage.c ============================================================================== --- trunk/src/mainboard/rca/rm4100/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/rca/rm4100/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -121,8 +121,4 @@
/* Initialize memory */ sdram_initialize(); - - /* Check RAM. */ - /* ram_check(0, 640 * 1024); */ - /* ram_check(64512 * 1024, 65536 * 1024); */ }
Modified: trunk/src/mainboard/supermicro/x6dai_g/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/x6dai_g/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/supermicro/x6dai_g/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -6,7 +6,6 @@ #include <cpu/x86/lapic.h> #include <stdlib.h> #include <console/console.h> -#include "lib/ramtest.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "southbridge/intel/esb6300/esb6300_early_smbus.c" @@ -99,16 +98,4 @@ dump_pci_device(PCI_DEV(0, 0x00, 0)); // dump_bar14(PCI_DEV(0, 0x00, 0)); #endif - -#if 0 // temporarily disabled - /* Check the first 1M */ -// ram_check(0x00000000, 0x000100000); -// ram_check(0x00000000, 0x000a0000); - ram_check(0x00100000, 0x01000000); - /* check the first 1M in the 3rd Gig */ - ram_check(0x30100000, 0x31000000); -#endif -#if 0 - ram_check(0x00000000, 0x02000000); -#endif }
Modified: trunk/src/mainboard/supermicro/x6dhe_g/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/x6dhe_g/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/supermicro/x6dhe_g/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -6,7 +6,6 @@ #include <cpu/x86/lapic.h> #include <stdlib.h> #include <console/console.h> -#include "lib/ramtest.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "southbridge/intel/esb6300/esb6300_early_smbus.c" @@ -103,16 +102,4 @@ dump_pci_device(PCI_DEV(0, 0x00, 0)); dump_bar14(PCI_DEV(0, 0x00, 0)); #endif - -#if 0 // temporarily disabled - /* Check the first 1M */ -// ram_check(0x00000000, 0x000100000); -// ram_check(0x00000000, 0x000a0000); - ram_check(0x00100000, 0x01000000); - /* check the first 1M in the 3rd Gig */ - ram_check(0x30100000, 0x31000000); -#endif -#if 0 - ram_check(0x00000000, 0x02000000); -#endif }
Modified: trunk/src/mainboard/supermicro/x6dhe_g2/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/x6dhe_g2/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/supermicro/x6dhe_g2/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -6,7 +6,6 @@ #include <cpu/x86/lapic.h> #include <stdlib.h> #include <console/console.h> -#include "lib/ramtest.c" #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c" #include "northbridge/intel/e7520/raminit.h" #include "superio/nsc/pc87427/pc87427.h" @@ -103,16 +102,4 @@ dump_pci_device(PCI_DEV(0, 0x00, 0)); //dump_bar14(PCI_DEV(0, 0x00, 0)); #endif - -#if 0 // temporarily disabled - /* Check the first 1M */ -// ram_check(0x00000000, 0x000100000); -// ram_check(0x00000000, 0x000a0000); - ram_check(0x00100000, 0x01000000); - /* check the first 1M in the 3rd Gig */ - ram_check(0x30100000, 0x31000000); -#endif -#if 0 - ram_check(0x00000000, 0x02000000); -#endif }
Modified: trunk/src/mainboard/supermicro/x6dhr_ig/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/x6dhr_ig/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/supermicro/x6dhr_ig/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -6,7 +6,6 @@ #include <cpu/x86/lapic.h> #include <stdlib.h> #include <console/console.h> -#include "lib/ramtest.c" #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c" #include "northbridge/intel/e7520/raminit.h" #include "superio/winbond/w83627hf/w83627hf.h" @@ -48,12 +47,6 @@ static const struct mem_controller mch[] = { { .node_id = 0, - /* - .f0 = PCI_DEV(0, 0x00, 0), - .f1 = PCI_DEV(0, 0x00, 1), - .f2 = PCI_DEV(0, 0x00, 2), - .f3 = PCI_DEV(0, 0x00, 3), - */ .channel0 = {DIMM3, DIMM2, DIMM1, DIMM0, }, .channel1 = {DIMM7, DIMM6, DIMM5, DIMM4, }, } @@ -110,17 +103,4 @@ dump_pci_device(PCI_DEV(0, 0x00, 0)); dump_bar14(PCI_DEV(0, 0x00, 0)); #endif - -#if 0 // temporarily disabled - /* Check the first 1M */ -// ram_check(0x00000000, 0x000100000); -// ram_check(0x00000000, 0x000a0000); -// ram_check(0x00100000, 0x01000000); - ram_check(0x00100000, 0x00100100); - /* check the first 1M in the 3rd Gig */ -// ram_check(0x30100000, 0x31000000); -#endif -#if 0 - ram_check(0x00000000, 0x02000000); -#endif }
Modified: trunk/src/mainboard/supermicro/x6dhr_ig2/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/x6dhr_ig2/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/supermicro/x6dhr_ig2/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -6,7 +6,6 @@ #include <cpu/x86/lapic.h> #include <stdlib.h> #include <console/console.h> -#include "lib/ramtest.c" #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c" #include "northbridge/intel/e7520/raminit.h" #include "superio/winbond/w83627hf/w83627hf.h" @@ -102,17 +101,4 @@ dump_pci_device(PCI_DEV(0, 0x00, 0)); dump_bar14(PCI_DEV(0, 0x00, 0)); #endif - -#if 0 // temporarily disabled - /* Check the first 1M */ -// ram_check(0x00000000, 0x000100000); -// ram_check(0x00000000, 0x000a0000); -// ram_check(0x00100000, 0x01000000); - ram_check(0x00100000, 0x00100100); - /* check the first 1M in the 3rd Gig */ -// ram_check(0x30100000, 0x31000000); -#endif -#if 0 - ram_check(0x00000000, 0x02000000); -#endif }
Modified: trunk/src/mainboard/technologic/ts5300/romstage.c ============================================================================== --- trunk/src/mainboard/technologic/ts5300/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/technologic/ts5300/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -12,7 +12,6 @@ #include <arch/hlt.h> #include <pc80/mc146818rtc.h> #include <console/console.h> -#include "lib/ramtest.c" #include "cpu/x86/bist.h"
#define TS5300_LED_OFF outb((inb(0x77)&0xfe), 0x77) @@ -162,12 +161,5 @@ identify_system(); #endif
-#if 0 - // Check 32MB of memory @ 0 (very slow!) - print_err("Checking memory:\n"); - ram_check(0x00000000, 0x000a0000); - ram_check(0x000b0000, 0x02000000); -#endif - TS5300_LED_OFF; }
Modified: trunk/src/mainboard/televideo/tc7020/romstage.c ============================================================================== --- trunk/src/mainboard/televideo/tc7020/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/televideo/tc7020/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -25,7 +25,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <console/console.h> -#include "lib/ramtest.c" #include "northbridge/amd/gx1/raminit.c" #include "superio/nsc/pc97317/pc97317_early_serial.c" #include "cpu/x86/bist.h" @@ -41,5 +40,4 @@ report_bist_failure(bist); cs5530_enable_rom(); sdram_init(); - /* ram_check(0, 640 * 1024); */ }
Modified: trunk/src/mainboard/thomson/ip1000/romstage.c ============================================================================== --- trunk/src/mainboard/thomson/ip1000/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/thomson/ip1000/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -124,7 +124,4 @@ #if CONFIG_LLSHELL llshell(); #endif - /* Check RAM. */ - /* ram_check(0, 640 * 1024); */ - /* ram_check(64512 * 1024, 65536 * 1024); */ }
Modified: trunk/src/mainboard/traverse/geos/romstage.c ============================================================================== --- trunk/src/mainboard/traverse/geos/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/traverse/geos/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -85,9 +85,6 @@
sdram_initialize(1, memctrl);
- /* Check memory. */ - /* ram_check(0x00000000, 640 * 1024); */ - /* Memory is setup. Return to cache_as_ram.inc and continue to boot. */ return; }
Modified: trunk/src/mainboard/via/epia-cn/romstage.c ============================================================================== --- trunk/src/mainboard/via/epia-cn/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/via/epia-cn/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -93,5 +93,4 @@ report_bist_failure(bist); enable_mainboard_devices(); ddr_ram_setup(&ctrl); - /* ram_check(0, 640 * 1024); */ }
Modified: trunk/src/mainboard/via/epia-m/romstage.c ============================================================================== --- trunk/src/mainboard/via/epia-m/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/via/epia-m/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -7,7 +7,6 @@ #include <arch/hlt.h> #include <stdlib.h> #include <console/console.h> -#include "lib/ramtest.c" #include "northbridge/via/vt8623/raminit.h" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" @@ -105,20 +104,6 @@
ddr_ram_setup((const struct mem_controller *)0);
- /* Check all of memory */ -#if 0 - static const struct { - unsigned long lo, hi; - } check_addrs[] = { - /* Check 16MB of memory @ 0*/ - { 0x00000000, 0x01000000 }, - }; - int i; - for(i = 0; i < ARRAY_SIZE(check_addrs); i++) { - ram_check(check_addrs[i].lo, check_addrs[i].hi); - } -#endif - if (bist == 0) early_mtrr_init();
Modified: trunk/src/mainboard/via/epia-n/romstage.c ============================================================================== --- trunk/src/mainboard/via/epia-n/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/via/epia-n/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -27,7 +27,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <console/console.h> -#include "lib/ramtest.c" #include "northbridge/via/cn400/raminit.h" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" @@ -134,6 +133,4 @@
if (bist == 0) early_mtrr_init(); - - //ram_check(0, 640 * 1024); }
Modified: trunk/src/mainboard/via/epia/romstage.c ============================================================================== --- trunk/src/mainboard/via/epia/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/via/epia/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -6,7 +6,6 @@ #include <arch/hlt.h> #include <stdlib.h> #include <console/console.h> -#include "lib/ramtest.c" #include "northbridge/via/vt8601/raminit.h" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" @@ -95,25 +94,4 @@ sdram_set_registers((const struct mem_controller *) 0); sdram_set_spd_registers((const struct mem_controller *) 0); sdram_enable(0, (const struct mem_controller *) 0); - - /* Check all of memory */ -#if 0 - ram_check(0x00000000, msr.lo); -#endif -#if 0 - static const struct { - unsigned long lo, hi; - } check_addrs[] = { - /* Check 16MB of memory @ 0*/ - { 0x00000000, 0x01000000 }, -#if TOTAL_CPUS > 1 - /* Check 16MB of memory @ 2GB */ - { 0x80000000, 0x81000000 }, -#endif - }; - int i; - for(i = 0; i < ARRAY_SIZE(check_addrs); i++) { - ram_check(check_addrs[i].lo, check_addrs[i].hi); - } -#endif }
Modified: trunk/src/mainboard/via/pc2500e/romstage.c ============================================================================== --- trunk/src/mainboard/via/pc2500e/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/via/pc2500e/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -67,5 +67,4 @@ smbus_fixup(&ctrl); report_bist_failure(bist); ddr_ram_setup(&ctrl); - /* ram_check(0, 640 * 1024); */ }
Modified: trunk/src/mainboard/winent/pl6064/romstage.c ============================================================================== --- trunk/src/mainboard/winent/pl6064/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/winent/pl6064/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -86,9 +86,6 @@
sdram_initialize(1, memctrl);
- /* Check memory. */ - /* ram_check(0x00000000, 640 * 1024); */ - /* Memory is setup. Return to cache_as_ram.inc and continue to boot. */ return; }
Modified: trunk/src/mainboard/wyse/s50/romstage.c ============================================================================== --- trunk/src/mainboard/wyse/s50/romstage.c Mon Nov 22 15:14:56 2010 (r6114) +++ trunk/src/mainboard/wyse/s50/romstage.c Mon Nov 22 16:57:57 2010 (r6115) @@ -78,7 +78,4 @@ print_err("ram setup done\n");
msr_init(); - - /* Check all of memory */ - /*ram_check(0x00000000, 640*1024);*/ }
-
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