Luis,
On Monday 14 May 2007 10:07, Luis Correia wrote:
Maybe we are able to detect the SPD EEPROM on *some* boards. But never on all boards. There are too many individual incarnations how you can connect the I2C lines to your CPU (thanks to popconserve for the reference schematics!). Mainboard's physical behaviour (I believe) you never can autodetect. So we might need a filestructure you can try to autodetect things, or to hardcode most or all of the required settings. And then call ram_init with this data. Any idea? The faked-SPD alone does not help.
Just to add up some extra info, on my NOVA4899 board there is an hardware monitor chip that has I2C connections to some pins on the SO-DIMM socket.
I've failed to figure out where these lines are connected. The reference schematics show the I2C bus being connected to the superIO. But on my board they are not connected to either the CS5530 or the SuperIO chips. I'm lost here...
My only hope is to reverse engineer the factory BIOS, which is not a task for the fain of heart :)
Boot your mainboard with your factory BIOS and dump the so called BC_* registers and you are fine (a few registers at offset GX_BASE + 0x8400 up to GX_BASE + 0x840f. GX_BASE is on most system at 0x40000000). If you do not change your SDRAM, you can work with these values. Its much easier than to reverse engineer the BIOS code...
Juergen
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Juergen Beisert