Hi,
In addition to lowering the number of resets it would also be possible to use an LDTSTOP (as I implemented it in older versions of the CVS) at least when doing the hypertransport link changes. I know that this does not work with some preproduction CPUs, but I don't think that would really matter. BUT: Could we get rid of all CPU resets when doing an LDTSTOP assertion (It's a lot quicker than a hard reset) or would we still need to reset the CPU for some other reasons?
Stefan
Stefan Reinauer stepan@suse.de writes:
Hi,
In addition to lowering the number of resets it would also be possible to use an LDTSTOP (as I implemented it in older versions of the CVS) at least when doing the hypertransport link changes. I know that this does not work with some preproduction CPUs, but I don't think that would really matter. BUT: Could we get rid of all CPU resets when doing an LDTSTOP assertion (It's a lot quicker than a hard reset) or would we still need to reset the CPU for some other reasons?
When I was working with it I remember seeing some additional remaining errata with regards to LDTSTOP. So I decided not to mess with it. There does seem to be a big delay in the phase that finds the rom chip though.
Eric