Re: [coreboot] coreboot on ASRock H81M-HDS cannot load a payload

[Tristan Corrick]

Hi Iru,

It looks like the PCI ID of the Xeon E3 DRAM controller is missing. Try
adding `0c08` to `mc_pci_device_ids` in src/northbridge/intel/haswell/
northbridge.c and see if that works.

Kind regards,
Tristan

On Mon, Dec 17, 2018 at 12:14:29PM +0800, Iru Cai wrote:
> Hi,
>
> I'm trying to run coreboot on ASRock H81M-HDS with a Xeon E3 and 8G*2 RAM.
> I chose to use my GRUB payload, but coreboot cannot load it with the
> following error (full log in attachment):
>
> CBFS: 'Master Header Locator' located CBFS at [1a0000:400000)
> CBFS: Locating 'fallback/payload'
> CBFS: Found @ offset 2fb80 size 1929bd
> Checking segment from ROM address 0xffdcfbb8
> Payload being loaded at below 1MiB without region being marked as RAM
> usable.
> Checking segment from ROM address 0xffdcfbd4
> SELF segment doesn't target RAM: 0x00100000, 5203948 bytes
>  0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
> 000000007f751000-000000007f78efff: CONFIGURATION TABLES
> 000000007f78f000-000000007f7ccfff: RAMSTAGE
> 000000007f7cd000-000000007f7fffff: CONFIGURATION TABLES
>
> Payload not loaded.
>
> If I use SeaBIOS as payload, SeaBIOS can run, but it can't allocate
> resources for SATA, EHCI and XHCI and can't find any boot devices.
>
> What is the problem in it?
>
> Iru
>
> Please do not send me Microsoft Office/Apple iWork documents. Send
> OpenDocument instead! http://fsf.org/campaigns/opendocument/
> coreboot-4.8-2526-gad8478f643-dirty Sun Dec 16 16:50:38 UTC 2018 romstage starting...
> Disabling Watchdog reboot... done.
> SMBus controller enabled.
> Setting up static northbridge registers... done.
> Initializing Graphics...
> Back from haswell_early_initialization()
> CPU id(306c3) ucode:00000024 Intel(R) Xeon(R) CPU E3-1271 v3 @ 3.60GHz
> AES supported, TXT supported, VT supported
> PCH type: H81, device id: 8c5c, rev id 5
> Starting UEFI PEI System Agent
> FMAP: Found "FLASH" version 1.1 at 180000.
> FMAP: base = ffc00000 size = 400000 #areas = 4
> FMAP: area RW_MRC_CACHE found @ 190000 (65536 bytes)
> MRC: no data in 'RW_MRC_CACHE'
> FMAP: area COREBOOT found @ 1a0000 (2490368 bytes)
> CBFS: Locating 'mrc.bin'
> CBFS: Found @ offset 1fffc0 size 2e6e4
> System Agent: Starting up...
> System Agent: Initializing PCH
> install_ppi: overwrite GUID {ed097352-9041-445a-80b6-b29d509e8845}
> install_ppi: overwrite GUID {908c7f8b-5c48-47fb-8357-f5fd4e235276}
> System Agent: Initializing PCH (SMBUS)
> System Agent: Initializing PCH (USB)
> System Agent: Initializing PCH (SA Init)
> System Agent: Initializing PCH (Me UMA)
> System Agent: Initializing Memory
> System Agent: Done.
> Sanity checking heap.
> System Agent Version 1.6.1 Build 2
> memcfg DDR3 clock 1600 MHz
> memcfg channel assignment: A: 0, B  1, C  2
> memcfg channel[0] config (00620020):
>    ECC inactive
>    enhanced interleave mode on
>    rank interleave on
>    DIMMA 8192 MB width x8 or x32 dual rank, selected
>    DIMMB 0 MB width x8 or x32 single rank
> memcfg channel[1] config (00620020):
>    ECC inactive
>    enhanced interleave mode on
>    rank interleave on
>    DIMMA 8192 MB width x8 or x32 dual rank, selected
>    DIMMB 0 MB width x8 or x32 single rank
> ME: FW Partition Table      : OK
> ME: Bringup Loader Failure  : NO
> ME: Firmware Init Complete  : NO
> ME: Manufacturing Mode      : NO
> ME: Boot Options Present    : NO
> ME: Update In Progress      : NO
> ME: Current Working State   : Normal
> ME: Current Operation State : M0 with UMA
> ME: Current Operation Mode  : Normal
> ME: Error Code              : No Error
> ME: Progress Phase          : uKernel Phase
> ME: Power Management Event  : Clean Moff->Mx wake
> ME: Progress Phase State    : Unknown phase: 0x02 sate: 0x00
> CBMEM:
> IMD: root @ 7f7ff000 254 entries.
> IMD: root @ 7f7fec00 62 entries.
> External stage cache:
> IMD: root @ 7fbff000 254 entries.
> IMD: root @ 7fbfec00 62 entries.
> MTRR Range: Start=ffc00000 End=0 (Size 400000)
> MTRR Range: Start=0 End=1000000 (Size 1000000)
> MTRR Range: Start=7f000000 End=80000000 (Size 1000000)
> CBFS: 'Master Header Locator' located CBFS at [1a0000:400000)
> CBFS: Locating 'fallback/postcar'
> CBFS: Found @ offset 28900 size 4364
> Decompressing stage fallback/postcar @ 0x7f7cdfc0 (33808 bytes)
> Loading module at 7f7ce000 with entry 7f7ce000. filesize: 0x4110 memsize: 0x83d0
> Processing 126 relocs. Offset value of 0x7d7ce000
>
> coreboot-4.8-2526-gad8478f643-dirty Sun Dec 16 16:50:38 UTC 2018 postcar starting...
> CBFS: 'Master Header Locator' located CBFS at [1a0000:400000)
> CBFS: Locating 'fallback/ramstage'
> CBFS: Found @ offset 14100 size 13e4a
> Decompressing stage fallback/ramstage @ 0x7f78efc0 (252344 bytes)
> Loading module at 7f78f000 with entry 7f78f000. filesize: 0x29d70 memsize: 0x3d978
> Processing 2823 relocs. Offset value of 0x7e98f000
>
> coreboot-4.8-2526-gad8478f643-dirty Sun Dec 16 16:50:38 UTC 2018 ramstage starting...
> Normal boot.
> BS: BS_PRE_DEVICE times (us): entry 0 run 0 exit 0
> BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 1 exit 0
> Enumerating buses...
> CPU_CLUSTER: 0 enabled
> DOMAIN: 0000 enabled
> PCI: pci_scan_bus for bus 00
> PCI: 00:00.0 [8086/0c08] enabled
> PCI: Static device PCI: 00:01.0 not found, disabling it.
> PCI: Static device PCI: 00:02.0 not found, disabling it.
> PCI: Static device PCI: 00:03.0 not found, disabling it.
> PCI: 00:14.0 [8086/8c31] enabled
> PCI: 00:16.0 [8086/8c3a] enabled
> PCI: 00:16.1: Disabling device
> PCI: 00:16.2: Disabling device
> PCI: 00:16.3: Disabling device
> PCI: 00:19.0: Disabling device
> PCI: 00:1a.0 [8086/8c2d] enabled
> PCI: 00:1b.0 [8086/8c20] enabled
> PCIe Root Port 1 ASPM is disabled
> PCI: 00:1c.0 [8086/8c10] enabled
> PCI: 00:1c.1 [8086/8c12] disabled
> PCI: 00:1c.2 [8086/8c14] disabled
> PCIe Root Port 4 ASPM is disabled
> PCI: 00:1c.3 [8086/8c16] enabled
> PCIe Root Port 5 ASPM is disabled
> PCI: 00:1c.4 [8086/8c18] enabled
> PCIe Root Port 6 ASPM is disabled
> PCI: 00:1c.5 [8086/8c1a] enabled
> PCI: 00:1d.0 [8086/8c26] enabled
> PCI: 00:1f.0 [8086/8c5c] enabled
> PCI: 00:1f.2 [8086/8c02] enabled
> PCI: 00:1f.3 [8086/8c22] enabled
> PCI: 00:1f.5: Disabling device
> PCI: 00:1f.6: Disabling device
> PCI: pci_scan_bus for bus 01
> scan_bus: scanning of bus PCI: 00:1c.0 took 2646 usecs
> PCI: pci_scan_bus for bus 02
> PCI: 02:00.0 [10ec/8168] enabled
> Enabling Common Clock Configuration
> ASPM: Enabled L1
> scan_bus: scanning of bus PCI: 00:1c.3 took 10596 usecs
> PCI: pci_scan_bus for bus 03
> PCI: 03:00.0 [1b21/1142] enabled
> Enabling Common Clock Configuration
> ASPM: Enabled None
> Failed to enable LTR for dev = PCI: 03:00.0
> scan_bus: scanning of bus PCI: 00:1c.4 took 14643 usecs
> PCI: pci_scan_bus for bus 04
> PCI: 04:00.0 [168c/0030] enabled
> Enabling Common Clock Configuration
> ASPM: Enabled None
> Failed to enable LTR for dev = PCI: 04:00.0
> scan_bus: scanning of bus PCI: 00:1c.5 took 14625 usecs
> PNP: 002e.0 disabled
> PNP: 002e.1 enabled
> PNP: 002e.2 enabled
> PNP: 002e.3 enabled
> PNP: 002e.5 enabled
> PNP: 002e.6 disabled
> PNP: 002e.7 disabled
> PNP: 002e.107 disabled
> PNP: 002e.8 disabled
> PNP: 002e.108 disabled
> PNP: 002e.208 disabled
> PNP: 002e.308 disabled
> PNP: 002e.109 disabled
> PNP: 002e.209 disabled
> PNP: 002e.309 disabled
> PNP: 002e.409 disabled
> PNP: 002e.509 disabled
> PNP: 002e.609 disabled
> PNP: 002e.709 disabled
> PNP: 002e.a disabled
> PNP: 002e.b enabled
> PNP: 002e.d disabled
> PNP: 002e.e disabled
> PNP: 002e.f disabled
> PNP: 002e.14 disabled
> PNP: 002e.16 disabled
> PNP: 002e.17 disabled
> scan_bus: scanning of bus PCI: 00:1f.0 took 54169 usecs
> scan_bus: scanning of bus PCI: 00:1f.3 took 2 usecs
> scan_bus: scanning of bus DOMAIN: 0000 took 217465 usecs
> scan_bus: scanning of bus Root Device took 226566 usecs
> done
> FMAP: area RW_MRC_CACHE found @ 190000 (65536 bytes)
> MRC: Checking cached data update for 'RW_MRC_CACHE'.
> Manufacturer: ef
> SF: Detected W25Q32 with sector size 0x1000, total 0x400000
> MRC: no data in 'RW_MRC_CACHE'
> MRC: cache data 'RW_MRC_CACHE' needs update.
> BS: BS_DEV_ENUMERATE times (us): entry 0 run 234019 exit 36682
> Allocating resources...
> Reading resources...
> Done reading resources.
> skipping PNP: 002e.1@f0 fixed resource, size=0!
> Setting resources...
> PCI: 00:14.0 10 <- [0x00feb00000 - 0x00feb0ffff] size 0x00010000 gran 0x10 mem64
> PCI: 00:16.0 10 <- [0x00feb18000 - 0x00feb1800f] size 0x00000010 gran 0x04 mem64
> PCI: 00:1a.0 10 <- [0x00feb15000 - 0x00feb153ff] size 0x00000400 gran 0x0a mem
> PCI: 00:1b.0 10 <- [0x00feb10000 - 0x00feb13fff] size 0x00004000 gran 0x0e mem64
> PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
> PCI: 00:1c.0 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 01 prefmem
> PCI: 00:1c.0 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 01 mem
> PCI: 00:1c.3 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 02 io
> PCI: 00:1c.3 24 <- [0x00fe700000 - 0x00fe7fffff] size 0x00100000 gran 0x14 bus 02 prefmem
> PCI: 00:1c.3 20 <- [0x00fe800000 - 0x00fe8fffff] size 0x00100000 gran 0x14 bus 02 mem
> PCI: 02:00.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
> PCI: 02:00.0 18 <- [0x00fe800000 - 0x00fe800fff] size 0x00001000 gran 0x0c mem64
> PCI: 02:00.0 20 <- [0x00fe700000 - 0x00fe703fff] size 0x00004000 gran 0x0e prefmem64
> PCI: 00:1c.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io
> PCI: 00:1c.4 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 03 prefmem
> PCI: 00:1c.4 20 <- [0x00fe900000 - 0x00fe9fffff] size 0x00100000 gran 0x14 bus 03 mem
> PCI: 03:00.0 10 <- [0x00fe900000 - 0x00fe907fff] size 0x00008000 gran 0x0f mem64
> PCI: 00:1c.5 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io
> PCI: 00:1c.5 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 04 prefmem
> PCI: 00:1c.5 20 <- [0x00fea00000 - 0x00feafffff] size 0x00100000 gran 0x14 bus 04 mem
> PCI: 04:00.0 10 <- [0x00fea00000 - 0x00fea1ffff] size 0x00020000 gran 0x11 mem64
> PCI: 04:00.0 30 <- [0x00fea20000 - 0x00fea2ffff] size 0x00010000 gran 0x10 romem
> PCI: 00:1d.0 10 <- [0x00feb16000 - 0x00feb163ff] size 0x00000400 gran 0x0a mem
> PNP: 002e.1 60 <- [0x0000000378 - 0x000000037f] size 0x00000008 gran 0x03 io
> PNP: 002e.1 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran 0x00 irq
> PNP: 002e.1 74 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 drq
> PNP: 002e.1 f0 <- [0x000000003c - 0x000000003b] size 0x00000000 gran 0x00 irq
> PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
> PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
> PNP: 002e.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io
> PNP: 002e.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq
> PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
> PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io
> PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
> PNP: 002e.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
> PNP: 002e.b 60 <- [0x0000000290 - 0x0000000291] size 0x00000002 gran 0x01 io
> PNP: 002e.b 62 <- [0x0000000000 - 0x0000000001] size 0x00000002 gran 0x01 io
> PNP: 002e.b 70 <- [0x0000000000 - 0x0000000000] size 0x00000001 gran 0x00 irq
> PCI: 00:1f.2 10 <- [0x0000002020 - 0x0000002027] size 0x00000008 gran 0x03 io
> PCI: 00:1f.2 14 <- [0x0000002030 - 0x0000002033] size 0x00000004 gran 0x02 io
> PCI: 00:1f.2 18 <- [0x0000002028 - 0x000000202f] size 0x00000008 gran 0x03 io
> PCI: 00:1f.2 1c <- [0x0000002034 - 0x0000002037] size 0x00000004 gran 0x02 io
> PCI: 00:1f.2 20 <- [0x0000002000 - 0x000000201f] size 0x00000020 gran 0x05 io
> PCI: 00:1f.2 24 <- [0x00feb14000 - 0x00feb147ff] size 0x00000800 gran 0x0b mem
> PCI: 00:1f.3 10 <- [0x00feb17000 - 0x00feb170ff] size 0x00000100 gran 0x08 mem64
> Done setting resources.
> Done allocating resources.
> BS: BS_DEV_RESOURCES times (us): entry 0 run 338864 exit 0
> Enabling resources...
> PCI: 00:00.0 subsystem <- 1849/0c00
> PCI: 00:00.0 cmd <- 06
> PCI: 00:14.0 subsystem <- 1849/8c31
> PCI: 00:14.0 cmd <- 102
> PCI: 00:16.0 subsystem <- 1849/8c3a
> PCI: 00:16.0 cmd <- 02
> PCI: 00:1a.0 subsystem <- 1849/8c2d
> PCI: 00:1a.0 cmd <- 102
> PCI: 00:1b.0 subsystem <- 1849/7662
> PCI: 00:1b.0 cmd <- 102
> PCI: 00:1c.0 bridge ctrl <- 0003
> PCI: 00:1c.0 subsystem <- 1849/8c10
> PCI: 00:1c.0 cmd <- 00
> PCI: 00:1c.3 bridge ctrl <- 0003
> PCI: 00:1c.3 subsystem <- 1849/8c16
> PCI: 00:1c.3 cmd <- 07
> PCI: 00:1c.4 bridge ctrl <- 0003
> PCI: 00:1c.4 subsystem <- 1849/8c18
> PCI: 00:1c.4 cmd <- 06
> PCI: 00:1c.5 bridge ctrl <- 0003
> PCI: 00:1c.5 subsystem <- 1849/8c1a
> PCI: 00:1c.5 cmd <- 06
> PCI: 00:1d.0 subsystem <- 1849/8c26
> PCI: 00:1d.0 cmd <- 102
> PCI: 00:1f.0 subsystem <- 1849/8c5c
> PCI: 00:1f.0 cmd <- 107
> PCI: 00:1f.2 subsystem <- 1849/8c02
> PCI: 00:1f.2 cmd <- 103
> PCI: 00:1f.3 subsystem <- 1849/8c22
> PCI: 00:1f.3 cmd <- 103
> PCI: 02:00.0 cmd <- 03
> PCI: 03:00.0 subsystem <- 1849/1042
> PCI: 03:00.0 cmd <- 102
> PCI: 04:00.0 cmd <- 02
> done.
> BS: BS_DEV_ENABLE times (us): entry 0 run 93919 exit 0
> Initializing devices...
> Root Device init ...
> Root Device init finished in 1974 usecs
> CPU_CLUSTER: 0 init ...
> MTRR: Physical address space:
> 0x00000000fe700000 - 0x0000000100000000 size 0x01900000 type 0
> MTRR: Fixed MSR 0x250 0x0000000000000000
> MTRR: Fixed MSR 0x258 0x0000000000000000
> MTRR: Fixed MSR 0x259 0x0000000000000000
> MTRR: Fixed MSR 0x268 0x0000000000000000
> MTRR: Fixed MSR 0x269 0x0000000000000000
> MTRR: Fixed MSR 0x26a 0x0000000000000000
> MTRR: Fixed MSR 0x26b 0x0000000000000000
> MTRR: Fixed MSR 0x26c 0x0000000000000000
> MTRR: Fixed MSR 0x26d 0x0000000000000000
> MTRR: Fixed MSR 0x26e 0x0000000000000000
> MTRR: Fixed MSR 0x26f 0x0000000000000000
> CPU physical address size: 39 bits
> MTRR: default type WB/UC MTRR counts: 3/0.
> MTRR: UC selected as default type.
>
> MTRR check
> Fixed MTRRs   : Enabled
> Variable MTRRs: Enabled
>
> Initializing VR config.
> CPU has 4 cores, 8 threads enabled.
> Setting up SMI for CPU
> Will perform SMM setup.
> CBFS: 'Master Header Locator' located CBFS at [1a0000:400000)
> CBFS: Locating 'cpu_microcode_blob.bin'
> CBFS: Found @ offset 9080 size b000
> microcode: sig=0x306c3 pf=0x2 revision=0x24
> CPU: Intel(R) Xeon(R) CPU E3-1271 v3 @ 3.60GHz.
> Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
> Processing 16 relocs. Offset value of 0x00030000
> Attempting to start 7 APs
> Waiting for 10ms after sending INIT.
> Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
> AP: slot 6 apic_id 7.
> AP: slot 1 apic_id 2.
> AP: slot 3 apic_id 3.
> AP: slot 5 apic_id 5.
> AP: slot 7 apic_id 6.
> done.
> AP: slot 4 apic_id 4.
> Waiting for 2nd SIPI to complete...done.
> Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
> Processing 13 relocs. Offset value of 0x00038000
> SMM Module: stub loaded at 00038000. Will call 7f7a4b5d(00000000)
> Installing SMM handler to 0x7f800000
> Loading module at 7f810000 with entry 7f810419. filesize: 0x1950 memsize: 0x5978
> Processing 58 relocs. Offset value of 0x7f810000
> Loading module at 7f808000 with entry 7f808000. filesize: 0x1a8 memsize: 0x1a8
> Processing 13 relocs. Offset value of 0x7f808000
> SMM Module: placing jmp sequence at 7f807c00 rel16 0x03fd
> SMM Module: placing jmp sequence at 7f807800 rel16 0x07fd
> SMM Module: placing jmp sequence at 7f807400 rel16 0x0bfd
> SMM Module: placing jmp sequence at 7f807000 rel16 0x0ffd
> SMM Module: placing jmp sequence at 7f806c00 rel16 0x13fd
> SMM Module: placing jmp sequence at 7f806800 rel16 0x17fd
> SMM Module: placing jmp sequence at 7f806400 rel16 0x1bfd
> SMM Module: stub loaded at 7f808000. Will call 7f810419(00000000)
> Initializing Southbridge SMI...
> SMI_STS: PM1 
> TMROF New SMBASE 0x7f800000
> In relocation handler: cpu 0
> New SMBASE=0x7f800000 IEDBASE=0x7fc00000
> Writing SMRR. base = 0x7f800006, mask=0xff800800
> Relocation complete.
> New SMBASE 0x7f7ff800
> In relocation handler: cpu 2
> New SMBASE=0x7f7ff800 IEDBASE=0x7fc00000
> Writing SMRR. base = 0x7f800006, mask=0xff800800
> Relocation complete.
> New SMBASE 0x7f7fe800
> In relocation handler: cpu 6
> New SMBASE=0x7f7fe800 IEDBASE=0x7fc00000
> Writing SMRR. base = 0x7f800006, mask=0xff800800
> Relocation complete.
> New SMBASE 0x7f7fec00
> In relocation handler: cpu 5
> New SMBASE=0x7f7fec00 IEDBASE=0x7fc00000
> Writing SMRR. base = 0x7f800006, mask=0xff800800
> Relocation complete.
> New SMBASE 0x7f7ff000
> In relocation handler: cpu 4
> New SMBASE=0x7f7ff000 IEDBASE=0x7fc00000
> Writing SMRR. base = 0x7f800006, mask=0xff800800
> Relocation complete.
> New SMBASE 0x7f7fe400
> In relocation handler: cpu 7
> New SMBASE=0x7f7fe400 IEDBASE=0x7fc00000
> Writing SMRR. base = 0x7f800006, mask=0xff800800
> Relocation complete.
> New SMBASE 0x7f7ff400
> In relocation handler: cpu 3
> New SMBASE=0x7f7ff400 IEDBASE=0x7fc00000
> Writing SMRR. base = 0x7f800006, mask=0xff800800
> Relocation complete.
> New SMBASE 0x7f7ffc00
> In relocation handler: cpu 1
> New SMBASE=0x7f7ffc00 IEDBASE=0x7fc00000
> Writing SMRR. base = 0x7f800006, mask=0xff800800
> Relocation complete.
> Initializing CPU #0
> CPU: vendor Intel device 306c3
> CPU: family 06, model 3c, stepping 03
> Setting up local APIC... apic_id: 0x00 done.
> VMX status: enabled, locked
> haswell: energy policy set to 6
> haswell: frequency set to 3600
> Turbo is available but hidden
> Turbo has been enabled
> CPU #0 initialized
> Initializing CPU #2
> Initializing CPU #1
> CPU: vendor Intel device 306c3
> Initializing CPU #4
> CPU: family 06, model 3c, stepping 03
> CPU: vendor Intel device 306c3
> CPU: vendor Intel device 306c3
> Setting up local APIC...CPU: family 06, model 3c, stepping 03
>  apic_id: 0x01 Initializing CPU #3
> done.
> Setting up local APIC...Initializing CPU #5
> VMX status: enabled, locked
> Initializing CPU #6
> haswell: energy policy set to 6
> Initializing CPU #7
> CPU: vendor Intel device 306c3
> haswell: frequency set to 3600
> CPU: family 06, model 3c, stepping 03
> CPU #2 initialized
>  apic_id: 0x02 CPU: family 06, model 3c, stepping 03
> Setting up local APIC...Setting up local APIC...CPU: vendor Intel device 306c3
> CPU: vendor Intel device 306c3
> done.
> CPU: vendor Intel device 306c3
>  apic_id: 0x04  apic_id: 0x05 CPU: family 06, model 3c, stepping 03
> CPU: family 06, model 3c, stepping 03
> CPU: family 06, model 3c, stepping 03
> Setting up local APIC...Setting up local APIC...Setting up local APIC...done.
>  apic_id: 0x03 VMX status: enabled, locked
> VMX status: enabled, locked
> done.
> haswell: energy policy set to 6
> done.
> haswell: energy policy set to 6
> VMX status: enabled, locked
> haswell: frequency set to 3600
> haswell: frequency set to 3600
> VMX status: enabled, locked
> CPU #5 initialized
>  apic_id: 0x07  apic_id: 0x06 CPU #1 initialized
> done.
> haswell: energy policy set to 6
> VMX status: enabled, locked
> done.
> haswell: energy policy set to 6
> haswell: frequency set to 3600
> haswell: frequency set to 3600
> CPU #4 initialized
> VMX status: enabled, locked
> CPU #6 initialized
> haswell: energy policy set to 6
> haswell: energy policy set to 6
> haswell: frequency set to 3600
> haswell: frequency set to 3600
> CPU #7 initialized
> CPU #3 initialized
> bsp_do_flight_plan done after 484 msecs.
> Enabling SMIs.
> Locking SMM.
> CPU_CLUSTER: 0 init finished in 661544 usecs
> PCI: 00:00.0 init ...
> PCI: 00:00.0 init finished in 2736 usecs
> PCI: 00:14.0 init ...
> IOBP: set 0xe5004001 to 0x000000ce
> PCI: 00:14.0 init finished in 7516 usecs
> PCI: 00:16.0 init ...
> ME: FW Partition Table      : OK
> ME: Bringup Loader Failure  : NO
> ME: Firmware Init Complete  : YES
> ME: Manufacturing Mode      : NO
> ME: Boot Options Present    : NO
> ME: Update In Progress      : NO
> ME: Current Working State   : Normal
> ME: Current Operation State : M0 with UMA
> ME: Current Operation Mode  : Normal
> ME: Error Code              : No Error
> ME: Progress Phase          : Host Communication
> ME: Power Management Event  : Clean Moff->Mx wake
> ME: Progress Phase State    : Host communication established
> ME: BIOS path: Normal
> ME: Extend SHA-256: 53d07b5984ce080dbe27b6128243f8752927e05c4627b43d79c11693df819db5
> ME MBP: Header: items: 8, size dw: 35
> ME: found version 9.0.30.1482
> ME: Wake Event to ME Reset:      0 ms
> ME: ME Reset to Platform Reset:  0 ms
> ME: Platform Reset to CPU Reset: 40 ms
> PCI: 00:16.0 init finished in 86133 usecs
> PCI: 00:1a.0 init ...
> EHCI: Setting up controller.. IOBP: set 0xe5004001 to 0x000000ce
> done.
> PCI: 00:1a.0 init finished in 10345 usecs
> PCI: 00:1b.0 init ...
> Azalia: base = feb10000
> Azalia: codec_mask = 01
> HDA: Initializing codec #0
> HDA: codec viddid: 10ec0662
> HDA: verb not loaded
> PCI: 00:1b.0 init finished in 18831 usecs
> PCI: 00:1c.0 init ...
> Initializing PCH PCIe bridge.
> PCI: 00:1c.0 init finished in 6204 usecs
> PCI: 00:1c.3 init ...
> Initializing PCH PCIe bridge.
> PCI: 00:1c.3 init finished in 6213 usecs
> PCI: 00:1c.4 init ...
> Initializing PCH PCIe bridge.
> PCI: 00:1c.4 init finished in 6272 usecs
> PCI: 00:1c.5 init ...
> Initializing PCH PCIe bridge.
> PCI: 00:1c.5 init finished in 6300 usecs
> PCI: 00:1d.0 init ...
> EHCI: Setting up controller.. IOBP: set 0xe5004001 to 0x000000ce
> done.
> PCI: 00:1d.0 init finished in 10377 usecs
> PCI: 00:1f.0 init ...
> pch: lpc_init
> IOAPIC: Initializing IOAPIC at 0xfec00000
> IOAPIC: Bootstrap Processor Local APIC = 0x00
> IOAPIC: ID = 0x02
> FMAP: area COREBOOT found @ 1a0000 (2490368 bytes)
> CBFS: Locating 'cmos_layout.bin'
> CBFS: Found @ offset 28600 size 29c
> Set power state keep after power failure.
> FMAP: area COREBOOT found @ 1a0000 (2490368 bytes)
> CBFS: Locating 'cmos_layout.bin'
> CBFS: Found @ offset 28600 size 29c
> NMI sources enabled.
> LynxPoint PM init
> RTC: failed = 0x0
> RTC Init
> Disabling ACPI via APMC:
> done.
> PCI: 00:1f.0 init finished in 64310 usecs
> PCI: 00:1f.2 init ...
> SATA: Initializing...
> SATA: Controller in AHCI mode.
> ABAR: feb14000
> PCI: 00:1f.2 init finished in 11793 usecs
> PCI: 00:1f.3 init ...
> PCI: 00:1f.3 init finished in 2930 usecs
> PCI: 02:00.0 init ...
> CBFS: 'Master Header Locator' located CBFS at [1a0000:400000)
> CBFS: Locating 'rt8168-macaddress'
> CBFS: Found @ offset 28440 size 11
> r8168: Resetting NIC...done
> r8168: Programming MAC Address...done
> r8168: Customized LED 0x824
> r8168: read back LED setting as 0x824
> PCI: 02:00.0 init finished in 31916 usecs
> PCI: 03:00.0 init ...
> PCI: 03:00.0 init finished in 2775 usecs
> PCI: 04:00.0 init ...
> PCI: 04:00.0 init finished in 2763 usecs
> PNP: 002e.1 init ...
> PNP: 002e.1 init finished in 2620 usecs
> PNP: 002e.2 init ...
> PNP: 002e.2 init finished in 2620 usecs
> PNP: 002e.3 init ...
> PNP: 002e.3 init finished in 2621 usecs
> PNP: 002e.5 init ...
> PNP: 002e.5 init finished in 2598 usecs
> PNP: 002e.b init ...
> PNP: 002e.b init finished in 2621 usecs
> Devices initialized
> BS: BS_DEV_INIT times (us): entry 7 run 1065844 exit 42
> Finalize devices...
> PCI: 00:1f.0 final
> Devices finalized
> BS: BS_POST_DEVICE times (us): entry 41 run 13140 exit 41
> BS: BS_OS_RESUME_CHECK times (us): entry 41 run 77 exit 42
> CBFS: 'Master Header Locator' located CBFS at [1a0000:400000)
> CBFS: Locating 'fallback/dsdt.aml'
> CBFS: Found @ offset 2ccc0 size 2e49
> CBFS: 'Master Header Locator' located CBFS at [1a0000:400000)
> CBFS: Locating 'fallback/slic'
> CBFS: 'fallback/slic' not found.
> ACPI: Writing ACPI tables at 7f751000.
> ACPI:    * FACS
> ACPI:    * DSDT
> ACPI:    * FADT
> ACPI: added table 1/32, length now 40
> ACPI:     * SSDT
> Generating ACPI PIRQ entries
> ACPI: added table 2/32, length now 44
> ACPI:    * MCFG
> ACPI: added table 3/32, length now 48
> ACPI:    * MADT
> ACPI: added table 4/32, length now 52
> current = 7f754570
> ACPI:    * DMAR
> ACPI: added table 5/32, length now 56
> ACPI:    * HPET
> ACPI: added table 6/32, length now 60
> ACPI:     * SSDT2
> ACPI: added table 7/32, length now 64
> current = 7f7546a0
> ACPI: done.
> ACPI tables: 13984 bytes.
> Writing table forward entry at 0x00000500
> Wrote coreboot table at: 00000500, 0x10 bytes, checksum 3067
> Writing coreboot table at 0x7f775000
> CBFS: 'Master Header Locator' located CBFS at [1a0000:400000)
> CBFS: Locating 'cmos_layout.bin'
> CBFS: Found @ offset 28600 size 29c
>  0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
> 000000007f751000-000000007f78efff: CONFIGURATION TABLES
> 000000007f78f000-000000007f7ccfff: RAMSTAGE
> 000000007f7cd000-000000007f7fffff: CONFIGURATION TABLES
>
> CBFS: 'Master Header Locator' located CBFS at [1a0000:400000)
> Wrote coreboot table at: 7f775000, 0x564 bytes, checksum 7fe6
> coreboot table: 1404 bytes.
> IMD ROOT    0. 7f7ff000 00001000
> IMD SMALL   1. 7f7fe000 00001000
> CONSOLE     2. 7f7de000 00020000
> TIME STAMP  3. 7f7dd000 00000910
> MRC DATA    4. 7f7dc000 00000fe4
> ROMSTG STCK 5. 7f7d7000 00005000
> AFTER CAR   6. 7f7cd000 0000a000
> RAMSTAGE    7. 7f78e000 0003f000
> ACPI GNVS   8. 7f78d000 00001000
> SMM BACKUP  9. 7f77d000 00010000
> COREBOOT   10. 7f775000 00008000
> ACPI       11. 7f751000 00024000
> IMD small region:
>   IMD ROOT    0. 7f7fec00 00000400
>   MEM INFO    1. 7f7fea40 000001a9
>   ROMSTAGE    2. 7f7fea20 00000004
>   COREBOOTFWD 3. 7f7fe9e0 00000028
> BS: BS_WRITE_TABLES times (us): entry 42 run 302936 exit 42
> CBFS: 'Master Header Locator' located CBFS at [1a0000:400000)
> CBFS: Locating 'fallback/payload'
> CBFS: Found @ offset 2fb80 size 1929bd
> Checking segment from ROM address 0xffdcfbb8
> Payload being loaded at below 1MiB without region being marked as RAM usable.
> Checking segment from ROM address 0xffdcfbd4
> SELF segment doesn't target RAM: 0x00100000, 5203948 bytes
>  0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
> 000000007f751000-000000007f78efff: CONFIGURATION TABLES
> 000000007f78f000-000000007f7ccfff: RAMSTAGE
> 000000007f7cd000-000000007f7fffff: CONFIGURATION TABLES
>
> Payload not loaded.
>

coreboot on ASRock H81M-HDS cannot load a payload

[Iru Cai]

Thanks, it now works.
A patch is submitted: https://review.coreboot.org/c/coreboot/+/30266

On Mon, Dec 17, 2018 at 12:39 PM Marshall Dawson <
[e-mail]> wrote:
> I believe the Xeon hostbridge wasn't properly ID'ed.  Try adding 0x0c08 to
> the mc_pci_device_ids list near the bottom of
> northbridge/intel/haswell/northbridge.c.
>
> On Sun, Dec 16, 2018 at 9:32 PM ron minnich  wrote:
> > I don't know, but as a test, I'd be very interested to see what
> > happens with a linux payload. You probably don't have time for such a
> > thing but I had to ask :-)
> >
> > On Sun, Dec 16, 2018 at 8:15 PM Iru Cai  wrote:
> > > Hi,
> > >
> > > I'm trying to run coreboot on ASRock H81M-HDS with a Xeon E3 and 8G*2
> >
> > RAM. I chose to use my GRUB payload, but coreboot cannot load it with the
> > following error (full log in attachment):
> > > CBFS: 'Master Header Locator' located CBFS at [1a0000:400000)
> > > CBFS: Locating 'fallback/payload'
> > > CBFS: Found @ offset 2fb80 size 1929bd
> > > Checking segment from ROM address 0xffdcfbb8
> > > Payload being loaded at below 1MiB without region being marked as RAM
> >
> > usable.
> > > Checking segment from ROM address 0xffdcfbd4
> > > SELF segment doesn't target RAM: 0x00100000, 5203948 bytes
> > >  0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
> > > 000000007f751000-000000007f78efff: CONFIGURATION TABLES
> > > 000000007f78f000-000000007f7ccfff: RAMSTAGE
> > > 000000007f7cd000-000000007f7fffff: CONFIGURATION TABLES
> > >
> > > Payload not loaded.
> > >
> > > If I use SeaBIOS as payload, SeaBIOS can run, but it can't allocate
> >
> > resources for SATA, EHCI and XHCI and can't find any boot devices.
> > > What is the problem in it?
> > >
> > > Iru
> > >
> > > Please do not send me Microsoft Office/Apple iWork documents. Send
> >
> > OpenDocument instead! http://fsf.org/campaigns/opendocument/
> > >

coreboot on ASRock H81M-HDS cannot load a payload

[Marshall Dawson]

I believe the Xeon hostbridge wasn't properly ID'ed.  Try adding 0x0c08 to
the mc_pci_device_ids list near the bottom of
northbridge/intel/haswell/northbridge.c.

On Sun, Dec 16, 2018 at 9:32 PM ron minnich  wrote:
> I don't know, but as a test, I'd be very interested to see what
> happens with a linux payload. You probably don't have time for such a
> thing but I had to ask :-)
>
> On Sun, Dec 16, 2018 at 8:15 PM Iru Cai  wrote:
> > Hi,
> >
> > I'm trying to run coreboot on ASRock H81M-HDS with a Xeon E3 and 8G*2
>
> RAM. I chose to use my GRUB payload, but coreboot cannot load it with the
> following error (full log in attachment):
> > CBFS: 'Master Header Locator' located CBFS at [1a0000:400000)
> > CBFS: Locating 'fallback/payload'
> > CBFS: Found @ offset 2fb80 size 1929bd
> > Checking segment from ROM address 0xffdcfbb8
> > Payload being loaded at below 1MiB without region being marked as RAM
>
> usable.
> > Checking segment from ROM address 0xffdcfbd4
> > SELF segment doesn't target RAM: 0x00100000, 5203948 bytes
> >  0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
> > 000000007f751000-000000007f78efff: CONFIGURATION TABLES
> > 000000007f78f000-000000007f7ccfff: RAMSTAGE
> > 000000007f7cd000-000000007f7fffff: CONFIGURATION TABLES
> >
> > Payload not loaded.
> >
> > If I use SeaBIOS as payload, SeaBIOS can run, but it can't allocate
>
> resources for SATA, EHCI and XHCI and can't find any boot devices.
> > What is the problem in it?
> >
> > Iru
> >
> > Please do not send me Microsoft Office/Apple iWork documents. Send
>
> OpenDocument instead! http://fsf.org/campaigns/opendocument/
> >

coreboot on ASRock H81M-HDS cannot load a payload

[ron minnich]

you can actually make kernels surprisingly small. I've just built a 2M
kernel + u-root initramfs for example.

This kernel has very little in it.

If emmc support blots the kernel too large, I may write a Go
programmed IO driver for emmc to run in user mode, and
see if that is smaller.

On Sun, Dec 16, 2018 at 9:44 PM Iru Cai  wrote:
> I'm thinking of using a Linux payload before, but I failed to use an 8MB flash (W25Q64FVAIG) on ASRock H81M-HDS with all flash space used.
> I can only use the first 4MB with the original IFD, and the board doesn't boot after I change the IFD to use the whole 8MB flash.
>
> On Mon, Dec 17, 2018 at 12:31 PM ron minnich  wrote:
> > I don't know, but as a test, I'd be very interested to see what
> > happens with a linux payload. You probably don't have time for such a
> > thing but I had to ask :-)
> >
> > On Sun, Dec 16, 2018 at 8:15 PM Iru Cai  wrote:
> > > Hi,
> > >
> > > I'm trying to run coreboot on ASRock H81M-HDS with a Xeon E3 and 8G*2 RAM. I chose to use my GRUB payload, but coreboot cannot load it with the following error (full log in attachment):
> > >
> > > CBFS: 'Master Header Locator' located CBFS at [1a0000:400000)
> > > CBFS: Locating 'fallback/payload'
> > > CBFS: Found @ offset 2fb80 size 1929bd
> > > Checking segment from ROM address 0xffdcfbb8
> > > Payload being loaded at below 1MiB without region being marked as RAM usable.
> > > Checking segment from ROM address 0xffdcfbd4
> > > SELF segment doesn't target RAM: 0x00100000, 5203948 bytes
> > >  0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
> > > 000000007f751000-000000007f78efff: CONFIGURATION TABLES
> > > 000000007f78f000-000000007f7ccfff: RAMSTAGE
> > > 000000007f7cd000-000000007f7fffff: CONFIGURATION TABLES
> > >
> > > Payload not loaded.
> > >
> > > If I use SeaBIOS as payload, SeaBIOS can run, but it can't allocate resources for SATA, EHCI and XHCI and can't find any boot devices.
> > >
> > > What is the problem in it?
> > >
> > > Iru
> > > Please do not send me Microsoft Office/Apple iWork documents. Send OpenDocument instead! http://fsf.org/campaigns/opendocument/
> > >
> > > coreboot mailing list: [e-mail]
> > > https://mail.coreboot.org/mailman/listinfo/coreboot
>
> Please do not send me Microsoft Office/Apple iWork documents. Send OpenDocument instead! http://fsf.org/campaigns/opendocument/

coreboot on ASRock H81M-HDS cannot load a payload

[ron minnich]

I don't know, but as a test, I'd be very interested to see what
happens with a linux payload. You probably don't have time for such a
thing but I had to ask :-)

On Sun, Dec 16, 2018 at 8:15 PM Iru Cai  wrote:
> Hi,
>
> I'm trying to run coreboot on ASRock H81M-HDS with a Xeon E3 and 8G*2 RAM. I chose to use my GRUB payload, but coreboot cannot load it with the following error (full log in attachment):
>
> CBFS: 'Master Header Locator' located CBFS at [1a0000:400000)
> CBFS: Locating 'fallback/payload'
> CBFS: Found @ offset 2fb80 size 1929bd
> Checking segment from ROM address 0xffdcfbb8
> Payload being loaded at below 1MiB without region being marked as RAM usable.
> Checking segment from ROM address 0xffdcfbd4
> SELF segment doesn't target RAM: 0x00100000, 5203948 bytes
>  0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
> 000000007f751000-000000007f78efff: CONFIGURATION TABLES
> 000000007f78f000-000000007f7ccfff: RAMSTAGE
> 000000007f7cd000-000000007f7fffff: CONFIGURATION TABLES
>
> Payload not loaded.
>
> If I use SeaBIOS as payload, SeaBIOS can run, but it can't allocate resources for SATA, EHCI and XHCI and can't find any boot devices.
>
> What is the problem in it?
>
> Iru
> Please do not send me Microsoft Office/Apple iWork documents. Send OpenDocument instead! http://fsf.org/campaigns/opendocument/
>
> coreboot mailing list: [e-mail]
> https://mail.coreboot.org/mailman/listinfo/coreboot

coreboot on ASRock H81M-HDS cannot load a payload

[Iru Cai]

Hi,

I'm trying to run coreboot on ASRock H81M-HDS with a Xeon E3 and 8G*2 RAM.
I chose to use my GRUB payload, but coreboot cannot load it with the
following error (full log in attachment):

CBFS: 'Master Header Locator' located CBFS at [1a0000:400000)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset 2fb80 size 1929bd
Checking segment from ROM address 0xffdcfbb8
Payload being loaded at below 1MiB without region being marked as RAM
usable.
Checking segment from ROM address 0xffdcfbd4
SELF segment doesn't target RAM: 0x00100000, 5203948 bytes
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 000000007f751000-000000007f78efff: CONFIGURATION TABLES
 2. 000000007f78f000-000000007f7ccfff: RAMSTAGE
 3. 000000007f7cd000-000000007f7fffff: CONFIGURATION TABLES
Payload not loaded.

If I use SeaBIOS as payload, SeaBIOS can run, but it can't allocate
resources for SATA, EHCI and XHCI and can't find any boot devices.

What is the problem in it?

Iru

coreboot on ASRock H81M-HDS cannot load a payload

[Iru Cai]

I'm thinking of using a Linux payload before, but I failed to use an 8MB
flash (W25Q64FVAIG) on ASRock H81M-HDS with all flash space used.
I can only use the first 4MB with the original IFD, and the board doesn't
boot after I change the IFD to use the whole 8MB flash.

On Mon, Dec 17, 2018 at 12:31 PM ron minnich  wrote:
> I don't know, but as a test, I'd be very interested to see what
> happens with a linux payload. You probably don't have time for such a
> thing but I had to ask :-)
>
> On Sun, Dec 16, 2018 at 8:15 PM Iru Cai  wrote:
> > Hi,
> >
> > I'm trying to run coreboot on ASRock H81M-HDS with a Xeon E3 and 8G*2
>
> RAM. I chose to use my GRUB payload, but coreboot cannot load it with the
> following error (full log in attachment):
> > CBFS: 'Master Header Locator' located CBFS at [1a0000:400000)
> > CBFS: Locating 'fallback/payload'
> > CBFS: Found @ offset 2fb80 size 1929bd
> > Checking segment from ROM address 0xffdcfbb8
> > Payload being loaded at below 1MiB without region being marked as RAM
>
> usable.
> > Checking segment from ROM address 0xffdcfbd4
> > SELF segment doesn't target RAM: 0x00100000, 5203948 bytes
> >  0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
> > 000000007f751000-000000007f78efff: CONFIGURATION TABLES
> > 000000007f78f000-000000007f7ccfff: RAMSTAGE
> > 000000007f7cd000-000000007f7fffff: CONFIGURATION TABLES
> >
> > Payload not loaded.
> >
> > If I use SeaBIOS as payload, SeaBIOS can run, but it can't allocate
>
> resources for SATA, EHCI and XHCI and can't find any boot devices.
> > What is the problem in it?
> >
> > Iru
> >
> > Please do not send me Microsoft Office/Apple iWork documents. Send
>
> OpenDocument instead! http://fsf.org/campaigns/opendocument/
> >