Re: [coreboot] Problems changing payload on Intel Leaf Hill

[Cameron Craig]

Hi Mario,

I've been attempting to build coreboot(master) for the Leaf Hill CRB, with no success so far.

Did you modify the FSP blobs at all?
I had a look at your config, the filenames "FSP_MR2_M_ECC_MOD" caught my eye.

The reason I ask is that my coreboot build hangs in the FspSiliconInit().

Cheers,
Cameron

Cameron Craig | Graduate Software Engineer | Exterity Limited
tel: [phone] | fax:  | mobile: 
e: [e-mail] | w: www.exterity.com

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Problems changing payload on Intel Leaf Hill

[Scheithauer, Mario]

Hi Cameron,
> Did you modify the FSP blobs at all?

Yes, we made some adjustments for our mainboard (mc_apl1).
But they shouldn’t play a decisive role (power states, PCIe settings).
> The reason I ask is that my coreboot build hangs in the FspSiliconInit().

Then you will get pretty far.
We are currently still using the MR2 FSP package for APL-I.
As IFWI template we use the BIOS version v178.10 for the CRBs.
These components are provided by Intel.
That’s it. The CRB should boot with this combination.

Mario
> -----Ursprüngliche Nachricht-----
> Von: Cameron Craig [mailto:[e-mail]]
> Gesendet: Freitag, 3. November 2017 11:51
> An: Scheithauer, Mario (DF MC MTS R&D SWRT 4); ahW@n
> Cc: [e-mail]
> Betreff: RE: [coreboot] Problems changing payload on Intel Leaf Hill
>
> Hi Mario,
>
> I've been attempting to build coreboot(master) for the Leaf Hill CRB, with no
> success so far.
>
> Did you modify the FSP blobs at all?
> I had a look at your config, the filenames "FSP_MR2_M_ECC_MOD" caught my
> eye.
>
> The reason I ask is that my coreboot build hangs in the FspSiliconInit().
>
> Cheers,
> Cameron
>
> Cameron Craig | Graduate Software Engineer | Exterity Limited
> tel: [phone] | fax:  | mobile:
> e: [e-mail] | w: www.exterity.com
>
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> This email has been scanned by the Symantec Email Security.cloud service.
> For more information please visit http://www.symanteccloud.com
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