Hi,
below you will find support for the Geode GX1/CS5530 VGA feature. Its able to set up one of five screen resolutions (sorry no autodetection at runtime, resolution is selected at buildtime) and displays a graphic in the right bottom corner (splash screen).
Patch is against LinuxBIOSv2, revision of today.
Comments are welcome.
Juergen
Index: LinuxBIOSv2/src/southbridge/amd/cs5530/cs5530_vga.c =================================================================== --- /dev/null +++ LinuxBIOSv2/src/southbridge/amd/cs5530/cs5530_vga.c @@ -0,0 +1,458 @@ +/* + * Copyright (C) 2007 Juergen Beisert juergen@kreuzholzen.de + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA + * + * Purpose: + * Activate the VGA feature in a Geode GX1 based system with one of five + * possible VESA modes: VGA, SVGA, XGA, 4:3 SXGA and 5:4 SXGA. Also it is + * prepared to display a splash screen. + */ +#include <arch/io.h> +#include <device/device.h> +#include <device/pci.h> +#include <device/pci_ops.h> +#include <device/pci_ids.h> +#include <console/console.h> +#include <cpu/amd/gx1def.h> +#include <delay.h> + +#if CONFIG_GX1_VIDEO == 1 +/* + * Some register descriptions that are no listed in cpu/amd/gx1def.h + */ +#define CS5530_DOT_CLK_CONFIG 0x0024 +#define CS5530_DISPLAY_CONFIG 0x0004 + +#define DC_FB_ST_OFFSET 0x8310 /* framebuffer start offset */ +#define DC_CB_ST_OFFSET 0x8314 /* compression start offset */ +#define DC_CURS_ST_OFFSET 0x8318 /* cursor start offset */ +#define DC_VID_ST_OFFSET 0x8320 /* video start offset */ +#define DC_LINE_DELTA 0x8324 /* fb and cb skip counts */ +#define DC_BUF_SIZE 0x8328 /* fb and cb line size */ +#define DC_H_TIMING_1 0x8330 /* horizontal timing... */ +#define DC_H_TIMING_2 0x8334 +#define DC_H_TIMING_3 0x8338 +#define DC_FP_H_TIMING 0x833C +#define DC_V_TIMING_1 0x8340 /* vertical timing... */ +#define DC_V_TIMING_2 0x8344 +#define DC_V_TIMING_3 0x8348 +#define DC_FP_V_TIMING 0x834C +#define DC_TIMING_CFG 0x8308 +#define DC_OUTPUT_CFG 0x830C + +/* + * what colour depth should be used as default (in bpp) + * Note: Currently no other value than 16 is supported + */ +#define COLOUR_DEPTH 16 + +/* + * Support for a few basic video modes + * Note: all modes only for CRT. The flatpanel feature is + * not supported here (due to the lack of hardware to test) + */ +struct video_mode { + int pixel_clock; /*<< pixel clock in Hz */ + unsigned long pll_value; /*<< pll register value for this clock */ + + int visible_pixel; + int hsync_start; + int hsync_end; + int line_length; + + int visible_lines; + int vsync_start; + int vsync_end; + int picture_length; + + int sync_pol; /*<< 0: low, 1: high, bit 0 hsync, bit 1 vsync */ +}; + +/* + * values for .sync_pol + */ +#define HSYNC_HIGH_POL 0 +#define HSYNC_LOW_POL 1 +#define VSYNC_HIGH_POL 0 +#define VSYNC_LOW_POL 2 + +/* ModeLine "640x480" 31.5 640 664 704 832 480 489 491 520 -hsync -vsync */ +static const struct video_mode mode_640x480 = { + /* + * 640x480 @ 72Hz hsync: 37.9kHz + * VESA standard mode for classic 4:3 monitors + */ + .pixel_clock = 31500000, + .pll_value = 0x33915801, + + .visible_pixel = 640, + .hsync_start = 664, + .hsync_end = 704, /* 1.27 us sync length */ + .line_length = 832, /* 26.39us */ + + .visible_lines = 480, + .vsync_start = 489, + .vsync_end = 491, + .picture_length = 520, /* 13.89ms */ + + .sync_pol = HSYNC_LOW_POL | VSYNC_LOW_POL +}; + +/* ModeLine "800x600" 50.0 800 856 976 1040 600 637 643 666 +hsync +vsync */ +static const struct video_mode mode_800x600 = { + /* + * 800x600 @ 72Hz hsync: 48.1kHz + * VESA standard mode for classic 4:3 monitors + */ + .pixel_clock = 50000000, + .pll_value = 0x23088801, + + .visible_pixel = 800, + .hsync_start = 856, + .hsync_end = 976, + .line_length = 1040, /* 20.8us */ + + .visible_lines = 600, + .vsync_start = 637, + .vsync_end = 643, + .picture_length = 666, /* 13.89ms */ + + .sync_pol = HSYNC_HIGH_POL | VSYNC_HIGH_POL +}; + +/* ModeLine "1024x768" 75.0 1024 1048 1184 1328 768 771 777 806 -hsync -vsync */ +static const struct video_mode mode_1024x768 = { + /* + * 1024x768 @ 70Hz (VESA) hsync: 56.5kHz + * Standard mode for classic 4:3 monitors + */ + .pixel_clock = 75000000, + .pll_value = 0x37E22801, + + .visible_pixel = 1024, + .hsync_start = 1048, + .hsync_end = 1184, + .line_length = 1328, /* 17.7us */ + + .visible_lines = 768, + .vsync_start = 771, + .vsync_end = 777, + .picture_length = 806, /* 14.3us */ + + .sync_pol = HSYNC_LOW_POL | VSYNC_LOW_POL +}; + +/* ModeLine "1280x960" 108.0 1280 1376 1488 1800 960 961 964 1000 +hsync +vsync */ +static const struct video_mode mode_1280x960 = { + /* + * 1280x960 @ 60Hz (VESA) hsync: 60.0kHz + * Mode for classic 4:3 monitors + */ + .pixel_clock = 108000000, + .pll_value = 0x2710C805, + + .visible_pixel = 1280, + .hsync_start = 1376, + .hsync_end = 1488, + .line_length = 1800, /* 16.67us */ + + .visible_lines = 960, + .vsync_start = 961, + .vsync_end = 964, + .picture_length = 1000, /* 16.67ms */ + + .sync_pol = HSYNC_HIGH_POL | VSYNC_HIGH_POL +}; + +/* ModeLine "1280x1024" 108.0 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync */ +static const struct video_mode mode_1280x1024 = { + /* + * 1280x1024 @ 60Hz (VESA) hsync: 64.0kHz + * Mode for modern 5:4 flat screens + */ + .pixel_clock = 108000000, + .pll_value = 0x2710C805, + + .visible_pixel = 1280, + .hsync_start = 1328, + .hsync_end = 1440, + .line_length = 1688, /* 15.6us */ + + .visible_lines = 1024, + .vsync_start = 1025, + .vsync_end = 1028, + .picture_length = 1066, + + .sync_pol = HSYNC_HIGH_POL | VSYNC_HIGH_POL +}; + +/* + * a few supported common modes + */ +static const struct video_mode *modes[] = { + &mode_640x480, /* CONFIG_GX1_VIDEOMODE = 0 */ + &mode_800x600, /* CONFIG_GX1_VIDEOMODE = 1 */ + &mode_1024x768, /* CONFIG_GX1_VIDEOMODE = 2 */ + &mode_1280x960, /* CONFIG_GX1_VIDEOMODE = 3 */ + &mode_1280x1024 /* CONFIG_GX1_VIDEOMODE = 4 */ +}; + +/* make a sanity check at buildtime */ +#if CONFIG_GX1_VIDEOMODE > 4 +# error Requested video mode is unknown! +#endif + +/* + * Setup the pixel PLL in the companion chip + * base: register's base address + * pll_val: pll register value to be set + */ +static void cs5530_set_clock_frequency(void *io_base,unsigned long pll_val) +{ + unsigned long reg; + + /* disable the PLL first, reset and power it down */ + reg = readl(io_base+CS5530_DOT_CLK_CONFIG) & ~0x20; + reg |= 0x80000100; + writel(reg, io_base+CS5530_DOT_CLK_CONFIG); + + /* write the new PLL setting */ + reg |= (pll_val & ~0x80000920); + writel(reg, io_base+CS5530_DOT_CLK_CONFIG); + + mdelay(1); /* wait for control voltage to be 0V */ + + /* enable the PLL */ + reg |= 0x00000800; + writel(reg, io_base+CS5530_DOT_CLK_CONFIG); + + /* clear reset */ + reg &= ~0x80000000; + writel(reg, io_base+CS5530_DOT_CLK_CONFIG); + + /* clear bypass */ + reg &= ~0x00000100; + writel(reg, io_base+CS5530_DOT_CLK_CONFIG); +} + +/* + * Setup memory layout + * gx_base: GX register area + * mode: Data about the video mode to setup + * + * This routine assumes unlocked DC registers. Using compressed buffer + * is not supported! (makes more sense later, but not while booting) + */ +static void dc_setup_layout(void *gx_base,const struct video_mode *mode) +{ + unsigned long base = 0x00000000; + + writel(base, gx_base + DC_FB_ST_OFFSET); + + base += (COLOUR_DEPTH>>3) * mode->visible_pixel * mode->visible_lines; + + writel(base, gx_base + DC_CB_ST_OFFSET); + writel(base, gx_base + DC_CURS_ST_OFFSET); + writel(base, gx_base + DC_VID_ST_OFFSET); + writel(((COLOUR_DEPTH>>3) * mode->visible_pixel) >> 2, gx_base + DC_LINE_DELTA); + writel(((COLOUR_DEPTH>>3) * mode->visible_pixel) >> 3, gx_base + DC_BUF_SIZE); +} + +/* + * Setup the HSYNC/VSYNC, active video timing + * gx_base: GX register area + * mode: Data about the video mode to setup + * + * This routine assumes unlocked DC registers + * + * |<------------------------- htotal ----------------------------->| + * |<------------ hactive -------------->| | + * | hblankstart-->| | + * | hblankend-->| + * | hsyncstart-->| | + * | hsyncend-->| | + * |#####################################___________________________| RGB data + * |______________________________________________---------_________| HSYNC + * + * |<------------------------- vtotal ----------------------------->| + * |<------------ vactive -------------->| | + * | vblankstart-->| | + * | vblankend-->| + * | vsyncstart-->| | + * | vsyncend-->| | + * |#####################################___________________________| line data + * |______________________________________________---------_________| YSYNC + */ +static void dc_setup_timing(void *gx_base,const struct video_mode *mode) +{ + unsigned long hactive, hblankstart, hsyncstart, hsyncend, hblankend, htotal; + unsigned long vactive, vblankstart, vsyncstart, vsyncend, vblankend, vtotal; + + hactive = mode->visible_pixel & 0x7FF; + hblankstart = hactive; + hsyncstart = mode->hsync_start & 0x7FF; + hsyncend = mode->hsync_end & 0x7FF; + hblankend = mode->line_length & 0x7FF; + htotal = hblankend; + + vactive = mode->visible_lines & 0x7FF; + vblankstart = vactive; + vsyncstart = mode->vsync_start & 0x7FF; + vsyncend = mode->vsync_end & 0x7FF; + vblankend = mode->picture_length & 0x7FF; + vtotal = vblankend; + + /* row description */ + writel((hactive - 1) | ((htotal - 1) << 16), gx_base + DC_H_TIMING_1); + /* horizontal blank description */ + writel((hblankstart - 1) | ((hblankend - 1) << 16), gx_base + DC_H_TIMING_2); + /* horizontal sync description */ + writel((hsyncstart - 1) | ((hsyncend - 1) << 16), gx_base + DC_H_TIMING_3); + writel((hsyncstart - 1) | ((hsyncend - 1) << 16), gx_base + DC_FP_H_TIMING); + + /* line description */ + writel((vactive - 1) | ((vtotal - 1) << 16), gx_base + DC_V_TIMING_1); + /* vertical blank description */ + writel((vblankstart - 1) | ((vblankend - 1) << 16), gx_base + DC_V_TIMING_2); + /* vertical sync description */ + writel((vsyncstart - 1) | ((vsyncend - 1) << 16), gx_base + DC_V_TIMING_3); + writel((vsyncstart - 2) | ((vsyncend - 2) << 16), gx_base + DC_FP_V_TIMING); +} + +/* + * Setup required internals to bring the mode up and running + * gx_base: GX register area + * mode: Data about the video mode to setup + */ +static void cs5530_activate_mode(void *gx_base, const struct video_mode *mode) +{ + writel(0x00000080, gx_base + DC_GENERAL_CFG); + mdelay(1); + dc_setup_layout(gx_base,mode); + dc_setup_timing(gx_base,mode); + + writel(0x2000C581, gx_base + DC_GENERAL_CFG); + writel(0x0000002F, gx_base + DC_TIMING_CFG); + writel(0x00003004, gx_base + DC_OUTPUT_CFG); +} + +/* + * Activate the current mode to be "visible" outside + * gx_base: GX register area + * mode: Data about the video mode to setup + */ +static void cs5530_activate_video(void *io_base, const struct video_mode *mode) +{ + u32 val; + + val = mode->sync_pol; + val <<= 8; + + writel(val | 0x0020002F, io_base + CS5530_DISPLAY_CONFIG); +} + +/* + * This bitmap file must provide: + * int width: pixel count in one line + * int height: line count + * int colours: ount of used colour + * unsigned long colour_map[]: RGB 565 colours to be used + * unsigned char bitmap[]: index per pixel into colour_map[], width*height pixels + */ +#include "bitmap.c" + +/* + * show a boot splash screen in the right lower corner of the screen + * swidth: screen width in pixel + * sheight: screen height in lines + * pitch: line pitch in bytes + * base: screen base address + * + * This routine assumes we are using a 16 bit colour depth! + */ +static void show_boot_splash_16(u32 swidth,u32 sheight,u32 pitch,void *base) +{ + int word_count,i; + unsigned short *adr; + u32 xstart,ystart,x,y; + /* + * fill the screen with the colour of the + * left top pixel in the graphic + */ + word_count = pitch*sheight; + printk_debug("Clear Screen at %p, %d words\n",base,word_count); + adr = (unsigned short *) base; + for (i=0; i < word_count; i++, adr++) + *adr = colour_map[bitmap[0]]; + printk_debug("Ready\n"); + + /* + * paint the splash + */ + xstart=swidth-width; + ystart=sheight-height; + printk_debug("Start at %u,%u\n",xstart,ystart); + for (y=0;y<height;y++) { + adr=(unsigned short*)(base + pitch*(y+ystart)+2*xstart); + for (x=0;x<width;x++) { + *adr=(unsigned short)colour_map[(int)bitmap[x+y*width]]; + adr++; + } + } +} + +/* + * management part + */ +static void cs5530_vga_init(device_t dev) +{ + const struct video_mode *mode; + void *io_base, *gx_base; + + io_base = (void*)pci_read_config32(dev,0x10); + gx_base = (void*)GX_BASE; + mode = modes[CONFIG_GX1_VIDEOMODE]; + + printk_debug("Setting up video mode %dx%d with %d Hz clock\n", + mode->visible_pixel, mode->visible_lines, mode->pixel_clock); + + cs5530_set_clock_frequency(io_base,mode->pll_value); + + writel(DC_UNLOCK_MAGIC, gx_base + DC_UNLOCK); + + show_boot_splash_16(mode->visible_pixel, mode->visible_lines, + mode->visible_pixel*(COLOUR_DEPTH>>3),(void*)(GX_BASE+0x800000)); + + cs5530_activate_mode(gx_base,mode); + + cs5530_activate_video(io_base, mode); + writel(0x00000000, gx_base + DC_UNLOCK); +} + +static struct device_operations vga_ops = { + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .init = cs5530_vga_init, + .enable = NULL /* not required */ +}; + +static struct pci_driver vga_pci_driver __pci_driver = { + .ops = &vga_ops, + .vendor = PCI_VENDOR_ID_CYRIX, + .device = PCI_DEVICE_ID_CYRIX_5530_VIDEO +}; + +#endif /* #if CONFIG_GX1_VIDEO == 1 */ Index: LinuxBIOSv2/src/southbridge/amd/cs5530/Config.lb =================================================================== --- LinuxBIOSv2.orig/src/southbridge/amd/cs5530/Config.lb +++ LinuxBIOSv2/src/southbridge/amd/cs5530/Config.lb @@ -22,3 +22,4 @@ config chip.h driver cs5530.o driver cs5530_isa.o driver cs5530_ide.o +driver cs5530_vga.o Index: LinuxBIOSv2/src/config/Options.lb =================================================================== --- LinuxBIOSv2.orig/src/config/Options.lb +++ LinuxBIOSv2/src/config/Options.lb @@ -1016,7 +1016,23 @@ define CONFIG_VIDEO_MB comment "Integrated graphics with UMA has dynamic setup" end
+define CONFIG_GX1_VIDEO + default 0 + export used + comment "Build in GX1's graphic support" +end
+define CONFIG_GX1_VIDEOMODE + default none + export used + comment "Define video mode after reset" +# could be +# 0 for 640x480 +# 1 for 800x600 +# 2 for 1024x768 +# 3 for 1280x960 +# 4 for 1280x1024 +end
############################################### # Board specific options Index: LinuxBIOSv2/src/southbridge/amd/cs5530/bitmap.c =================================================================== --- /dev/null +++ LinuxBIOSv2/src/southbridge/amd/cs5530/bitmap.c @@ -0,0 +1,304 @@ +/* do not edit +This is an image of size 51 x 60 with 234 colours */ +static const int width=51; +static const int height=60; +static const int colours=234; +static const unsigned long colour_map[234] = { +0x00000000, /* 0 */ +0x00000001, /* 1 */ +0x00000020, /* 2 */ +0x00000021, /* 3 */ +0x00000040, /* 4 */ +0x00000800, /* 5 */ +0x00000821, /* 6 */ +0x00000840, /* 7 */ +0x00000841, /* 8 */ +0x00000861, /* 9 */ +0x00001040, /* 10 */ +0x00001081, /* 11 */ +0x00001082, /* 12 */ +0x00001083, /* 13 */ +0x000010A2, /* 14 */ +0x00001881, /* 15 */ +0x000018C3, /* 16 */ +0x000018E3, /* 17 */ +0x000020A0, /* 18 */ +0x000020E4, /* 19 */ +0x00002103, /* 20 */ +0x00002104, /* 21 */ +0x00002124, /* 22 */ +0x00002921, /* 23 */ +0x00002945, /* 24 */ +0x00002946, /* 25 */ +0x00002965, /* 26 */ +0x00002966, /* 27 */ +0x00003186, /* 28 */ +0x000031A6, /* 29 */ +0x00003942, /* 30 */ +0x00003982, /* 31 */ +0x000039A7, /* 32 */ +0x000039C7, /* 33 */ +0x000039E7, /* 34 */ +0x000039E8, /* 35 */ +0x000041A2, /* 36 */ +0x000041C2, /* 37 */ +0x000041E7, /* 38 */ +0x00004207, /* 39 */ +0x00004208, /* 40 */ +0x00004228, /* 41 */ +0x00004229, /* 42 */ +0x000049E3, /* 43 */ +0x000049E5, /* 44 */ +0x00004A46, /* 45 */ +0x00004A47, /* 46 */ +0x00004A48, /* 47 */ +0x00004A49, /* 48 */ +0x00004A69, /* 49 */ +0x00004A8A, /* 50 */ +0x00005228, /* 51 */ +0x00005247, /* 52 */ +0x00005287, /* 53 */ +0x0000528A, /* 54 */ +0x000052AA, /* 55 */ +0x00005A21, /* 56 */ +0x00005A43, /* 57 */ +0x00005A63, /* 58 */ +0x00005AA9, /* 59 */ +0x00005AAA, /* 60 */ +0x00005ACA, /* 61 */ +0x00005ACB, /* 62 */ +0x00005AEB, /* 63 */ +0x00006222, /* 64 */ +0x00006261, /* 65 */ +0x000062A8, /* 66 */ +0x000062C7, /* 67 */ +0x000062E8, /* 68 */ +0x000062EB, /* 69 */ +0x000062EC, /* 70 */ +0x0000630B, /* 71 */ +0x0000630C, /* 72 */ +0x0000632C, /* 73 */ +0x00006A41, /* 74 */ +0x00006B05, /* 75 */ +0x00006B28, /* 76 */ +0x00006B29, /* 77 */ +0x00006B2D, /* 78 */ +0x00006B4D, /* 79 */ +0x00006B6D, /* 80 */ +0x00006B6E, /* 81 */ +0x00006B8D, /* 82 */ +0x000072A2, /* 83 */ +0x000072E2, /* 84 */ +0x000072E5, /* 85 */ +0x00007306, /* 86 */ +0x00007329, /* 87 */ +0x0000738E, /* 88 */ +0x000073AE, /* 89 */ +0x000073AF, /* 90 */ +0x000073CF, /* 91 */ +0x00007B28, /* 92 */ +0x00007B44, /* 93 */ +0x00007B48, /* 94 */ +0x00007B67, /* 95 */ +0x00007B69, /* 96 */ +0x00007BCE, /* 97 */ +0x00007BCF, /* 98 */ +0x00007BEF, /* 99 */ +0x00008323, /* 100 */ +0x00008345, /* 101 */ +0x000083AA, /* 102 */ +0x00008410, /* 103 */ +0x00008430, /* 104 */ +0x00008B02, /* 105 */ +0x00008B63, /* 106 */ +0x00008B83, /* 107 */ +0x00008B84, /* 108 */ +0x00008BA6, /* 109 */ +0x00008BC7, /* 110 */ +0x00008BEA, /* 111 */ +0x00008BEE, /* 112 */ +0x00008C51, /* 113 */ +0x00008C71, /* 114 */ +0x00009362, /* 115 */ +0x00009363, /* 116 */ +0x00009383, /* 117 */ +0x000093C5, /* 118 */ +0x000093C7, /* 119 */ +0x00009405, /* 120 */ +0x00009492, /* 121 */ +0x00009493, /* 122 */ +0x000094B2, /* 123 */ +0x00009B82, /* 124 */ +0x00009BC3, /* 125 */ +0x00009C2D, /* 126 */ +0x00009CB3, /* 127 */ +0x00009CD3, /* 128 */ +0x00009CF3, /* 129 */ +0x00009CF4, /* 130 */ +0x00009D14, /* 131 */ +0x0000A401, /* 132 */ +0x0000A403, /* 133 */ +0x0000A423, /* 134 */ +0x0000A44C, /* 135 */ +0x0000A489, /* 136 */ +0x0000A4F1, /* 137 */ +0x0000A514, /* 138 */ +0x0000A533, /* 139 */ +0x0000A534, /* 140 */ +0x0000ABE1, /* 141 */ +0x0000AC22, /* 142 */ +0x0000AC24, /* 143 */ +0x0000AC42, /* 144 */ +0x0000AC44, /* 145 */ +0x0000AC48, /* 146 */ +0x0000AC69, /* 147 */ +0x0000AC8A, /* 148 */ +0x0000ACEE, /* 149 */ +0x0000AD0A, /* 150 */ +0x0000AD2E, /* 151 */ +0x0000AD55, /* 152 */ +0x0000AD75, /* 153 */ +0x0000AD76, /* 154 */ +0x0000B423, /* 155 */ +0x0000B441, /* 156 */ +0x0000B444, /* 157 */ +0x0000B464, /* 158 */ +0x0000B484, /* 159 */ +0x0000B4A3, /* 160 */ +0x0000B4C4, /* 161 */ +0x0000B533, /* 162 */ +0x0000B596, /* 163 */ +0x0000B5B6, /* 164 */ +0x0000BC65, /* 165 */ +0x0000BC83, /* 166 */ +0x0000BC84, /* 167 */ +0x0000BCC9, /* 168 */ +0x0000BD03, /* 169 */ +0x0000BD2A, /* 170 */ +0x0000BD54, /* 171 */ +0x0000BD97, /* 172 */ +0x0000BDB5, /* 173 */ +0x0000BDD7, /* 174 */ +0x0000BDD8, /* 175 */ +0x0000BDF7, /* 176 */ +0x0000BE19, /* 177 */ +0x0000C4A2, /* 178 */ +0x0000C4C2, /* 179 */ +0x0000C4C3, /* 180 */ +0x0000C5CE, /* 181 */ +0x0000C5F9, /* 182 */ +0x0000C618, /* 183 */ +0x0000C61A, /* 184 */ +0x0000C638, /* 185 */ +0x0000CCE2, /* 186 */ +0x0000CD03, /* 187 */ +0x0000CD43, /* 188 */ +0x0000CD61, /* 189 */ +0x0000CD88, /* 190 */ +0x0000CE39, /* 191 */ +0x0000CE58, /* 192 */ +0x0000CE59, /* 193 */ +0x0000CE79, /* 194 */ +0x0000CE7A, /* 195 */ +0x0000CE7B, /* 196 */ +0x0000CE9A, /* 197 */ +0x0000D502, /* 198 */ +0x0000D522, /* 199 */ +0x0000D62C, /* 200 */ +0x0000D69A, /* 201 */ +0x0000D69B, /* 202 */ +0x0000D6BA, /* 203 */ +0x0000DD23, /* 204 */ +0x0000DD41, /* 205 */ +0x0000DD81, /* 206 */ +0x0000DDA1, /* 207 */ +0x0000DDA4, /* 208 */ +0x0000DE9C, /* 209 */ +0x0000DEDB, /* 210 */ +0x0000DEFB, /* 211 */ +0x0000DEFD, /* 212 */ +0x0000E5A2, /* 213 */ +0x0000E71C, /* 214 */ +0x0000E73C, /* 215 */ +0x0000EDC1, /* 216 */ +0x0000EF3E, /* 217 */ +0x0000EF5D, /* 218 */ +0x0000EF7D, /* 219 */ +0x0000EF7E, /* 220 */ +0x0000EF7F, /* 221 */ +0x0000F79D, /* 222 */ +0x0000F79E, /* 223 */ +0x0000F7BE, /* 224 */ +0x0000F7BF, /* 225 */ +0x0000F7DE, /* 226 */ +0x0000FFB8, /* 227 */ +0x0000FFBF, /* 228 */ +0x0000FFDD, /* 229 */ +0x0000FFDE, /* 230 */ +0x0000FFDF, /* 231 */ +0x0000FFFB, /* 232 */ +0x0000FFFF, /* 233 */ +}; + +static const unsigned char bitmap[3060] = { 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It's great. Give me a signed-off-by line and I will ack and commit.
ron
Hi Ron,
On Friday 05 October 2007 21:56, ron minnich wrote:
It's great. Give me a signed-off-by line and I will ack and commit.
all right, here it comes:
From: Juergen Beisert juergen127@kreuzholzen.de
This patch will add support for the Geode GX1/CS5530 VGA feature. Its able to set up one of five screen resolutions (sorry no autodetection at runtime, resolution is selected at buildtime) and displays a graphic in the right bottom corner (splash screen).
Patch is against LinuxBIOSv2, revision of 2007-10-05.
Signed-off-by: Juergen Beisert juergen127@kreuzholzen.de
config/Options.lb | 16 + southbridge/amd/cs5530/Config.lb | 1 southbridge/amd/cs5530/bitmap.c | 304 +++++++++++++++++++++++ southbridge/amd/cs5530/cs5530_vga.c | 458 ++++++++++++++++++++++++++++++++++++ 4 files changed, 779 insertions(+)
---
Index: LinuxBIOSv2/src/southbridge/amd/cs5530/cs5530_vga.c =================================================================== --- /dev/null +++ LinuxBIOSv2/src/southbridge/amd/cs5530/cs5530_vga.c @@ -0,0 +1,458 @@ +/* + * Copyright (C) 2007 Juergen Beisert juergen@kreuzholzen.de + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA + * + * Purpose: + * Activate the VGA feature in a Geode GX1 based system with one of five + * possible VESA modes: VGA, SVGA, XGA, 4:3 SXGA and 5:4 SXGA. Also it is + * prepared to display a splash screen. + */ +#include <arch/io.h> +#include <device/device.h> +#include <device/pci.h> +#include <device/pci_ops.h> +#include <device/pci_ids.h> +#include <console/console.h> +#include <cpu/amd/gx1def.h> +#include <delay.h> + +#if CONFIG_GX1_VIDEO == 1 +/* + * Some register descriptions that are no listed in cpu/amd/gx1def.h + */ +#define CS5530_DOT_CLK_CONFIG 0x0024 +#define CS5530_DISPLAY_CONFIG 0x0004 + +#define DC_FB_ST_OFFSET 0x8310 /* framebuffer start offset */ +#define DC_CB_ST_OFFSET 0x8314 /* compression start offset */ +#define DC_CURS_ST_OFFSET 0x8318 /* cursor start offset */ +#define DC_VID_ST_OFFSET 0x8320 /* video start offset */ +#define DC_LINE_DELTA 0x8324 /* fb and cb skip counts */ +#define DC_BUF_SIZE 0x8328 /* fb and cb line size */ +#define DC_H_TIMING_1 0x8330 /* horizontal timing... */ +#define DC_H_TIMING_2 0x8334 +#define DC_H_TIMING_3 0x8338 +#define DC_FP_H_TIMING 0x833C +#define DC_V_TIMING_1 0x8340 /* vertical timing... */ +#define DC_V_TIMING_2 0x8344 +#define DC_V_TIMING_3 0x8348 +#define DC_FP_V_TIMING 0x834C +#define DC_TIMING_CFG 0x8308 +#define DC_OUTPUT_CFG 0x830C + +/* + * what colour depth should be used as default (in bpp) + * Note: Currently no other value than 16 is supported + */ +#define COLOUR_DEPTH 16 + +/* + * Support for a few basic video modes + * Note: all modes only for CRT. The flatpanel feature is + * not supported here (due to the lack of hardware to test) + */ +struct video_mode { + int pixel_clock; /*<< pixel clock in Hz */ + unsigned long pll_value; /*<< pll register value for this clock */ + + int visible_pixel; + int hsync_start; + int hsync_end; + int line_length; + + int visible_lines; + int vsync_start; + int vsync_end; + int picture_length; + + int sync_pol; /*<< 0: low, 1: high, bit 0 hsync, bit 1 vsync */ +}; + +/* + * values for .sync_pol + */ +#define HSYNC_HIGH_POL 0 +#define HSYNC_LOW_POL 1 +#define VSYNC_HIGH_POL 0 +#define VSYNC_LOW_POL 2 + +/* ModeLine "640x480" 31.5 640 664 704 832 480 489 491 520 -hsync -vsync */ +static const struct video_mode mode_640x480 = { + /* + * 640x480 @ 72Hz hsync: 37.9kHz + * VESA standard mode for classic 4:3 monitors + */ + .pixel_clock = 31500000, + .pll_value = 0x33915801, + + .visible_pixel = 640, + .hsync_start = 664, + .hsync_end = 704, /* 1.27 us sync length */ + .line_length = 832, /* 26.39us */ + + .visible_lines = 480, + .vsync_start = 489, + .vsync_end = 491, + .picture_length = 520, /* 13.89ms */ + + .sync_pol = HSYNC_LOW_POL | VSYNC_LOW_POL +}; + +/* ModeLine "800x600" 50.0 800 856 976 1040 600 637 643 666 +hsync +vsync */ +static const struct video_mode mode_800x600 = { + /* + * 800x600 @ 72Hz hsync: 48.1kHz + * VESA standard mode for classic 4:3 monitors + */ + .pixel_clock = 50000000, + .pll_value = 0x23088801, + + .visible_pixel = 800, + .hsync_start = 856, + .hsync_end = 976, + .line_length = 1040, /* 20.8us */ + + .visible_lines = 600, + .vsync_start = 637, + .vsync_end = 643, + .picture_length = 666, /* 13.89ms */ + + .sync_pol = HSYNC_HIGH_POL | VSYNC_HIGH_POL +}; + +/* ModeLine "1024x768" 75.0 1024 1048 1184 1328 768 771 777 806 -hsync -vsync */ +static const struct video_mode mode_1024x768 = { + /* + * 1024x768 @ 70Hz (VESA) hsync: 56.5kHz + * Standard mode for classic 4:3 monitors + */ + .pixel_clock = 75000000, + .pll_value = 0x37E22801, + + .visible_pixel = 1024, + .hsync_start = 1048, + .hsync_end = 1184, + .line_length = 1328, /* 17.7us */ + + .visible_lines = 768, + .vsync_start = 771, + .vsync_end = 777, + .picture_length = 806, /* 14.3us */ + + .sync_pol = HSYNC_LOW_POL | VSYNC_LOW_POL +}; + +/* ModeLine "1280x960" 108.0 1280 1376 1488 1800 960 961 964 1000 +hsync +vsync */ +static const struct video_mode mode_1280x960 = { + /* + * 1280x960 @ 60Hz (VESA) hsync: 60.0kHz + * Mode for classic 4:3 monitors + */ + .pixel_clock = 108000000, + .pll_value = 0x2710C805, + + .visible_pixel = 1280, + .hsync_start = 1376, + .hsync_end = 1488, + .line_length = 1800, /* 16.67us */ + + .visible_lines = 960, + .vsync_start = 961, + .vsync_end = 964, + .picture_length = 1000, /* 16.67ms */ + + .sync_pol = HSYNC_HIGH_POL | VSYNC_HIGH_POL +}; + +/* ModeLine "1280x1024" 108.0 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync */ +static const struct video_mode mode_1280x1024 = { + /* + * 1280x1024 @ 60Hz (VESA) hsync: 64.0kHz + * Mode for modern 5:4 flat screens + */ + .pixel_clock = 108000000, + .pll_value = 0x2710C805, + + .visible_pixel = 1280, + .hsync_start = 1328, + .hsync_end = 1440, + .line_length = 1688, /* 15.6us */ + + .visible_lines = 1024, + .vsync_start = 1025, + .vsync_end = 1028, + .picture_length = 1066, + + .sync_pol = HSYNC_HIGH_POL | VSYNC_HIGH_POL +}; + +/* + * a few supported common modes + */ +static const struct video_mode *modes[] = { + &mode_640x480, /* CONFIG_GX1_VIDEOMODE = 0 */ + &mode_800x600, /* CONFIG_GX1_VIDEOMODE = 1 */ + &mode_1024x768, /* CONFIG_GX1_VIDEOMODE = 2 */ + &mode_1280x960, /* CONFIG_GX1_VIDEOMODE = 3 */ + &mode_1280x1024 /* CONFIG_GX1_VIDEOMODE = 4 */ +}; + +/* make a sanity check at buildtime */ +#if CONFIG_GX1_VIDEOMODE > 4 +# error Requested video mode is unknown! +#endif + +/* + * Setup the pixel PLL in the companion chip + * base: register's base address + * pll_val: pll register value to be set + */ +static void cs5530_set_clock_frequency(void *io_base,unsigned long pll_val) +{ + unsigned long reg; + + /* disable the PLL first, reset and power it down */ + reg = readl(io_base+CS5530_DOT_CLK_CONFIG) & ~0x20; + reg |= 0x80000100; + writel(reg, io_base+CS5530_DOT_CLK_CONFIG); + + /* write the new PLL setting */ + reg |= (pll_val & ~0x80000920); + writel(reg, io_base+CS5530_DOT_CLK_CONFIG); + + mdelay(1); /* wait for control voltage to be 0V */ + + /* enable the PLL */ + reg |= 0x00000800; + writel(reg, io_base+CS5530_DOT_CLK_CONFIG); + + /* clear reset */ + reg &= ~0x80000000; + writel(reg, io_base+CS5530_DOT_CLK_CONFIG); + + /* clear bypass */ + reg &= ~0x00000100; + writel(reg, io_base+CS5530_DOT_CLK_CONFIG); +} + +/* + * Setup memory layout + * gx_base: GX register area + * mode: Data about the video mode to setup + * + * This routine assumes unlocked DC registers. Using compressed buffer + * is not supported! (makes more sense later, but not while booting) + */ +static void dc_setup_layout(void *gx_base,const struct video_mode *mode) +{ + unsigned long base = 0x00000000; + + writel(base, gx_base + DC_FB_ST_OFFSET); + + base += (COLOUR_DEPTH>>3) * mode->visible_pixel * mode->visible_lines; + + writel(base, gx_base + DC_CB_ST_OFFSET); + writel(base, gx_base + DC_CURS_ST_OFFSET); + writel(base, gx_base + DC_VID_ST_OFFSET); + writel(((COLOUR_DEPTH>>3) * mode->visible_pixel) >> 2, gx_base + DC_LINE_DELTA); + writel(((COLOUR_DEPTH>>3) * mode->visible_pixel) >> 3, gx_base + DC_BUF_SIZE); +} + +/* + * Setup the HSYNC/VSYNC, active video timing + * gx_base: GX register area + * mode: Data about the video mode to setup + * + * This routine assumes unlocked DC registers + * + * |<------------------------- htotal ----------------------------->| + * |<------------ hactive -------------->| | + * | hblankstart-->| | + * | hblankend-->| + * | hsyncstart-->| | + * | hsyncend-->| | + * |#####################################___________________________| RGB data + * |______________________________________________---------_________| HSYNC + * + * |<------------------------- vtotal ----------------------------->| + * |<------------ vactive -------------->| | + * | vblankstart-->| | + * | vblankend-->| + * | vsyncstart-->| | + * | vsyncend-->| | + * |#####################################___________________________| line data + * |______________________________________________---------_________| YSYNC + */ +static void dc_setup_timing(void *gx_base,const struct video_mode *mode) +{ + unsigned long hactive, hblankstart, hsyncstart, hsyncend, hblankend, htotal; + unsigned long vactive, vblankstart, vsyncstart, vsyncend, vblankend, vtotal; + + hactive = mode->visible_pixel & 0x7FF; + hblankstart = hactive; + hsyncstart = mode->hsync_start & 0x7FF; + hsyncend = mode->hsync_end & 0x7FF; + hblankend = mode->line_length & 0x7FF; + htotal = hblankend; + + vactive = mode->visible_lines & 0x7FF; + vblankstart = vactive; + vsyncstart = mode->vsync_start & 0x7FF; + vsyncend = mode->vsync_end & 0x7FF; + vblankend = mode->picture_length & 0x7FF; + vtotal = vblankend; + + /* row description */ + writel((hactive - 1) | ((htotal - 1) << 16), gx_base + DC_H_TIMING_1); + /* horizontal blank description */ + writel((hblankstart - 1) | ((hblankend - 1) << 16), gx_base + DC_H_TIMING_2); + /* horizontal sync description */ + writel((hsyncstart - 1) | ((hsyncend - 1) << 16), gx_base + DC_H_TIMING_3); + writel((hsyncstart - 1) | ((hsyncend - 1) << 16), gx_base + DC_FP_H_TIMING); + + /* line description */ + writel((vactive - 1) | ((vtotal - 1) << 16), gx_base + DC_V_TIMING_1); + /* vertical blank description */ + writel((vblankstart - 1) | ((vblankend - 1) << 16), gx_base + DC_V_TIMING_2); + /* vertical sync description */ + writel((vsyncstart - 1) | ((vsyncend - 1) << 16), gx_base + DC_V_TIMING_3); + writel((vsyncstart - 2) | ((vsyncend - 2) << 16), gx_base + DC_FP_V_TIMING); +} + +/* + * Setup required internals to bring the mode up and running + * gx_base: GX register area + * mode: Data about the video mode to setup + */ +static void cs5530_activate_mode(void *gx_base, const struct video_mode *mode) +{ + writel(0x00000080, gx_base + DC_GENERAL_CFG); + mdelay(1); + dc_setup_layout(gx_base,mode); + dc_setup_timing(gx_base,mode); + + writel(0x2000C581, gx_base + DC_GENERAL_CFG); + writel(0x0000002F, gx_base + DC_TIMING_CFG); + writel(0x00003004, gx_base + DC_OUTPUT_CFG); +} + +/* + * Activate the current mode to be "visible" outside + * gx_base: GX register area + * mode: Data about the video mode to setup + */ +static void cs5530_activate_video(void *io_base, const struct video_mode *mode) +{ + u32 val; + + val = mode->sync_pol; + val <<= 8; + + writel(val | 0x0020002F, io_base + CS5530_DISPLAY_CONFIG); +} + +/* + * This bitmap file must provide: + * int width: pixel count in one line + * int height: line count + * int colours: ount of used colour + * unsigned long colour_map[]: RGB 565 colours to be used + * unsigned char bitmap[]: index per pixel into colour_map[], width*height pixels + */ +#include "bitmap.c" + +/* + * show a boot splash screen in the right lower corner of the screen + * swidth: screen width in pixel + * sheight: screen height in lines + * pitch: line pitch in bytes + * base: screen base address + * + * This routine assumes we are using a 16 bit colour depth! + */ +static void show_boot_splash_16(u32 swidth,u32 sheight,u32 pitch,void *base) +{ + int word_count,i; + unsigned short *adr; + u32 xstart,ystart,x,y; + /* + * fill the screen with the colour of the + * left top pixel in the graphic + */ + word_count = pitch*sheight; + printk_debug("Clear Screen at %p, %d words\n",base,word_count); + adr = (unsigned short *) base; + for (i=0; i < word_count; i++, adr++) + *adr = colour_map[bitmap[0]]; + printk_debug("Ready\n"); + + /* + * paint the splash + */ + xstart=swidth-width; + ystart=sheight-height; + printk_debug("Start at %u,%u\n",xstart,ystart); + for (y=0;y<height;y++) { + adr=(unsigned short*)(base + pitch*(y+ystart)+2*xstart); + for (x=0;x<width;x++) { + *adr=(unsigned short)colour_map[(int)bitmap[x+y*width]]; + adr++; + } + } +} + +/* + * management part + */ +static void cs5530_vga_init(device_t dev) +{ + const struct video_mode *mode; + void *io_base, *gx_base; + + io_base = (void*)pci_read_config32(dev,0x10); + gx_base = (void*)GX_BASE; + mode = modes[CONFIG_GX1_VIDEOMODE]; + + printk_debug("Setting up video mode %dx%d with %d Hz clock\n", + mode->visible_pixel, mode->visible_lines, mode->pixel_clock); + + cs5530_set_clock_frequency(io_base,mode->pll_value); + + writel(DC_UNLOCK_MAGIC, gx_base + DC_UNLOCK); + + show_boot_splash_16(mode->visible_pixel, mode->visible_lines, + mode->visible_pixel*(COLOUR_DEPTH>>3),(void*)(GX_BASE+0x800000)); + + cs5530_activate_mode(gx_base,mode); + + cs5530_activate_video(io_base, mode); + writel(0x00000000, gx_base + DC_UNLOCK); +} + +static struct device_operations vga_ops = { + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .init = cs5530_vga_init, + .enable = NULL /* not required */ +}; + +static struct pci_driver vga_pci_driver __pci_driver = { + .ops = &vga_ops, + .vendor = PCI_VENDOR_ID_CYRIX, + .device = PCI_DEVICE_ID_CYRIX_5530_VIDEO +}; + +#endif /* #if CONFIG_GX1_VIDEO == 1 */ Index: LinuxBIOSv2/src/southbridge/amd/cs5530/Config.lb =================================================================== --- LinuxBIOSv2.orig/src/southbridge/amd/cs5530/Config.lb +++ LinuxBIOSv2/src/southbridge/amd/cs5530/Config.lb @@ -22,3 +22,4 @@ config chip.h driver cs5530.o driver cs5530_isa.o driver cs5530_ide.o +driver cs5530_vga.o Index: LinuxBIOSv2/src/config/Options.lb =================================================================== --- LinuxBIOSv2.orig/src/config/Options.lb +++ LinuxBIOSv2/src/config/Options.lb @@ -1016,7 +1016,23 @@ define CONFIG_VIDEO_MB comment "Integrated graphics with UMA has dynamic setup" end
+define CONFIG_GX1_VIDEO + default 0 + export used + comment "Build in GX1's graphic support" +end
+define CONFIG_GX1_VIDEOMODE + default none + export used + comment "Define video mode after reset" +# could be +# 0 for 640x480 +# 1 for 800x600 +# 2 for 1024x768 +# 3 for 1280x960 +# 4 for 1280x1024 +end
############################################### # Board specific options Index: LinuxBIOSv2/src/southbridge/amd/cs5530/bitmap.c =================================================================== --- /dev/null +++ LinuxBIOSv2/src/southbridge/amd/cs5530/bitmap.c @@ -0,0 +1,304 @@ +/* do not edit +This is an image of size 51 x 60 with 234 colours */ +static const int width=51; +static const int height=60; +static const int colours=234; +static const unsigned long colour_map[234] = { +0x00000000, /* 0 */ +0x00000001, /* 1 */ +0x00000020, /* 2 */ +0x00000021, /* 3 */ +0x00000040, /* 4 */ +0x00000800, /* 5 */ +0x00000821, /* 6 */ +0x00000840, /* 7 */ +0x00000841, /* 8 */ +0x00000861, /* 9 */ +0x00001040, /* 10 */ +0x00001081, /* 11 */ +0x00001082, /* 12 */ +0x00001083, /* 13 */ +0x000010A2, /* 14 */ +0x00001881, /* 15 */ +0x000018C3, /* 16 */ +0x000018E3, /* 17 */ +0x000020A0, /* 18 */ +0x000020E4, /* 19 */ +0x00002103, /* 20 */ +0x00002104, /* 21 */ +0x00002124, /* 22 */ +0x00002921, /* 23 */ +0x00002945, /* 24 */ +0x00002946, /* 25 */ +0x00002965, /* 26 */ +0x00002966, /* 27 */ +0x00003186, /* 28 */ +0x000031A6, /* 29 */ +0x00003942, /* 30 */ +0x00003982, /* 31 */ +0x000039A7, /* 32 */ +0x000039C7, /* 33 */ +0x000039E7, /* 34 */ +0x000039E8, /* 35 */ +0x000041A2, /* 36 */ +0x000041C2, /* 37 */ +0x000041E7, /* 38 */ +0x00004207, /* 39 */ +0x00004208, /* 40 */ +0x00004228, /* 41 */ +0x00004229, /* 42 */ +0x000049E3, /* 43 */ +0x000049E5, /* 44 */ +0x00004A46, /* 45 */ +0x00004A47, /* 46 */ +0x00004A48, /* 47 */ +0x00004A49, /* 48 */ +0x00004A69, /* 49 */ +0x00004A8A, /* 50 */ +0x00005228, /* 51 */ +0x00005247, /* 52 */ +0x00005287, /* 53 */ +0x0000528A, /* 54 */ +0x000052AA, /* 55 */ +0x00005A21, /* 56 */ +0x00005A43, /* 57 */ +0x00005A63, /* 58 */ +0x00005AA9, /* 59 */ +0x00005AAA, /* 60 */ +0x00005ACA, /* 61 */ +0x00005ACB, /* 62 */ +0x00005AEB, /* 63 */ +0x00006222, /* 64 */ +0x00006261, /* 65 */ +0x000062A8, /* 66 */ +0x000062C7, /* 67 */ +0x000062E8, /* 68 */ +0x000062EB, /* 69 */ +0x000062EC, /* 70 */ +0x0000630B, /* 71 */ +0x0000630C, /* 72 */ +0x0000632C, /* 73 */ +0x00006A41, /* 74 */ +0x00006B05, /* 75 */ +0x00006B28, /* 76 */ +0x00006B29, /* 77 */ +0x00006B2D, /* 78 */ +0x00006B4D, /* 79 */ +0x00006B6D, /* 80 */ +0x00006B6E, /* 81 */ +0x00006B8D, /* 82 */ +0x000072A2, /* 83 */ +0x000072E2, /* 84 */ +0x000072E5, /* 85 */ +0x00007306, /* 86 */ +0x00007329, /* 87 */ +0x0000738E, /* 88 */ +0x000073AE, /* 89 */ +0x000073AF, /* 90 */ +0x000073CF, /* 91 */ +0x00007B28, /* 92 */ +0x00007B44, /* 93 */ +0x00007B48, /* 94 */ +0x00007B67, /* 95 */ +0x00007B69, /* 96 */ +0x00007BCE, /* 97 */ +0x00007BCF, /* 98 */ +0x00007BEF, /* 99 */ +0x00008323, /* 100 */ +0x00008345, /* 101 */ +0x000083AA, /* 102 */ +0x00008410, /* 103 */ +0x00008430, /* 104 */ +0x00008B02, /* 105 */ +0x00008B63, /* 106 */ +0x00008B83, /* 107 */ +0x00008B84, /* 108 */ +0x00008BA6, /* 109 */ +0x00008BC7, /* 110 */ +0x00008BEA, /* 111 */ +0x00008BEE, /* 112 */ +0x00008C51, /* 113 */ +0x00008C71, /* 114 */ +0x00009362, /* 115 */ +0x00009363, /* 116 */ +0x00009383, /* 117 */ +0x000093C5, /* 118 */ +0x000093C7, /* 119 */ +0x00009405, /* 120 */ +0x00009492, /* 121 */ +0x00009493, /* 122 */ +0x000094B2, /* 123 */ +0x00009B82, /* 124 */ +0x00009BC3, /* 125 */ +0x00009C2D, /* 126 */ +0x00009CB3, /* 127 */ +0x00009CD3, /* 128 */ +0x00009CF3, /* 129 */ +0x00009CF4, /* 130 */ +0x00009D14, /* 131 */ +0x0000A401, /* 132 */ +0x0000A403, /* 133 */ +0x0000A423, /* 134 */ +0x0000A44C, /* 135 */ +0x0000A489, /* 136 */ +0x0000A4F1, /* 137 */ +0x0000A514, /* 138 */ +0x0000A533, /* 139 */ +0x0000A534, /* 140 */ +0x0000ABE1, /* 141 */ +0x0000AC22, /* 142 */ +0x0000AC24, /* 143 */ +0x0000AC42, /* 144 */ +0x0000AC44, /* 145 */ +0x0000AC48, /* 146 */ +0x0000AC69, /* 147 */ +0x0000AC8A, /* 148 */ +0x0000ACEE, /* 149 */ +0x0000AD0A, /* 150 */ +0x0000AD2E, /* 151 */ +0x0000AD55, /* 152 */ +0x0000AD75, /* 153 */ +0x0000AD76, /* 154 */ +0x0000B423, /* 155 */ +0x0000B441, /* 156 */ +0x0000B444, /* 157 */ +0x0000B464, /* 158 */ +0x0000B484, /* 159 */ +0x0000B4A3, /* 160 */ +0x0000B4C4, /* 161 */ +0x0000B533, /* 162 */ +0x0000B596, /* 163 */ +0x0000B5B6, /* 164 */ +0x0000BC65, /* 165 */ +0x0000BC83, /* 166 */ +0x0000BC84, /* 167 */ +0x0000BCC9, /* 168 */ +0x0000BD03, /* 169 */ +0x0000BD2A, /* 170 */ +0x0000BD54, /* 171 */ +0x0000BD97, /* 172 */ +0x0000BDB5, /* 173 */ +0x0000BDD7, /* 174 */ +0x0000BDD8, /* 175 */ +0x0000BDF7, /* 176 */ +0x0000BE19, /* 177 */ +0x0000C4A2, /* 178 */ +0x0000C4C2, /* 179 */ +0x0000C4C3, /* 180 */ +0x0000C5CE, /* 181 */ +0x0000C5F9, /* 182 */ +0x0000C618, /* 183 */ +0x0000C61A, /* 184 */ +0x0000C638, /* 185 */ +0x0000CCE2, /* 186 */ +0x0000CD03, /* 187 */ +0x0000CD43, /* 188 */ +0x0000CD61, /* 189 */ +0x0000CD88, /* 190 */ +0x0000CE39, /* 191 */ +0x0000CE58, /* 192 */ +0x0000CE59, /* 193 */ +0x0000CE79, /* 194 */ +0x0000CE7A, /* 195 */ +0x0000CE7B, /* 196 */ +0x0000CE9A, /* 197 */ +0x0000D502, /* 198 */ +0x0000D522, /* 199 */ +0x0000D62C, /* 200 */ +0x0000D69A, /* 201 */ +0x0000D69B, /* 202 */ +0x0000D6BA, /* 203 */ +0x0000DD23, /* 204 */ +0x0000DD41, /* 205 */ +0x0000DD81, /* 206 */ +0x0000DDA1, /* 207 */ +0x0000DDA4, /* 208 */ +0x0000DE9C, /* 209 */ +0x0000DEDB, /* 210 */ +0x0000DEFB, /* 211 */ +0x0000DEFD, /* 212 */ +0x0000E5A2, /* 213 */ +0x0000E71C, /* 214 */ +0x0000E73C, /* 215 */ +0x0000EDC1, /* 216 */ +0x0000EF3E, /* 217 */ +0x0000EF5D, /* 218 */ +0x0000EF7D, /* 219 */ +0x0000EF7E, /* 220 */ +0x0000EF7F, /* 221 */ +0x0000F79D, /* 222 */ +0x0000F79E, /* 223 */ +0x0000F7BE, /* 224 */ +0x0000F7BF, /* 225 */ +0x0000F7DE, /* 226 */ +0x0000FFB8, /* 227 */ +0x0000FFBF, /* 228 */ +0x0000FFDD, /* 229 */ +0x0000FFDE, /* 230 */ +0x0000FFDF, /* 231 */ +0x0000FFFB, /* 232 */ +0x0000FFFF, /* 233 */ +}; + +static const unsigned char bitmap[3060] = { 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Committed revision 2827.
and thanks!
ron
On Fri, Oct 05, 2007 at 10:43:37PM +0200, Juergen Beisert wrote:
This patch will add support for the Geode GX1/CS5530 VGA feature. Its able to set up one of five screen resolutions (sorry no autodetection at runtime, resolution is selected at buildtime) and displays a graphic in the right bottom corner (splash screen).
Nice! So this is in-LinuxBIOS VGA support? I.e. without running any VGA option ROM blob in an emulator?
I'll give it a try on my CS5530 box in a few days (no access right now).
+#if CONFIG_GX1_VIDEO == 1 +/*
- Some register descriptions that are no listed in cpu/amd/gx1def.h
- */
Would it make sense to add them to cpu/amd/gx1def.h? Probably not as they're not CPU related but VGA related?
+/*
- what colour depth should be used as default (in bpp)
- Note: Currently no other value than 16 is supported
- */
+#define COLOUR_DEPTH 16
Maybe this should be a user-visible config-option in Confib.lb too?
+/*
- Support for a few basic video modes
- Note: all modes only for CRT. The flatpanel feature is
- not supported here (due to the lack of hardware to test)
- */
+struct video_mode {
- int pixel_clock; /*<< pixel clock in Hz */
What is the '/*<<' supposed to mean?
+/* ModeLine "640x480" 31.5 640 664 704 832 480 489 491 520 -hsync -vsync */ +static const struct video_mode mode_640x480 = {
- /*
* 640x480 @ 72Hz hsync: 37.9kHz
* VESA standard mode for classic 4:3 monitors
*/
- .pixel_clock = 31500000,
- .pll_value = 0x33915801,
- .visible_pixel = 640,
- .hsync_start = 664,
- .hsync_end = 704, /* 1.27 us sync length */
- .line_length = 832, /* 26.39us */
- .visible_lines = 480,
- .vsync_start = 489,
- .vsync_end = 491,
- .picture_length = 520, /* 13.89ms */
- .sync_pol = HSYNC_LOW_POL | VSYNC_LOW_POL
Add a trailing comma here please, it's convenient if stuff is added later (you can easily forget about the comma).
+/*
- Setup the pixel PLL in the companion chip
- base: register's base address
- pll_val: pll register value to be set
- */
Please use Doxygen-style comments (not the same as the kerneldoc format). In this case:
/** * Setup the pixel PLL in the companion chip. * * @param base Register's base address. * @param pll_val PLL register value to be set. */
+static void cs5530_set_clock_frequency(void *io_base,unsigned long pll_val)
^ missing space
+{
- unsigned long reg;
u64? u32? Not sure.
Please use the types with explicit width and signedness wherever it possible and whereever it makes sense (registers etc).
+/*
- Activate the current mode to be "visible" outside
- gx_base: GX register area
- mode: Data about the video mode to setup
- */
+static void cs5530_activate_video(void *io_base, const struct video_mode *mode) +{
- u32 val;
- val = mode->sync_pol;
- val <<= 8;
Why not this?
val = mode->sync_pol << 8;
Or maybe even
u32 val = mode->sync_pol << 8;
- writel(val | 0x0020002F, io_base + CS5530_DISPLAY_CONFIG);
+}
+/*
- This bitmap file must provide:
- int width: pixel count in one line
- int height: line count
- int colours: ount of used colour
- unsigned long colour_map[]: RGB 565 colours to be used
- unsigned char bitmap[]: index per pixel into colour_map[], width*height pixels
- */
+#include "bitmap.c"
Should be a bit more configurable later (specify filename in Config.lb or so). In v3 this should probably be handled in Kconfig.
+/*
- show a boot splash screen in the right lower corner of the screen
- swidth: screen width in pixel
- sheight: screen height in lines
- pitch: line pitch in bytes
- base: screen base address
- This routine assumes we are using a 16 bit colour depth!
- */
+static void show_boot_splash_16(u32 swidth,u32 sheight,u32 pitch,void *base) +{
- int word_count,i;
- unsigned short *adr;
- u32 xstart,ystart,x,y;
- /*
* fill the screen with the colour of the
* left top pixel in the graphic
*/
- word_count = pitch*sheight;
A few whitespace issues here and in some other places in the code, please fix that to comply with the coding guidelines.
Index: LinuxBIOSv2/src/southbridge/amd/cs5530/bitmap.c
--- /dev/null +++ LinuxBIOSv2/src/southbridge/amd/cs5530/bitmap.c @@ -0,0 +1,304 @@ +/* do not edit +This is an image of size 51 x 60 with 234 colours */
How was this image generated? What's the source format?
Please also attach a license to it if you created it. If you didn't we must get permission from the author, I guess (and/or state the license which applies to it).
I can fix up a few of the cosmetic issues in the repository right away if you want, or I'll wait for another patch. Please let me know...
Uwe.
Hi Uwe,
On Friday 05 October 2007 23:50, Uwe Hermann wrote:
On Fri, Oct 05, 2007 at 10:43:37PM +0200, Juergen Beisert wrote:
This patch will add support for the Geode GX1/CS5530 VGA feature. Its able to set up one of five screen resolutions (sorry no autodetection at runtime, resolution is selected at buildtime) and displays a graphic in the right bottom corner (splash screen).
Nice! So this is in-LinuxBIOS VGA support? I.e. without running any VGA option ROM blob in an emulator?
This "driver" really knows the hardware, so it does not need any help from any kind of SMM.
I'll give it a try on my CS5530 box in a few days (no access right now).
Visit my BCOM WINNET100 Tutorial, scroll to the buttom of this document and download the Board Support Package. Extract it, you will need some patches to use the VGA console feature within Linux. Also for the Linux kernel you will need a specific console driver for the GX1, as the generic driver expects some help from the SMM. See patches/linux-2.6.22/generic for the whole patch stack, apply it to a fresh 2.6.22 kernel and build it with the igel316-kernelconfig.target as its .config. Also if you like to run X on it, you will need a special driver. You can find it in the BSP in the local_src/xf86-video-geode_gx1 directory.
+#if CONFIG_GX1_VIDEO == 1 +/*
- Some register descriptions that are no listed in cpu/amd/gx1def.h
- */
Would it make sense to add them to cpu/amd/gx1def.h? Probably not as they're not CPU related but VGA related?
To be discussed. As this CPU and the chipset is one silicon (Note: only VGA interface support is in the companion chip, but the graphic feature is part of the Geode device!) you can put both defines together.
+/*
- what colour depth should be used as default (in bpp)
- Note: Currently no other value than 16 is supported
- */
+#define COLOUR_DEPTH 16
Maybe this should be a user-visible config-option in Confib.lb too?
Makes no sense yet, as my routines do not support the 8 bit CLUT mode. And the Geode hardware only supports 16 and 8 bit mode. Nothing else.
+/*
- Support for a few basic video modes
- Note: all modes only for CRT. The flatpanel feature is
- not supported here (due to the lack of hardware to test)
- */
+struct video_mode {
- int pixel_clock; /*<< pixel clock in Hz */
What is the '/*<<' supposed to mean?
Doxygen style. I like it, but I was not sure if it will be accepted in LBv2. But it seems I forgot it to remove...
+/* ModeLine "640x480" 31.5 640 664 704 832 480 489 491 520 -hsync -vsync */ +static const struct video_mode mode_640x480 = {
- /*
* 640x480 @ 72Hz hsync: 37.9kHz
* VESA standard mode for classic 4:3 monitors
*/
- .pixel_clock = 31500000,
- .pll_value = 0x33915801,
- .visible_pixel = 640,
- .hsync_start = 664,
- .hsync_end = 704, /* 1.27 us sync length */
- .line_length = 832, /* 26.39us */
- .visible_lines = 480,
- .vsync_start = 489,
- .vsync_end = 491,
- .picture_length = 520, /* 13.89ms */
- .sync_pol = HSYNC_LOW_POL | VSYNC_LOW_POL
Add a trailing comma here please, it's convenient if stuff is added later (you can easily forget about the comma).
IMHO: I hate this leading comma. But all right, I will add it for you.
+/*
- Setup the pixel PLL in the companion chip
- base: register's base address
- pll_val: pll register value to be set
- */
Please use Doxygen-style comments (not the same as the kerneldoc format). In this case:
I'm up for it!
/**
- Setup the pixel PLL in the companion chip.
- @param base Register's base address.
- @param pll_val PLL register value to be set.
*/
+static void cs5530_set_clock_frequency(void *io_base,unsigned long pll_val)
^ missing space
Ohhh, the spaces, always the spaces...
+{
- unsigned long reg;
u64? u32? Not sure.
Please use the types with explicit width and signedness wherever it possible and whereever it makes sense (registers etc).
Hmm, all right.
+/*
- Activate the current mode to be "visible" outside
- gx_base: GX register area
- mode: Data about the video mode to setup
- */
+static void cs5530_activate_video(void *io_base, const struct video_mode *mode) +{
- u32 val;
- val = mode->sync_pol;
- val <<= 8;
Why not this?
val = mode->sync_pol << 8;
Or maybe even
u32 val = mode->sync_pol << 8;
Hmmm, mode->sync_pol is an signed int. So shift operations are a bad idea?
- writel(val | 0x0020002F, io_base + CS5530_DISPLAY_CONFIG);
+}
+/*
- This bitmap file must provide:
- int width: pixel count in one line
- int height: line count
- int colours: ount of used colour
- unsigned long colour_map[]: RGB 565 colours to be used
- unsigned char bitmap[]: index per pixel into colour_map[],
width*height pixels + */ +#include "bitmap.c"
Should be a bit more configurable later (specify filename in Config.lb or so). In v3 this should probably be handled in Kconfig.
Yeees. This bitmap is a gimmick only. I was sure everyone would reject it on this list.
+/*
- show a boot splash screen in the right lower corner of the screen
- swidth: screen width in pixel
- sheight: screen height in lines
- pitch: line pitch in bytes
- base: screen base address
- This routine assumes we are using a 16 bit colour depth!
- */
+static void show_boot_splash_16(u32 swidth,u32 sheight,u32 pitch,void *base) +{
- int word_count,i;
- unsigned short *adr;
- u32 xstart,ystart,x,y;
- /*
* fill the screen with the colour of the
* left top pixel in the graphic
*/
- word_count = pitch*sheight;
A few whitespace issues here and in some other places in the code, please fix that to comply with the coding guidelines.
Ack.
Index: LinuxBIOSv2/src/southbridge/amd/cs5530/bitmap.c
--- /dev/null +++ LinuxBIOSv2/src/southbridge/amd/cs5530/bitmap.c @@ -0,0 +1,304 @@ +/* do not edit +This is an image of size 51 x 60 with 234 colours */
How was this image generated? What's the source format?
Please also attach a license to it if you created it. If you didn't we must get permission from the author, I guess (and/or state the license which applies to it).
Gimmick only. This graphic file is autogenerated with a small program that converts xpm into C code. This one shows one of the icons from the linuxbios website (one of the chips with the penguin in it). So I have no clue what kind of license this file should have. The small converter tool is part of my BSP. Refer in local_src/xpm_converter for the source.
I can fix up a few of the cosmetic issues in the repository right away if you want, or I'll wait for another patch. Please let me know...
I will resend the patch.
Juergen
On 10/6/07, Juergen Beisert juergen127@kreuzholzen.de wrote:
I will resend the patch.
send a patch to the repo, I committed your patch too soon it seems :-)
I guess I got excited about vga!
ron
On Sat, Oct 06, 2007 at 12:21:08PM +0200, Juergen Beisert wrote:
Nice! So this is in-LinuxBIOS VGA support? I.e. without running any VGA option ROM blob in an emulator?
This "driver" really knows the hardware, so it does not need any help from any kind of SMM.
Very nice!
I'll give it a try on my CS5530 box in a few days (no access right now).
Visit my BCOM WINNET100 Tutorial, scroll to the buttom of this document and download the Board Support Package. Extract it, you will need some patches to use the VGA console feature within Linux. Also for the Linux kernel you will need a specific console driver for the GX1, as the generic driver expects some help from the SMM. See patches/linux-2.6.22/generic for the whole patch stack, apply it to a fresh 2.6.22 kernel and build it with the igel316-kernelconfig.target as its .config. Also if you like to run X on it,
Is this scheduled to go into the mainline kernel one day? Would be great!
you will need a special driver. You can find it in the BSP in the local_src/xf86-video-geode_gx1 directory.
Same here, will it be merged into xorg?
+#if CONFIG_GX1_VIDEO == 1 +/*
- Some register descriptions that are no listed in cpu/amd/gx1def.h
- */
Would it make sense to add them to cpu/amd/gx1def.h? Probably not as they're not CPU related but VGA related?
To be discussed. As this CPU and the chipset is one silicon (Note: only VGA interface support is in the companion chip, but the graphic feature is part of the Geode device!) you can put both defines together.
Hm, ok, it's fine either way, I guess.
+/*
- what colour depth should be used as default (in bpp)
- Note: Currently no other value than 16 is supported
- */
+#define COLOUR_DEPTH 16
Maybe this should be a user-visible config-option in Confib.lb too?
Makes no sense yet, as my routines do not support the 8 bit CLUT mode. And the Geode hardware only supports 16 and 8 bit mode. Nothing else.
Yep, ok. Should be a config option as soon as 8 bit CLUT mode works.
+/*
- Support for a few basic video modes
- Note: all modes only for CRT. The flatpanel feature is
- not supported here (due to the lack of hardware to test)
- */
+struct video_mode {
- int pixel_clock; /*<< pixel clock in Hz */
What is the '/*<<' supposed to mean?
Doxygen style. I like it, but I was not sure if it will be accepted in LBv2. But it seems I forgot it to remove...
Ah, so another way to write /** Foo */ ? If so, let's please use the standard /** Foo */ notation as in the rest of the code.
- u32 val;
- val = mode->sync_pol;
- val <<= 8;
Why not this?
val = mode->sync_pol << 8;
Or maybe even
u32 val = mode->sync_pol << 8;
Hmmm, mode->sync_pol is an signed int. So shift operations are a bad idea?
Hm, maybe. But why is sync_pol not u32 (or so) in the first place then? Does it _have_ to be signed?
- writel(val | 0x0020002F, io_base + CS5530_DISPLAY_CONFIG);
+}
+/*
- This bitmap file must provide:
- int width: pixel count in one line
- int height: line count
- int colours: ount of used colour
- unsigned long colour_map[]: RGB 565 colours to be used
- unsigned char bitmap[]: index per pixel into colour_map[],
width*height pixels + */ +#include "bitmap.c"
Should be a bit more configurable later (specify filename in Config.lb or so). In v3 this should probably be handled in Kconfig.
Yeees. This bitmap is a gimmick only. I was sure everyone would reject it on this list.
No, not rejected, it's fine. It should just be a config option.
Index: LinuxBIOSv2/src/southbridge/amd/cs5530/bitmap.c
--- /dev/null +++ LinuxBIOSv2/src/southbridge/amd/cs5530/bitmap.c @@ -0,0 +1,304 @@ +/* do not edit +This is an image of size 51 x 60 with 234 colours */
How was this image generated? What's the source format?
Please also attach a license to it if you created it. If you didn't we must get permission from the author, I guess (and/or state the license which applies to it).
Gimmick only. This graphic file is autogenerated with a small program that converts xpm into C code.
Doesn't gimp have a similar option, too? If your code could handle the output of that gimp plugin (it's shipped per default, I think) that would be a great and easy way for users to create their own icons without requiring extra command line tools.
This one shows one of the icons from the linuxbios website (one of the chips with the penguin in it). So I have no clue what kind of license this file should have.
The small icons in the wiki were created by me and are GPL'd (version 2 or later). I still don't know the license of the penguin logo (which is part of one of the icons) but the rest is definately all GPL'd.
Thanks, Uwe.
On 07/10/07 23:13 +0200, Uwe Hermann wrote:
On Sat, Oct 06, 2007 at 12:21:08PM +0200, Juergen Beisert wrote:
Nice! So this is in-LinuxBIOS VGA support? I.e. without running any VGA option ROM blob in an emulator?
This "driver" really knows the hardware, so it does not need any help from any kind of SMM.
Very nice!
I'll give it a try on my CS5530 box in a few days (no access right now).
Visit my BCOM WINNET100 Tutorial, scroll to the buttom of this document and download the Board Support Package. Extract it, you will need some patches to use the VGA console feature within Linux. Also for the Linux kernel you will need a specific console driver for the GX1, as the generic driver expects some help from the SMM. See patches/linux-2.6.22/generic for the whole patch stack, apply it to a fresh 2.6.22 kernel and build it with the igel316-kernelconfig.target as its .config. Also if you like to run X on it,
Is this scheduled to go into the mainline kernel one day? Would be great!
Please do submit it - CC to info-linux@geode.amd.com.
you will need a special driver. You can find it in the BSP in the local_src/xf86-video-geode_gx1 directory.
Same.
Jordan
Hi Uwe,
On Sunday 07 October 2007 23:13, Uwe Hermann wrote:
Visit my BCOM WINNET100 Tutorial, scroll to the buttom of this document and download the Board Support Package. Extract it, you will need some patches to use the VGA console feature within Linux. Also for the Linux kernel you will need a specific console driver for the GX1, as the generic driver expects some help from the SMM. See patches/linux-2.6.22/generic for the whole patch stack, apply it to a fresh 2.6.22 kernel and build it with the igel316-kernelconfig.target as its .config. Also if you like to run X on it,
Is this scheduled to go into the mainline kernel one day? Would be great!
I think "no". Last time I tried, I got this answer:
On Friday 24 November 2006 12:41, Alan wrote:
[...] Given the choice between LinuxBIOS and the rest of the world then the rest of the world needs to win. The 5530 is absent from the IRQ routing table because it varied by system what the right answer was. [...]
Everything I do for GX1 is too specific for ways to old hardware (and mainline expects a real BIOS, not LinuxBIOS).
you will need a special driver. You can find it in the BSP in the local_src/xf86-video-geode_gx1 directory.
Same here, will it be merged into xorg?
I'm not an Xorg expert. So this code is unfinished and more of type "works for me". But on the other hand same as with the kernel: Too specific for ways to old hardware...
+/*
- Support for a few basic video modes
- Note: all modes only for CRT. The flatpanel feature is
- not supported here (due to the lack of hardware to test)
- */
+struct video_mode {
- int pixel_clock; /*<< pixel clock in Hz */
What is the '/*<<' supposed to mean?
Doxygen style. I like it, but I was not sure if it will be accepted in LBv2. But it seems I forgot it to remove...
Ah, so another way to write /** Foo */ ? If so, let's please use the standard /** Foo */ notation as in the rest of the code.
I will create a patch. I only know the /*<< notation for structure members. Does the /** really works for structure members?
Index: LinuxBIOSv2/src/southbridge/amd/cs5530/bitmap.c
--- /dev/null +++ LinuxBIOSv2/src/southbridge/amd/cs5530/bitmap.c @@ -0,0 +1,304 @@ +/* do not edit +This is an image of size 51 x 60 with 234 colours */
How was this image generated? What's the source format?
Please also attach a license to it if you created it. If you didn't we must get permission from the author, I guess (and/or state the license which applies to it).
Gimmick only. This graphic file is autogenerated with a small program that converts xpm into C code.
Doesn't gimp have a similar option, too? If your code could handle the output of that gimp plugin (it's shipped per default, I think) that would be a great and easy way for users to create their own icons without requiring extra command line tools.
Sorry, I don't know Gimp and its many features. Can you generate such a Gimp output from a small picture and send it offline? I will create a patch to supports Gimp's output. But on the other hand this should be more generic as it is not a GX1 special feature to show a splash screen.
Juergen
On Mon, Oct 08, 2007 at 09:59:07AM +0200, Juergen Beisert wrote:
Is this scheduled to go into the mainline kernel one day? Would be great!
I think "no". Last time I tried, I got this answer:
On Friday 24 November 2006 12:41, Alan wrote:
[...] Given the choice between LinuxBIOS and the rest of the world then the rest of the world needs to win. The 5530 is absent from the IRQ routing table because it varied by system what the right answer was. [...]
Everything I do for GX1 is too specific for ways to old hardware (and mainline expects a real BIOS, not LinuxBIOS).
That's unfortunate, but maybe you can just retry and/or maybe there's a way to make it work on both LinuxBIOS _and_ a proprietary BIOS?
you will need a special driver. You can find it in the BSP in the local_src/xf86-video-geode_gx1 directory.
Same here, will it be merged into xorg?
I'm not an Xorg expert. So this code is unfinished and more of type "works for me". But on the other hand same as with the kernel: Too specific for ways to old hardware...
This one is probably more likely to make it into mainline. I see no reason for the xorg developers to reject the driver. The hardware being a bit old is surely not a reason. This was a very popular chipset for set-top-boxes and thin clients and they're still readily available on ebay for almost no money...
What is the '/*<<' supposed to mean?
Doxygen style. I like it, but I was not sure if it will be accepted in LBv2. But it seems I forgot it to remove...
Ah, so another way to write /** Foo */ ? If so, let's please use the standard /** Foo */ notation as in the rest of the code.
I will create a patch. I only know the /*<< notation for structure members. Does the /** really works for structure members?
No, doesn't seem so. It works when used like this:
/** Blah */ int foobar;
but not like this:
int foobar; /** Blah */
Interestingly, you can either use /*<< or /**<, both seems to work. Is there any difference?
Anyway, I think using /*<< for struct members etc. is fine. For the rest let's use /**, though.
Gimmick only. This graphic file is autogenerated with a small program that converts xpm into C code.
Doesn't gimp have a similar option, too? If your code could handle the output of that gimp plugin (it's shipped per default, I think) that would be a great and easy way for users to create their own icons without requiring extra command line tools.
Sorry, I don't know Gimp and its many features. Can you generate such a Gimp output from a small picture and send it offline? I will create a patch to supports Gimp's output.
Here's an example.
$ wget http://linuxbios.org/images/d/d3/Chip_lb.png $ gimp Chip_lb.png -> Right-click into the image -> Save as -> C source file
Output:
/* GIMP RGBA C-Source image dump (Chip_lb.c) */
static const struct { unsigned int width; unsigned int height; unsigned int bytes_per_pixel; /* 3:RGB, 4:RGBA */ unsigned char pixel_data[65 * 75 * 4 + 1]; } gimp_image = { 65, 75, 4, "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\356\356\356\1\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\1\0\0\0\1\0\0\0\1\0\0\0\1\0\0\0\1\0\0\0\1\0\0\0\1\0\0\0\1\0\0\0\1\0" "\0\0\1\0\0\0\1\0\0\0\1\0\0\0\1\0\0\0\1\0\0\0\1\0\0\0\1\0\0\0\1\0\0\0\1\0" "\0\0\1\0\0\0\1\0\0\0\1\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\355\355\355\1\373\373\373\37\367\367\367u" "\206\206\206\227\177\177\177B\0\0\0\2\347\347\347\223\352\352\352\206www" "\244\0\0\0\4\350\350\350i\354\354\354\273\254\254\254\310\210\210\210'\227" "\227\227\13\362\362\362\273\346\346\346ozzz]\0\0\0\4\367\367\367\211\350" "\350\350b\272\272\272\177\0\0\0\3\363\363\3632\352\352\352o\317\317\317N" "\205\205\205\34\274\274\274\20\340\340\340\36\203\203\2039+++\3\0\0\0\2\0" "\0\0\2\0\0\0\2\0\0\0\1\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\235\235\235\32\214\214\214*\231\231\2314\343" "\343\343w\377\377\377\377\200\200\200\372lll\211\203\203\2032\346\346\346" "\315\377\377\377\377VVV\260\204\204\2042uuu\214\377\377\377\377\332\332\332" "\322___+tttF\341\341\341\371\377\377\377\377jjj[888\22uuu\336\377\377\377" "\377\343\343\343\261\0\0\0\12nnn\216\267\267\267\362\376\376\376\377{{{." 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"\0\0\0\0\0\0\231\231\231\2\177\177\177\333|||\377~~~\377sss\377GGG\377\227" "\227\227\377///\377AAA\377KKK\377HHH\377|||\377\22\22\22\377lll\377\32\32" "\32\377lll\377CCC\377888\377666\377OOO\377zzz\377\36\36\36\377RRR\377\31" "\31\31\377\204\204\204\377HHH\377III\377'''\377[[[\377\204\204\204\377##" "#\377EEE\377\246\246\246\377[[[\376\34\34\34\377PPP\377999\277'''8\0\0\0" "\33\0\0\0\24\0\0\0\15\0\0\0\7\0\0\0\4\0\0\0\2\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\225" "\225\225\14zzz\377zzz\377~~~\377}}}\377>>>\377TTT\377'''\377@@@\377QQQ\377" "222\377CCC\376\20\20\20\377eee\377"""\377DDD\376&&&\376;;;\377666\377" "===\377<<<\376\21\21\21\377OOO\377\36\36\36\377DDD\377\40\40\40\377:::\377" "!!!\377>>>\377???\377\31\31\31\377<<<\377aaa\377444\377\13\13\13\377XXX\377" "GGG\377BBB\335\30\30\30@\0\0\0&\0\0\0\32\0\0\0\21\0\0\0\11\0\0\0\4\0\0\0" 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".\377<<<\377:::\377999\377<<<\377666\377000\377EEE\377445\377#$'\377\276" "\272\277\377\274\261\270\377\270\253\243\377\275\266\254\377\330\323\340" "\377\356\357\371\377\340\342\347\377`_f\377\6\6\4\377\7\10\4\377\20\21\17" "\377\27\27\26\377\2\2\2\377\2\2\2\377\2\2\2\377\3\3\3\377777\377000\377)" "))\377(((\377'''\377***\377\31\31\31\377...\377444\377JJJ\377KKK\377>>>\360" "$$$\326\0\0\0\271\0\0\0\245\0\0\0\210\0\0\0e\0\0\0B\0\0\0$\0\0\0\21\0\0\0" "\6\0\0\0\2\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\1\343\343\343k\303\303\303\352\251" "\251\251\367zzz\377>>>\377,,,\377\21\21\21\377&&&\377<<<\377111\377999\377" "A>>\377\11\14\13\377vz|\377\244\246\237\377\314\320\327\377\324\320\332\377" "\356\357\366\377\361\370\361\377\310\312\303\377\216\215\217\377\227\227" "\227\377\11\12\6\377\10\10\6\377\5\4\10\377\1\1\3\377\1\1\1\377\2\2\2\377" "\2\2\2\377\23\23\23\377(((\377555\377000\377)))\377)))\377)))\377\32\32\32" "\377___\377\343\343\343\377\377\377\377\377\335\335\335\377vvv\377---\337" "\0\0\0\271\0\0\0\245\0\0\0\210\0\0\0d\0\0\0A\0\0\0$\0\0\0\21\0\0\0\6\0\0" "\0\2\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\1\224\224\224a\277\277\277\377\375\375" "\375\377\272\272\272\377\214\214\214\377KKK\376\35\35\35\377444\377<<<\377" "<<<\377\34\34\34\377\14\14\14\377999\377\327\327\327\377\326\326\326\377" "\365\365\365\377\373\372\374\377\374\375\371\377\360\361\354\377\256\256" "\257\377\220\220\222\377\301\301\301\377113\377\6\5\11\377\4\3\10\377\1\0" "\2\377\0\0\0\377\2\2\2\377\4\4\4\377---\377"""\377"""\377;;;\37700" "0\377***\377***\377\26\26\26\377NNN\377\202\202\202\377{{{\377GGG\377..." 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"$$$\377!!!\377"""\377\36\36\36\377\36\36\36\377\37\37\37\377"""\377" "!!!\377!!!\377\34\34\34\377\35\35\35\377\36\36\36\377///\377"""\377MM" "M\377\332\332\332\377\327\327\327\377ttt\377DDD\377555\364\0\0\0\272\0\0" "\0\246\0\0\0\210\0\0\0d\0\0\0@\0\0\0#\0\0\0\20\0\0\0\6\0\0\0\2\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" "\0\0\0\0\0\0\0\0\0\0\1\234\234\234i\275\275\275\375\356\356\356\377\267\267" "\267\377\204\204\204\377OOO\377\31\31\31\377333\377CCC\377888\377333\377" "---\377&&&\377)))\377)))\377000\377$$$\377***\377###\377&&&\377)))\377\36" "\36\36\377\37\37\37\377"""\377###\377\36\36\36\377\35\35\35\377\37\37" "\37\377\40\40\40\377\36\36\36\377\33\33\33\377\37\37\37\377\40\40\40\377" """"\377)))\377333\377"""\377+++\377!!!\377\3\3\3\377\5\5\5\377\17\17" "\17\377\11\11\11\377\11\11\11\314\0\0\0\246\0\0\0\212\0\0\0f\0\0\0B\0\0\0" "$\0\0\0\21\0\0\0\6\0\0\0\2\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0" 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HTH, Uwe.
Uwe,
On Monday 08 October 2007 12:11, Uwe Hermann wrote:
you will need a special driver. You can find it in the BSP in the local_src/xf86-video-geode_gx1 directory.
Same here, will it be merged into xorg?
I'm not an Xorg expert. So this code is unfinished and more of type "works for me". But on the other hand same as with the kernel: Too specific for ways to old hardware...
This one is probably more likely to make it into mainline. I see no reason for the xorg developers to reject the driver. The hardware being a bit old is surely not a reason. This was a very popular chipset for set-top-boxes and thin clients and they're still readily available on ebay for almost no money...
I think no chance for mainline. The original driver relies on SMM, my Xorg driver relies on my console driver (for example to handle the scratch pad RAM, needed for hardware acceleration). How could one handle this?
In my daily work I must handle tons of patch stacks. So the patch stacks in my BSP are no problem (at least for me), I can life with it. And with my BSP I give everyone a chance to use them without the knowledge what's going on. IMHO someone who is able to configure LinuxBIOS and replace his flash content is also able to handle some patches for his kernel. =8-)
Gimmick only. This graphic file is autogenerated with a small program that converts xpm into C code.
Doesn't gimp have a similar option, too? If your code could handle the output of that gimp plugin (it's shipped per default, I think) that would be a great and easy way for users to create their own icons without requiring extra command line tools.
Sorry, I don't know Gimp and its many features. Can you generate such a Gimp output from a small picture and send it offline? I will create a patch to supports Gimp's output.
Here's an example.
$ wget http://linuxbios.org/images/d/d3/Chip_lb.png $ gimp Chip_lb.png -> Right-click into the image -> Save as -> C source file
Output:
/* GIMP RGBA C-Source image dump (Chip_lb.c) */
static const struct { unsigned int width; unsigned int height; unsigned int bytes_per_pixel; /* 3:RGB, 4:RGBA */ unsigned char pixel_data[65 * 75 * 4 + 1]; } gimp_image = { 65, 75, 4,
Uhhh, it uses RGB values for each pixel. We can use it, no problem, but every bitmap will be very large. Is there also an index based format supported? With a colour look up table (like my format)?
Juergen
On 08/10/07 12:41 +0200, Juergen Beisert wrote:
Uwe,
On Monday 08 October 2007 12:11, Uwe Hermann wrote:
you will need a special driver. You can find it in the BSP in the local_src/xf86-video-geode_gx1 directory.
Same here, will it be merged into xorg?
I'm not an Xorg expert. So this code is unfinished and more of type "works for me". But on the other hand same as with the kernel: Too specific for ways to old hardware...
This one is probably more likely to make it into mainline. I see no reason for the xorg developers to reject the driver. The hardware being a bit old is surely not a reason. This was a very popular chipset for set-top-boxes and thin clients and they're still readily available on ebay for almost no money...
I think no chance for mainline. The original driver relies on SMM, my Xorg driver relies on my console driver (for example to handle the scratch pad RAM, needed for hardware acceleration). How could one handle this?
Well, if we can see the patches, then we can make that assessment. Please, send the patchset to info-linux@geode.amd.com so we can see what you've done.
Jordan
On Friday 05 October 2007 23:50, Uwe Hermann wrote:
I can fix up a few of the cosmetic issues in the repository right away if you want, or I'll wait for another patch. Please let me know...
From: Juergen Beisert juergen127@kreuzholzen.de
This patch will fix some issues with spaces in the code and Doxygen style documentation. I hope I found all missed spaces... Painting the splash graphic is now ifdef'ed as Uwe mentioned.
Patch is against LinuxBIOSv2, revision of 2007-10-06.
Signed-off-by: Juergen Beisert juergen127@kreuzholzen.de
config/Options.lb | 6 southbridge/amd/cs5530/cs5530_vga.c | 227 ++++++++++++++++++++---------------- 2 files changed, 137 insertions(+), 96 deletions(-)
---
Index: LinuxBIOSv2/src/config/Options.lb =================================================================== --- LinuxBIOSv2.orig/src/config/Options.lb +++ LinuxBIOSv2/src/config/Options.lb @@ -1016,6 +1016,12 @@ define CONFIG_VIDEO_MB comment "Integrated graphics with UMA has dynamic setup" end
+define CONFIG_SPLASH_GRAPHIC + default 0 + export used + comment "Paint a splash screen" +end + define CONFIG_GX1_VIDEO default 0 export used Index: LinuxBIOSv2/src/southbridge/amd/cs5530/cs5530_vga.c =================================================================== --- LinuxBIOSv2.orig/src/southbridge/amd/cs5530/cs5530_vga.c +++ LinuxBIOSv2/src/southbridge/amd/cs5530/cs5530_vga.c @@ -13,11 +13,22 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA + */ + +/** + * @brief Activate the VGA feature in a Geode GX1 based system with one + * of five possible VESA modes: VGA, SVGA, XGA, 4:3 SXGA and 5:4 SXGA. + * Also it is prepared to display a splash screen. * - * Purpose: - * Activate the VGA feature in a Geode GX1 based system with one of five - * possible VESA modes: VGA, SVGA, XGA, 4:3 SXGA and 5:4 SXGA. Also it is - * prepared to display a splash screen. + * In a Geode GX1 environment the companion CS5530 is the VGA + * interface only. It contains a PLL for pixel clock generation, + * DACs to generate the analogue RGB signals, drivers for HSYNC + * and VSYNC and drivers for a digital flatpanel. + * The graphic feature itself (framebuffer, acceleration unit) + * is not part of this device. It is part of the CPU device. + * But both depend on each other, we cannot divide them into + * different drivers. So this driver is not only a CS5530 driver, + * it is also a Geode GX1 chipset graphic driver. */ #include <arch/io.h> #include <device/device.h> @@ -52,13 +63,13 @@ #define DC_TIMING_CFG 0x8308 #define DC_OUTPUT_CFG 0x830C
-/* +/** * what colour depth should be used as default (in bpp) * Note: Currently no other value than 16 is supported */ #define COLOUR_DEPTH 16
-/* +/** * Support for a few basic video modes * Note: all modes only for CRT. The flatpanel feature is * not supported here (due to the lack of hardware to test) @@ -67,33 +78,34 @@ struct video_mode { int pixel_clock; /*<< pixel clock in Hz */ unsigned long pll_value; /*<< pll register value for this clock */
- int visible_pixel; - int hsync_start; - int hsync_end; - int line_length; - - int visible_lines; - int vsync_start; - int vsync_end; - int picture_length; + int visible_pixel; /*<< visible pixels in one line */ + int hsync_start; /*<< start of hsync behind visible pixels */ + int hsync_end; /*<< end of hsync behind its start */ + int line_length; /*<< whole line length */ + + int visible_lines; /*<< visible lines on screen */ + int vsync_start; /*<< vsync start behind last visible line */ + int vsync_end; /*<< end of vsync behind its start */ + int picture_length; /*<< whole screen length */
int sync_pol; /*<< 0: low, 1: high, bit 0 hsync, bit 1 vsync */ };
/* - * values for .sync_pol + * values for .sync_pol in struct video_mode */ #define HSYNC_HIGH_POL 0 #define HSYNC_LOW_POL 1 #define VSYNC_HIGH_POL 0 #define VSYNC_LOW_POL 2
-/* ModeLine "640x480" 31.5 640 664 704 832 480 489 491 520 -hsync -vsync */ +/** + * 640x480 @ 72Hz hsync: 37.9kHz + * VESA standard mode for classic 4:3 monitors + * Copied from X11: + * ModeLine "640x480" 31.5 640 664 704 832 480 489 491 520 -hsync -vsync + */ static const struct video_mode mode_640x480 = { - /* - * 640x480 @ 72Hz hsync: 37.9kHz - * VESA standard mode for classic 4:3 monitors - */ .pixel_clock = 31500000, .pll_value = 0x33915801,
@@ -107,15 +119,16 @@ static const struct video_mode mode_640x .vsync_end = 491, .picture_length = 520, /* 13.89ms */
- .sync_pol = HSYNC_LOW_POL | VSYNC_LOW_POL + .sync_pol = HSYNC_LOW_POL | VSYNC_LOW_POL, };
-/* ModeLine "800x600" 50.0 800 856 976 1040 600 637 643 666 +hsync +vsync */ +/** + * 800x600 @ 72Hz hsync: 48.1kHz + * VESA standard mode for classic 4:3 monitors + * Copied from X11: + * ModeLine "800x600" 50.0 800 856 976 1040 600 637 643 666 +hsync +vsync + */ static const struct video_mode mode_800x600 = { - /* - * 800x600 @ 72Hz hsync: 48.1kHz - * VESA standard mode for classic 4:3 monitors - */ .pixel_clock = 50000000, .pll_value = 0x23088801,
@@ -129,15 +142,16 @@ static const struct video_mode mode_800x .vsync_end = 643, .picture_length = 666, /* 13.89ms */
- .sync_pol = HSYNC_HIGH_POL | VSYNC_HIGH_POL + .sync_pol = HSYNC_HIGH_POL | VSYNC_HIGH_POL, };
-/* ModeLine "1024x768" 75.0 1024 1048 1184 1328 768 771 777 806 -hsync -vsync */ +/** + * 1024x768 @ 70Hz (VESA) hsync: 56.5kHz + * Standard mode for classic 4:3 monitors + * Copied from X11: + * ModeLine "1024x768" 75.0 1024 1048 1184 1328 768 771 777 806 -hsync -vsync + */ static const struct video_mode mode_1024x768 = { - /* - * 1024x768 @ 70Hz (VESA) hsync: 56.5kHz - * Standard mode for classic 4:3 monitors - */ .pixel_clock = 75000000, .pll_value = 0x37E22801,
@@ -151,15 +165,16 @@ static const struct video_mode mode_1024 .vsync_end = 777, .picture_length = 806, /* 14.3us */
- .sync_pol = HSYNC_LOW_POL | VSYNC_LOW_POL + .sync_pol = HSYNC_LOW_POL | VSYNC_LOW_POL, };
-/* ModeLine "1280x960" 108.0 1280 1376 1488 1800 960 961 964 1000 +hsync +vsync */ +/** + * 1280x960 @ 60Hz (VESA) hsync: 60.0kHz + * Mode for classic 4:3 monitors + * Copied from X11: + * ModeLine "1280x960" 108.0 1280 1376 1488 1800 960 961 964 1000 +hsync +vsync + */ static const struct video_mode mode_1280x960 = { - /* - * 1280x960 @ 60Hz (VESA) hsync: 60.0kHz - * Mode for classic 4:3 monitors - */ .pixel_clock = 108000000, .pll_value = 0x2710C805,
@@ -173,15 +188,16 @@ static const struct video_mode mode_1280 .vsync_end = 964, .picture_length = 1000, /* 16.67ms */
- .sync_pol = HSYNC_HIGH_POL | VSYNC_HIGH_POL + .sync_pol = HSYNC_HIGH_POL | VSYNC_HIGH_POL, };
-/* ModeLine "1280x1024" 108.0 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync */ +/** + * 1280x1024 @ 60Hz (VESA) hsync: 64.0kHz + * Mode for modern 5:4 flat screens + * Copied from X11: + * ModeLine "1280x1024" 108.0 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync + */ static const struct video_mode mode_1280x1024 = { - /* - * 1280x1024 @ 60Hz (VESA) hsync: 64.0kHz - * Mode for modern 5:4 flat screens - */ .pixel_clock = 108000000, .pll_value = 0x2710C805,
@@ -195,11 +211,11 @@ static const struct video_mode mode_1280 .vsync_end = 1028, .picture_length = 1066,
- .sync_pol = HSYNC_HIGH_POL | VSYNC_HIGH_POL + .sync_pol = HSYNC_HIGH_POL | VSYNC_HIGH_POL, };
-/* - * a few supported common modes +/** + * List of supported common modes */ static const struct video_mode *modes[] = { &mode_640x480, /* CONFIG_GX1_VIDEOMODE = 0 */ @@ -214,12 +230,14 @@ static const struct video_mode *modes[] # error Requested video mode is unknown! #endif
-/* +/** * Setup the pixel PLL in the companion chip - * base: register's base address - * pll_val: pll register value to be set + * @param[in] base register's base address + * @param[in] pll_val pll register value to be set + * + * The PLL to program here is located in the CS5530 */ -static void cs5530_set_clock_frequency(void *io_base,unsigned long pll_val) +static void cs5530_set_clock_frequency(void *io_base, unsigned long pll_val) { unsigned long reg;
@@ -247,17 +265,26 @@ static void cs5530_set_clock_frequency(v writel(reg, io_base+CS5530_DOT_CLK_CONFIG); }
-/* +/** * Setup memory layout - * gx_base: GX register area - * mode: Data about the video mode to setup + * @param[in] gx_base GX register area + * @param[in] mode Data about the video mode to setup * - * This routine assumes unlocked DC registers. Using compressed buffer - * is not supported! (makes more sense later, but not while booting) + * Memory layout must be setup in Geode GX1's chipset. + * Note: This routine assumes unlocked DC registers. + * Note: Using compressed buffer is not supported yet! + * (makes more sense later, but not while booting) + * + * At this point a check is missed if the requested video + * mode is possible with the provided video memory. + * Check if symbol CONFIG_VIDEO_MB is at least: + * - 1 (=1MiB) for VGA and SVGA + * - 2 (=2MiB) for XGA + * - 4 (=4MiB) for SXGA */ -static void dc_setup_layout(void *gx_base,const struct video_mode *mode) +static void dc_setup_layout(void *gx_base, const struct video_mode *mode) { - unsigned long base = 0x00000000; + u32 base = 0x00000000;
writel(base, gx_base + DC_FB_ST_OFFSET);
@@ -270,12 +297,13 @@ static void dc_setup_layout(void *gx_bas writel(((COLOUR_DEPTH>>3) * mode->visible_pixel) >> 3, gx_base + DC_BUF_SIZE); }
-/* +/** * Setup the HSYNC/VSYNC, active video timing - * gx_base: GX register area - * mode: Data about the video mode to setup + * @param[in] gx_base GX register area + * @param[in] mode Data about the video mode to setup * - * This routine assumes unlocked DC registers + * Sync signal generation is done in Geode GX1's chipset. + * Note: This routine assumes unlocked DC registers * * |<------------------------- htotal ----------------------------->| * |<------------ hactive -------------->| | @@ -295,10 +323,10 @@ static void dc_setup_layout(void *gx_bas * |#####################################___________________________| line data * |______________________________________________---------_________| YSYNC */ -static void dc_setup_timing(void *gx_base,const struct video_mode *mode) +static void dc_setup_timing(void *gx_base, const struct video_mode *mode) { - unsigned long hactive, hblankstart, hsyncstart, hsyncend, hblankend, htotal; - unsigned long vactive, vblankstart, vsyncstart, vsyncend, vblankend, vtotal; + u32 hactive, hblankstart, hsyncstart, hsyncend, hblankend, htotal; + u32 vactive, vblankstart, vsyncstart, vsyncend, vblankend, vtotal;
hactive = mode->visible_pixel & 0x7FF; hblankstart = hactive; @@ -331,10 +359,13 @@ static void dc_setup_timing(void *gx_bas writel((vsyncstart - 2) | ((vsyncend - 2) << 16), gx_base + DC_FP_V_TIMING); }
-/* +/** * Setup required internals to bring the mode up and running - * gx_base: GX register area - * mode: Data about the video mode to setup + * @param[in] gx_base GX register area + * @param[in] mode Data about the video mode to setup + * + * Must be setup in Geode GX1's chipset. + * Note: This routine assumes unlocked DC registers. */ static void cs5530_activate_mode(void *gx_base, const struct video_mode *mode) { @@ -348,21 +379,24 @@ static void cs5530_activate_mode(void *g writel(0x00003004, gx_base + DC_OUTPUT_CFG); }
-/* +/** * Activate the current mode to be "visible" outside - * gx_base: GX register area - * mode: Data about the video mode to setup + * @param[in] gx_base GX register area + * @param[in] mode Data about the video mode to setup + * + * As we now activate the interface this must be done + * in the CS5530 */ static void cs5530_activate_video(void *io_base, const struct video_mode *mode) { u32 val;
- val = mode->sync_pol; - val <<= 8; - + val = (u32)mode->sync_pol << 8; writel(val | 0x0020002F, io_base + CS5530_DISPLAY_CONFIG); }
+#if CONFIG_SPLASH_GRAPHIC == 1 + /* * This bitmap file must provide: * int width: pixel count in one line @@ -382,7 +416,7 @@ static void cs5530_activate_video(void * * * This routine assumes we are using a 16 bit colour depth! */ -static void show_boot_splash_16(u32 swidth,u32 sheight,u32 pitch,void *base) +static void show_boot_splash_16(u32 swidth, u32 sheight, u32 pitch,void *base) { int word_count,i; unsigned short *adr; @@ -391,51 +425,52 @@ static void show_boot_splash_16(u32 swid * fill the screen with the colour of the * left top pixel in the graphic */ - word_count = pitch*sheight; - printk_debug("Clear Screen at %p, %d words\n",base,word_count); - adr = (unsigned short *) base; - for (i=0; i < word_count; i++, adr++) + word_count = pitch * sheight; + adr = (unsigned short*)base; + for (i = 0; i < word_count; i++, adr++) *adr = colour_map[bitmap[0]]; - printk_debug("Ready\n");
/* * paint the splash */ - xstart=swidth-width; - ystart=sheight-height; - printk_debug("Start at %u,%u\n",xstart,ystart); - for (y=0;y<height;y++) { - adr=(unsigned short*)(base + pitch*(y+ystart)+2*xstart); - for (x=0;x<width;x++) { - *adr=(unsigned short)colour_map[(int)bitmap[x+y*width]]; + xstart = swidth-width; + ystart = sheight-height; + for (y = 0; y < height; y++) { + adr=(unsigned short*)(base + pitch*(y+ystart) + 2 * xstart); + for (x = 0; x < width; x++) { + *adr=(unsigned short)colour_map[(int)bitmap[x + y * width]]; adr++; } } } +#else +# define show_boot_splash_16(w, x, y , z) +#endif
-/* - * management part +/** + * LinuxBIOS management part + * @param[in] dev Info about the PCI device to initialise */ static void cs5530_vga_init(device_t dev) { const struct video_mode *mode; void *io_base, *gx_base;
- io_base = (void*)pci_read_config32(dev,0x10); + io_base = (void*)pci_read_config32(dev, 0x10); gx_base = (void*)GX_BASE; mode = modes[CONFIG_GX1_VIDEOMODE];
printk_debug("Setting up video mode %dx%d with %d Hz clock\n", mode->visible_pixel, mode->visible_lines, mode->pixel_clock);
- cs5530_set_clock_frequency(io_base,mode->pll_value); + cs5530_set_clock_frequency(io_base, mode->pll_value);
writel(DC_UNLOCK_MAGIC, gx_base + DC_UNLOCK);
show_boot_splash_16(mode->visible_pixel, mode->visible_lines, - mode->visible_pixel*(COLOUR_DEPTH>>3),(void*)(GX_BASE+0x800000)); + mode->visible_pixel * (COLOUR_DEPTH>>3), (void*)(GX_BASE + 0x800000));
- cs5530_activate_mode(gx_base,mode); + cs5530_activate_mode(gx_base, mode);
cs5530_activate_video(io_base, mode); writel(0x00000000, gx_base + DC_UNLOCK); @@ -446,13 +481,13 @@ static struct device_operations vga_ops .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = cs5530_vga_init, - .enable = NULL /* not required */ + .enable = NULL, /* not required */ };
static struct pci_driver vga_pci_driver __pci_driver = { .ops = &vga_ops, .vendor = PCI_VENDOR_ID_CYRIX, - .device = PCI_DEVICE_ID_CYRIX_5530_VIDEO + .device = PCI_DEVICE_ID_CYRIX_5530_VIDEO, };
#endif /* #if CONFIG_GX1_VIDEO == 1 */
On Sat, Oct 06, 2007 at 09:59:46PM +0200, Juergen Beisert wrote:
Patch is against LinuxBIOSv2, revision of 2007-10-06.
Signed-off-by: Juergen Beisert juergen127@kreuzholzen.de
Acked-by: Peter Stuge peter@stuge.se
On Sun, Oct 07, 2007 at 12:42:47PM +0200, Peter Stuge wrote:
On Sat, Oct 06, 2007 at 09:59:46PM +0200, Juergen Beisert wrote:
Patch is against LinuxBIOSv2, revision of 2007-10-06.
Signed-off-by: Juergen Beisert juergen127@kreuzholzen.de
Acked-by: Peter Stuge peter@stuge.se
r2836.
Do you also have v2 patches for your Winnet100 boxes to see how this is used (and to have support for Winnet100s, of course)?
I tried the code with the following patch. Building works fine, but I cannot test on hardware right now... Will report back later.
Index: src/mainboard/asi/mb_5blmp/Options.lb =================================================================== --- src/mainboard/asi/mb_5blmp/Options.lb (Revision 2835) +++ src/mainboard/asi/mb_5blmp/Options.lb (Arbeitskopie) @@ -40,6 +40,10 @@ uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 # uses CONFIG_CONSOLE_VGA # uses CONFIG_PCI_ROM_RUN +uses CONFIG_GX1_VIDEO +uses CONFIG_GX1_VIDEOMODE +uses CONFIG_VIDEO_MB +uses CONFIG_SPLASH_GRAPHIC
## ROM_SIZE is the size of boot ROM that this board will use. @@ -156,5 +160,11 @@ # default CONFIG_CONSOLE_VGA=1 # default CONFIG_PCI_ROM_RUN=1
+# See src/southbridge/amd/cs5530/cs5530_vga.c for details. +default CONFIG_GX1_VIDEO = 1 +default CONFIG_GX1_VIDEOMODE = 0 +default CONFIG_VIDEO_MB = 4 * 1024 +default CONFIG_SPLASH_GRAPHIC = 1 + end
Uwe.
On Sun, Oct 07, 2007 at 11:03:24PM +0200, Uwe Hermann wrote:
r2836.
Do you also have v2 patches for your Winnet100 boxes to see how this is used (and to have support for Winnet100s, of course)?
I tried the code with the following patch. Building works fine, but I cannot test on hardware right now... Will report back later.
Index: src/mainboard/asi/mb_5blmp/Options.lb
--- src/mainboard/asi/mb_5blmp/Options.lb (Revision 2835) +++ src/mainboard/asi/mb_5blmp/Options.lb (Arbeitskopie) @@ -40,6 +40,10 @@ uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 # uses CONFIG_CONSOLE_VGA # uses CONFIG_PCI_ROM_RUN +uses CONFIG_GX1_VIDEO +uses CONFIG_GX1_VIDEOMODE +uses CONFIG_VIDEO_MB +uses CONFIG_SPLASH_GRAPHIC
## ROM_SIZE is the size of boot ROM that this board will use. @@ -156,5 +160,11 @@ # default CONFIG_CONSOLE_VGA=1 # default CONFIG_PCI_ROM_RUN=1
+# See src/southbridge/amd/cs5530/cs5530_vga.c for details. +default CONFIG_GX1_VIDEO = 1 +default CONFIG_GX1_VIDEOMODE = 0 +default CONFIG_VIDEO_MB = 4 * 1024
Should be
default CONFIG_VIDEO_MB = 4
of course.
+default CONFIG_SPLASH_GRAPHIC = 1
end
Uwe.
Hi Uwe,
On Sunday 07 October 2007 23:03, Uwe Hermann wrote:
On Sun, Oct 07, 2007 at 12:42:47PM +0200, Peter Stuge wrote:
On Sat, Oct 06, 2007 at 09:59:46PM +0200, Juergen Beisert wrote:
Patch is against LinuxBIOSv2, revision of 2007-10-06.
Signed-off-by: Juergen Beisert juergen127@kreuzholzen.de
Acked-by: Peter Stuge peter@stuge.se
r2836.
Do you also have v2 patches for your Winnet100 boxes to see how this is used (and to have support for Winnet100s, of course)?
Part of my BSP (refer patches/LinuxBIOSv2-r2671/generic). It was rejected here as it modifies things locally that should better fixed globally (SDRAM tuning). I did not had the time to fix it yet. So its still the old patch.
Juergen
On Mon, Oct 08, 2007 at 09:43:40AM +0200, Juergen Beisert wrote:
Hi Uwe,
On Sunday 07 October 2007 23:03, Uwe Hermann wrote:
On Sun, Oct 07, 2007 at 12:42:47PM +0200, Peter Stuge wrote:
On Sat, Oct 06, 2007 at 09:59:46PM +0200, Juergen Beisert wrote:
Patch is against LinuxBIOSv2, revision of 2007-10-06.
Signed-off-by: Juergen Beisert juergen127@kreuzholzen.de
Acked-by: Peter Stuge peter@stuge.se
r2836.
Do you also have v2 patches for your Winnet100 boxes to see how this is used (and to have support for Winnet100s, of course)?
Part of my BSP (refer patches/LinuxBIOSv2-r2671/generic). It was rejected here as it modifies things locally that should better fixed globally (SDRAM tuning). I did not had the time to fix it yet. So its still the old patch.
That's not a problem, we can either
(1) fix the global changeѕ to work for all boards, or
(2) submit only the rest of the code for now, but keeping the global SDRAM changes around as an extra patch in the wiki or so.
Please repost the patches for review.
Uwe.
Hi Juergen
Your VGA code worked great on my TeleVideo TC7020. Thank you very much!!
Regards, Kenji Noguchi
Hi Kenji,
On Thu, Oct 18, 2007 at 09:42:34PM -0700, Kenji Noguchi wrote:
Hi Juergen
Your VGA code worked great on my TeleVideo TC7020. Thank you very much!!
That's great to hear, thanks (even though I'm not Juergen :)
We don't officially have TC7020 code in the repository, yet (I think). Are you using another target as basis for your board? If so, which one (Eaglelion 5BCM?). Can you please post a patch if you changed parts of that code?
I'd like to integrate this board into the common gx1-base, too (which I posted yesterday, see http://www.linuxbios.org/pipermail/linuxbios/2007-October/026121.html It would be nice if you could test a patch for that on the hardware.
Can you post the output of 'lspci -tvnn' and 'superiotool -dV' on your board? Do you use a different irq_table.c than what's in svn? If so, can you post that too, please? And/or run the 'getpir' tool on the box?
Also, if you want we can setup a wiki page similar to this one http://linuxbios.org/BCOM_WINNET100_Build_Tutorial for the TC7020, with a detailed status table of which parts of the hardware work or not, tips and tricks for the board etc. Please let us know which parts work, or create a wiki page directly if you prefer that...
Thanks, Uwe.
hi Uwe,
Yes, tc7020 code is really a set of copy of 5bcm with IRQ setup code. So I guess I should apply your patch, and have tc7020 specific stuff on top of it before submitting tc7020 patch. Attached is irq_table.c per request.
I would like to create a wiki page directly. Do I need a wiki account? IDE, NIC, USB, VGA, UART, and Power switch work fine. By the way I got VGA console with unmodified Linux kernel (2.6.18).
Here is the output of lspci and superiotool. Where'd getpir be gone? I thought getpir was under util directory.
tv:~# lspci -tvnn -[0000:00]-+-00.0 Cyrix Corporation PCI Master [1078:0001] +-12.0 Cyrix Corporation 5530 Legacy [Kahlua] [1078:0100] +-12.1 Cyrix Corporation 5530 SMI [Kahlua] [1078:0101] +-12.2 Cyrix Corporation 5530 IDE [Kahlua] [1078:0102] +-12.3 Cyrix Corporation 5530 Audio [Kahlua] [1078:0103] +-12.4 Cyrix Corporation 5530 Video [Kahlua] [1078:0104] +-13.0 Compaq Computer Corporation ZFMicro Chipset USB [0e11:a0f8] -15.0 National Semiconductor Corporation DP83815 (MacPhyter) Ethernet Controller [100b:0020]
tv:~# ./superiotool -dV superiotool r2872 Probing for ALi Super I/O at 0x3f0... Failed. Returned data: id=0xffff, rev=0xff Probing for ALi Super I/O at 0x370... Failed. Returned data: id=0xffff, rev=0xff Probing for Fintek Super I/O at 0x2e... Failed. Returned data: vid=0x0000, id=0x06df Probing for Fintek Super I/O at 0x4e... Failed. Returned data: vid=0xffff, id=0xffff Probing for ITE Super I/O (init=0x87,0x01,0x55,0x55/0xaa) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x01,0x55,0x55/0xaa) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for NSC Super I/O at 0x2e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x4e... Failed. Returned data: port=0xff, port+1=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff No Super I/O found
Regards, Kenji Noguchi