Dear coreboot folks,
I noticed commit 5d1494adda44 (mb/system76/tgl: Update VBTs to version 250) [1]:
mb/system76/tgl: Update VBTs to version 250
Commit 4c7e97b26a34 ("Update fsp submodule to upstream master branch") included an update to the VBT from 240 to 250, breaking parsing of existing VBTs.
After that commit, the VBT was parsed as (from gaze16-3060-b):
[DEBUG] PCI: 00:02.0 init [INFO ] GMA: Found VBT in CBFS [INFO ] GMA: Found valid VBT in CBFS [INFO ] framebuffer_info: bytes_per_line: 4096, bits_per_pixel: 32 [INFO ] x_res x y_res: 1024 x 768, size: 3145728 at 0xd0000000 [DEBUG] PCI: 00:02.0 init finished in 6 msecs
When the expected output is:
[DEBUG] PCI: 00:00:02.0 init [INFO ] GMA: Found VBT in CBFS [INFO ] GMA: Found valid VBT in CBFS [INFO ] framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32 [INFO ] x_res x y_res: 1920 x 1080, size: 8294400 at 0xd0000000 [DEBUG] PCI: 00:00:02.0 init finished in 6 msecs
Generate blobs for the new version using Intel Display Configuration Tool (DisCon) v3.3, based on the existing 237 and 240 VBTs.
(For our edk2 payload, the UEFI GOP driver was updated to 17.0.1077.)
Updating the submodule pointer of 3rdparty/fsp brings in commit 849ce8261bb0 (Tiger Lake FSP A.0.7E.70) with no commit message body. The diff contains:
TigerLakeFspBinPkg/Client/SampleCode/Vbt/Vbt.json
@@ -23891,7 +24584,7 @@ }, { "WidgetType": "Label", - "WidgetName": "VBT Version: 240", + "WidgetName": "VBT Version: 250",^M "Visibility": "", "Data": [], "HelpText": "",
Vladimir (φ-coder) also published the tool intelvbtupgrader [2] to address this problem.
I would have assumed that FSP versions would be backwards compatible. I attache the output of `intel_vbt_decode` of both VBT files.
Does somebody have more insight?
Kind regards,
Paul
[1]: https://review.coreboot.org/c/coreboot/+/82246 [2]: https://review.coreboot.org/c/coreboot/+/82722