New patch to review for coreboot: 0b36cc0 Persimmon, Inagua: PCI devs 12.1, 13.1 (USB) don't exist, but 14.6 (GEC) does
Jens Rottmann (JRottmann@LiPPERTembedded.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2463
-gerrit
commit 0b36cc0ce3b68b71efd26e7033678b1bba742985 Author: Jens Rottmann JRottmann@LiPPERTembedded.de Date: Wed Feb 20 21:12:37 2013 +0100
Persimmon, Inagua: PCI devs 12.1, 13.1 (USB) don't exist, but 14.6 (GEC) does
USB ports 0-4 are handled by PCI devices 12.0 (OHCI) and 12.2 (EHCI). 12.1 simply does not exist, removed it from devicetree.cb. While at it made the comment more detailled. Likewise for all USB ports.
USB device 14.6 is the Broadcom GbE MAC integrated in the Hudson-E1. Added it to devicetree.cb. It's used on Inagua (on), but not on Persimmon (off).
Change-Id: Idea27b3390fa4470f2592e79fdd633d5a218b97b Signed-off-by: Jens Rottmann JRottmann@LiPPERTembedded.de --- src/mainboard/amd/inagua/devicetree.cb | 17 ++++++++--------- src/mainboard/amd/persimmon/devicetree.cb | 17 ++++++++--------- 2 files changed, 16 insertions(+), 18 deletions(-)
diff --git a/src/mainboard/amd/inagua/devicetree.cb b/src/mainboard/amd/inagua/devicetree.cb index f003704..6ce73bb 100644 --- a/src/mainboard/amd/inagua/devicetree.cb +++ b/src/mainboard/amd/inagua/devicetree.cb @@ -39,12 +39,10 @@ chip northbridge/amd/agesa/family14/root_complex
chip southbridge/amd/cimx/sb800 # it is under NB/SB Link, but on the same pri bus device pci 11.0 on end # SATA - device pci 12.0 on end # USB - device pci 12.1 on end # USB - device pci 12.2 on end # USB - device pci 13.0 on end # USB - device pci 13.1 on end # USB - device pci 13.2 on end # USB + device pci 12.0 on end # OHCI USB 0-4 + device pci 12.2 on end # EHCI USB 0-4 + device pci 13.0 on end # OHCI USB 5-9 + device pci 13.2 on end # EHCI USB 5-9 device pci 14.0 on # SM chip drivers/generic/generic #dimm 0-0-0 device i2c 50 on end @@ -66,13 +64,14 @@ chip northbridge/amd/agesa/family14/root_complex end # kbc1100 end #LPC device pci 14.4 off end # PCIB 0x4384, NOTE: PCI interface pins shared with GPIO {GPIO 35:0} - device pci 14.5 on end # USB 2 + device pci 14.5 on end # OHCI FS/LS USB + device pci 14.6 on end # Hudson-E1 GbE MAC: Broadcom BCM5785 (14E4:1699) device pci 15.0 on end # PCIe PortA Express Card device pci 15.1 on end # PCIe PortB NEC USB3.0 device pci 15.2 on end # PCIe PortC MINIPCIE SLOT2 device pci 15.3 on end # PCIe PortD PCIE X1 SLOT - device pci 16.0 on end # OHCI USB3 - device pci 16.2 on end # EHCI USB3 + device pci 16.0 on end # OHCI USB 10-13 + device pci 16.2 on end # EHCI USB 10-13 register "gpp_configuration" = "4" #1:1:1:1 register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE end #southbridge/amd/cimx/sb800 diff --git a/src/mainboard/amd/persimmon/devicetree.cb b/src/mainboard/amd/persimmon/devicetree.cb index fce7d10..196327c 100644 --- a/src/mainboard/amd/persimmon/devicetree.cb +++ b/src/mainboard/amd/persimmon/devicetree.cb @@ -39,12 +39,10 @@ chip northbridge/amd/agesa/family14/root_complex
chip southbridge/amd/cimx/sb800 # it is under NB/SB Link, but on the same pri bus device pci 11.0 on end # SATA - device pci 12.0 on end # USB - device pci 12.1 on end # USB - device pci 12.2 on end # USB - device pci 13.0 on end # USB - device pci 13.1 on end # USB - device pci 13.2 on end # USB + device pci 12.0 on end # OHCI USB 0-4 + device pci 12.2 on end # EHCI USB 0-4 + device pci 13.0 on end # OHCI USB 5-9 + device pci 13.2 on end # EHCI USB 5-9 device pci 14.0 on # SM chip drivers/generic/generic #dimm 0-0-0 device i2c 50 on end @@ -82,13 +80,14 @@ chip northbridge/amd/agesa/family14/root_complex end # f81865f end #LPC device pci 14.4 on end # PCIB 0x4384, NOTE: PCI interface pins shared with GPIO {GPIO 35:0} - device pci 14.5 off end # USB 2 + device pci 14.5 off end # OHCI FS/LS USB + device pci 14.6 off end # Hudson-E1 GbE MAC: Broadcom BCM5785 (14E4:1699) device pci 15.0 off end # PCIe PortA device pci 15.1 off end # PCIe PortB device pci 15.2 off end # PCIe PortC device pci 15.3 off end # PCIe PortD - device pci 16.0 off end # OHCI USB3 - device pci 16.2 off end # EHCI USB3 + device pci 16.0 off end # OHCI USB 10-13 + device pci 16.2 off end # EHCI USB 10-13 register "gpp_configuration" = "0" #4:0:0:0 (really need to disable all 4 somehow) register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE
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Jens Rottmann