13 Dec
2007
13 Dec
'07
6:58 a.m.
Here is my LinuxBIOS serial log. Might be useful to those doing Barcelona development. Marc
--
Marc Jones
Senior Firmware Engineer
(970) 226-9684 Office
mailto:Marc.Jones@amd.com
http://www.amd.com/embeddedprocessors
LinuxBIOS-2.0.0_cerberus_Fallback Mon Dec 10 23:08:00 MST 2007 starting...
Family_Model: 00100f20
microcode: equivalent rev id = 0x1020, current patch id = 0x00000000
microcode: patch id to apply = 0x01000033
microcode: updated to patch id = 0x01000033 success
*sysinfo range: [000cc000,000cdfa0]
bsp_apicid = 00
cpu_init_detectedx = 00000000
Node:00
F3xA0: a00d2800
F3xD8: 03002816
F3xD4: c331af03
F3xDC: 00005428
F3x84: a0e641e6
F3x80: e600a681
Enter amd_ht_init()
AMD_CB_EventNotify()
event class: 05 event: 1004
AMD_CB_EventNotify()
event class: 05 event: 2006
AMD_CB_EventNotify()
event class: 05 event: 2006
setup_remote_node: 01 done
Start node 01 done.
Exit amd_ht_init()
Wait all core c0so res0ta: rt -ed- -
{ APICID = 04 NODEID = 01 COREID = 00} ---
i niCotr_fe0i dvsitad_ratep(ds otnag neo1)de :ap i01ci
d
W: a0it4
alFlID cVoIDr e0ons sAPt:ar t04ed
done
start_other_cores()
init node: 00 cores: 02
Start other core - nodeid: 00 cores: 03
init node: 01 cores: 02
Start other core - nodeid: 01 cor ccceosoo:rrree ex0xx:::3
---s---t--- a r{{{ t e AdAA PPPIaIIpCCCI IIaDDD p i=== c id00:031 2 NNNOOODDDEEEIIIDDD === 000000 CCCOOORRREEEIIIDDD cc===cooo rr000reee123xx}}}x::: -- ---- -------
-
-
-
-- A{{ii{i Pnn n ii iAAstAttP___PPtIfIaIffCriiCiCIddIItdDevDvvD ii di==:d=dd ___ a0aappp01005((67A( Ps ssNtttNN OaOsOaaDtggDgDEeEEaeeIr11I1ID))DDt) e =aaa==d p : pp0 ii0i01cc110c 2i iiCddCCAdOOP:O::R RR E0EsE00It21I3ID
DDa
r
=FFF==t e III0Dd0DD01VV23V:}}I }II 0DD D-- -3 -oo--o-n-nn-
AA
APPPA:P:i:iin nnis0ii00tt23tt1_
a
__
f
f
f
riitideddvvvdii:id dd_0__aaa5ppAp(P((s sstttsaatagaggeeer11t1)e)) d aaa:pp pi0iic6cciiiAddPd: :: s 000t67a5
r
t
FFFedIIIDD:DV VVIII0DD7D
o
oonnnB eAAgAPiPP:n:: 00M05S67
R
0xc0010071 0x18a0a0e4 0x50045040
FIDVID on BSP, APIC_id: 00
BSP Startup Pstate 04 msr: 0xc0010068 = 0x80000028 0x50005040
Wait for AP stage 1: ap_apicid = 1
readback = 1010301
common_fid(packed) = 10300
Wait for AP stage 1: ap_apicid = 2
readback = 2010301
common_fid(packed) = 10300
Wait for AP stage 1: ap_apicid = 3
readback = 3010301
common_fid(packed) = 10300
Wait for AP stage 1: ap_apicid = 4
readback = 4010301
common_fid(packed) = 10300
Wait for AP stage 1: ap_apicid = 5
readback = 5010301
common_fid(packed) = 10300
Wait for AP stage 1: ap_apicid = 6
readback = 6010301
common_fid(packed) = 10300
Wait for AP stage 1: ap_apicid = 7
readback = 7010301
common_fid(packed) = 10300
common_fidvid = 10300
FID Change fig 03, F3xD4: c3310f23
FID Change fig 03, F3xD4: 00000023
End MSR 0xc0010071 0x18a0a0e4 0x50005040
ht reset -
LinuxBIOS-2.0.0_cerberus_Fallback Mon Dec 10 23:08:00 MST 2007 starting...
Family_Model: 00100f20
microcode: equivalent rev id = 0x1020, current patch id = 0x00000000
microcode: patch id to apply = 0x01000033
microcode: updated to patch id = 0x01000033 success
*sysinfo range: [000cc000,000cdfa0]
bsp_apicid = 00
cpu_init_detectedx = 00000000
Node:00
F3xA0: a00d2800
F3xD8: 03002816
F3xD4: c331af03
F3xDC: 00005428
F3x84: a0e641e6
F3x80: e600a681
Enter amd_ht_init()
AMD_CB_EventNotify()
event class: 05 event: 1004
AMD_CB_EventNotify()
event class: 05 event: 2006
AMD_CB_EventNotify()
event class: 05 event: 2006
setup_remote_node: 01 done
Start node 01 done.
Exit amd_ht_init()
Wait all core 0csor set0:ar t-ed--
{ CAPorIeCI0 D s=ta rt04ed NOonDE InoD d=e: 0 101 C
O
WREaiIDt a= l0l 0}co r--e0-s
stianirtt_efd iddovined_
s
statgare2t _oapthiecir_dc: or0e4
s(
)
init node: 00 cores: 02
Start other core - nodeid: 00 cores: 03
init node: 01 cores: 02
Start other core - nodeid: 01 core scccooo:rr r0eeexxx3::
:
s----t--a-r --{t e {{ d A PaAApIPPC IIaICCDpIIi DD=c i ==d :0 3002 N 1ON ODNEDODIEEDI DI= D = 0 =00 00C 0OC ROCEROIEREDI ID =D c=cc o= oo0r3 0rree}02ex 1}xx::-} : - - --- ---
---
--
--
--
i
n i{i{{nAi t i n_ t PA_A AifPsPtiPf_IiItIdCaCvfCdIiIvrIitiDdDDd _ ved di_==s= t :ds _ta0g0sa001etg765 ae A2NNP Ng2Oae OO DaDsDp2Eti EpEIaiIIacDDriDpcdt ii dc==:e= d :i 0 d000:113 10: 02
C
0C
C2OOAO
1RR
RPE EE
IIsIDtDD a ===r t 0e002d13}:}} --0--3-----
AiiiPnn nisiitttt_a__fffriitiedddvvdvi:iid dd___0ss5stAttaaaPgg gesee222t a araappptiieicdcci:iid dd:::0 6 0A00765P
s
tarted: 07
Begin MSR 0xc0010071 0x18a0a0e4 0x50005040
End MSR 0xc0010071 0x18a0a0e4 0x50003840
allow_all_aps_stop()
enable_cf9_x()
fill_mem_ctrl()
enable_smbus()
SMBus controller enabled
raminit_amdmct()
raminit_amdmct begin:
mctAutoInitMCT_D: mct_init Node 00000000
mctAutoInitMCT_D: clear_legacy_Mode
Family_Model:00100f20
Family:10 Model:02 Stepping:20
converted:00010020
mctAutoInitMCT_D: mct_InitialMCT_D
mct_InitialMCT_D: Set Cl, Wb
mctAutoInitMCT_D: mctSMBhub_Init
switch i2c to : 00 for node 00
mctAutoInitMCT_D: mct_initDCT
mct_initDCT: DCTInit_D 0
DIMMPresence: i=00000000
DIMMPresence: smbaddr=00000050
DIMMPresence: i=00000001
DIMMPresence: smbaddr=00000051
DIMMPresence: i=00000002
DIMMPresence: smbaddr=00000052
DIMMPresence: i=00000003
DIMMPresence: smbaddr=00000053
DIMMPresence: i=00000004
DIMMPresence: smbaddr=00000000
DIMMPresence: i=00000005
DIMMPresence: smbaddr=00000000
DIMMPresence: i=00000006
DIMMPresence: smbaddr=00000000
DIMMPresence: i=00000007
DIMMPresence: smbaddr=00000000
DIMMPresence: DIMMValid=00000003
DIMMPresence: DIMMPresent=00000003
DIMMPresence: RegDIMMPresent=00000003
DIMMPresence: DimmECCPresent=00000003
DIMMPresence: DimmPARPresent=00000000
DIMMPresence: Dimmx4Present=00000003
DIMMPresence: Dimmx8Present=00000000
DIMMPresence: Dimmx16Present=00000000
DIMMPresence: DimmPlPresent=00000003
DIMMPresence: DimmDRPresent=00000000
DIMMPresence: DimmQRPresent=00000000
DIMMPresence: DATAload[0]=00000001
DIMMPresence: MAload[0]=00000010
DIMMPresence: MAdimms[0]=00000001
DIMMPresence: DATAload[1]=00000001
DIMMPresence: MAload[1]=00000010
DIMMPresence: MAdimms[1]=00000001
DIMMPresence: Status 00001003
DIMMPresence: ErrStatus 00000000
DIMMPresence: ErrCode 00000000
DIMMPresence: Done
DCTInit_D: mct_DIMMPresence Done
SPDCalcWidth: Status 00001003
SPDCalcWidth: ErrStatus 00000010
SPDCalcWidth: ErrCode 00000000
SPDCalcWidth: Done
DCTInit_D: mct_SPDCalcWidth Done
SPDGetTCL_D: DIMMCASL 00000002
SPDGetTCL_D: DIMMAutoSpeed 00000002
SPDGetTCL_D: Status 00001003
SPDGetTCL_D: ErrStatus 00000010
SPDGetTCL_D: ErrCode 00000000
SPDGetTCL_D: Done
AutoCycTiming: DramTimingLo 00159113
AutoCycTiming: DramTimingHi 00020200
AutoCycTiming: Status 00001003
AutoCycTiming: ErrStatus 00000010
AutoCycTiming: ErrCode 00000000
AutoCycTiming: Done
DCTInit_D: AutoCycTiming_D Done
AutoConfig_D: DCT: 00000000
SPDSetBanks: Status 00001003
SPDSetBanks: ErrStatus 00000010
SPDSetBanks: ErrCode 00000000
SPDSetBanks: Done
AfterStitch DCT0 and DCT1: DRAM Controller Select Low Register = 00002003
AfterStitch pDCTstat->NodeSysBase = 00000000
mct_AfterStitchMemory: pDCTstat->NodeSysLimit 001fffff
StitchMemory: Status 00001003
StitchMemory: ErrStatus 00000010
StitchMemory: ErrCode 00000000
StitchMemory: Done
InterleaveBanks_D: Status 00001003
InterleaveBanks_D: ErrStatus 00000090
InterleaveBanks_D: ErrCode 00000000
InterleaveBanks_D: Done
DramTimingLo: val=00000008
DramTimingLo: val=00000008
DramTimingLo: val=00000006
DramTimingLo: val=00000004
DramTimingLo: val=00000002
DramTimingLo: val=00000000
DramTimingLo: val=00000008
DramTimingLo: val=00000008
AutoConfig_D: DramControl: 00000005
AutoConfig_D: DramTimingLo: df159113
AutoConfig_D: DramConfigMisc: 00000000
AutoConfig_D: DramConfigMisc2: 00000000
AutoConfig_D: DramConfigLo: 00081010
AutoConfig_D: DramConfigHi: 3f488009
AutoConfig: Status 00001003
AutoConfig: ErrStatus 00000090
AutoConfig: ErrCode 00000000
AutoConfig: Done
DCTInit_D: AutoConfig_D Done
dct: 00000000
Speed: 00000002
CH_ODC_CTL: 20111222
CH_ADDR_TMG: 00000000
DCTInit_D: PlatformSpec_D Done
DCTInit_D: StartupDCT_D
StartupDCT_D: MemClkFreqVal
StartupDCT_D: DqsRcvEnTrain set
StartupDCT_D: DramInit
mct_initDCT: DCTInit_D 1
DCTInit_D: mct_DIMMPresence Done
SPDCalcWidth: Status 00001003
SPDCalcWidth: ErrStatus 00000090
SPDCalcWidth: ErrCode 00000000
SPDCalcWidth: Done
DCTInit_D: mct_SPDCalcWidth Done
AutoCycTiming: DramTimingLo 00159113
AutoCycTiming: DramTimingHi 00020200
AutoCycTiming: Status 00001003
AutoCycTiming: ErrStatus 00000090
AutoCycTiming: ErrCode 00000000
AutoCycTiming: Done
DCTInit_D: AutoCycTiming_D Done
AutoConfig_D: DCT: 00000001
SPDSetBanks: Status 00001003
SPDSetBanks: ErrStatus 00000090
SPDSetBanks: ErrCode 00000000
SPDSetBanks: Done
AfterStitch pDCTstat->NodeSysBase = 00000000
mct_AfterStitchMemory: pDCTstat->NodeSysLimit 003ffffe
StitchMemory: Status 00001003
StitchMemory: ErrStatus 00000090
StitchMemory: ErrCode 00000000
StitchMemory: Done
InterleaveBanks_D: Status 00001003
InterleaveBanks_D: ErrStatus 00000090
InterleaveBanks_D: ErrCode 00000000
InterleaveBanks_D: Done
DramTimingLo: val=00000008
DramTimingLo: val=00000008
DramTimingLo: val=00000006
DramTimingLo: val=00000004
DramTimingLo: val=00000002
DramTimingLo: val=00000000
DramTimingLo: val=00000008
DramTimingLo: val=00000008
AutoConfig_D: DramControl: 00000005
AutoConfig_D: DramTimingLo: df159113
AutoConfig_D: DramConfigMisc: 00000000
AutoConfig_D: DramConfigMisc2: 00000000
AutoConfig_D: DramConfigLo: 00081010
AutoConfig_D: DramConfigHi: 3f488009
AutoConfig: Status 00001003
AutoConfig: ErrStatus 00000090
AutoConfig: ErrCode 00000000
AutoConfig: Done
DCTInit_D: AutoConfig_D Done
dct: 00000001
Speed: 00000002
CH_ODC_CTL: 20111222
CH_ADDR_TMG: 00000000
DCTInit_D: PlatformSpec_D Done
DCTInit_D: StartupDCT_D
StartupDCT_D: MemClkFreqVal
StartupDCT_D: DqsRcvEnTrain set
StartupDCT_D: DramInit
mctAutoInitMCT_D: mct_init Node 00000001
mctAutoInitMCT_D: clear_legacy_Mode
Family_Model:00100f20
Family:10 Model:02 Stepping:20
converted:00010020
mctAutoInitMCT_D: mct_InitialMCT_D
mct_InitialMCT_D: Set Cl, Wb
mctAutoInitMCT_D: mctSMBhub_Init
switch i2c to : 01 for node 01
mctAutoInitMCT_D: mct_initDCT
mct_initDCT: DCTInit_D 0
DIMMPresence: i=00000000
DIMMPresence: smbaddr=00000050
DIMMPresence: i=00000001
DIMMPresence: smbaddr=00000051
DIMMPresence: i=00000002
DIMMPresence: smbaddr=00000052
DIMMPresence: i=00000003
DIMMPresence: smbaddr=00000053
DIMMPresence: i=00000004
DIMMPresence: smbaddr=00000054
DIMMPresence: i=00000005
DIMMPresence: smbaddr=00000055
DIMMPresence: i=00000006
DIMMPresence: smbaddr=00000056
DIMMPresence: i=00000007
DIMMPresence: smbaddr=00000057
DIMMPresence: DIMMValid=00000003
DIMMPresence: DIMMPresent=00000003
DIMMPresence: RegDIMMPresent=00000003
DIMMPresence: DimmECCPresent=00000003
DIMMPresence: DimmPARPresent=00000000
DIMMPresence: Dimmx4Present=00000003
DIMMPresence: Dimmx8Present=00000000
DIMMPresence: Dimmx16Present=00000000
DIMMPresence: DimmPlPresent=00000003
DIMMPresence: DimmDRPresent=00000000
DIMMPresence: DimmQRPresent=00000000
DIMMPresence: DATAload[0]=00000001
DIMMPresence: MAload[0]=00000010
DIMMPresence: MAdimms[0]=00000001
DIMMPresence: DATAload[1]=00000001
DIMMPresence: MAload[1]=00000010
DIMMPresence: MAdimms[1]=00000001
DIMMPresence: Status 00001003
DIMMPresence: ErrStatus 00000000
DIMMPresence: ErrCode 00000000
DIMMPresence: Done
DCTInit_D: mct_DIMMPresence Done
SPDCalcWidth: Status 00001003
SPDCalcWidth: ErrStatus 00000010
SPDCalcWidth: ErrCode 00000000
SPDCalcWidth: Done
DCTInit_D: mct_SPDCalcWidth Done
SPDGetTCL_D: DIMMCASL 00000002
SPDGetTCL_D: DIMMAutoSpeed 00000002
SPDGetTCL_D: Status 00001003
SPDGetTCL_D: ErrStatus 00000010
SPDGetTCL_D: ErrCode 00000000
SPDGetTCL_D: Done
AutoCycTiming: DramTimingLo 00159113
AutoCycTiming: DramTimingHi 00020200
AutoCycTiming: Status 00001003
AutoCycTiming: ErrStatus 00000010
AutoCycTiming: ErrCode 00000000
AutoCycTiming: Done
DCTInit_D: AutoCycTiming_D Done
AutoConfig_D: DCT: 00000000
SPDSetBanks: Status 00001003
SPDSetBanks: ErrStatus 00000010
SPDSetBanks: ErrCode 00000000
SPDSetBanks: Done
AfterStitch DCT0 and DCT1: DRAM Controller Select Low Register = 00006003
AfterStitch pDCTstat->NodeSysBase = 00400000
mct_AfterStitchMemory: pDCTstat->NodeSysLimit 001fffff
StitchMemory: Status 00001003
StitchMemory: ErrStatus 00000010
StitchMemory: ErrCode 00000000
StitchMemory: Done
InterleaveBanks_D: Status 00001003
InterleaveBanks_D: ErrStatus 00000090
InterleaveBanks_D: ErrCode 00000000
InterleaveBanks_D: Done
DramTimingLo: val=00000008
DramTimingLo: val=00000008
DramTimingLo: val=00000006
DramTimingLo: val=00000004
DramTimingLo: val=00000002
DramTimingLo: val=00000000
DramTimingLo: val=00000008
DramTimingLo: val=00000008
AutoConfig_D: DramControl: 00000005
AutoConfig_D: DramTimingLo: df159113
AutoConfig_D: DramConfigMisc: 00000000
AutoConfig_D: DramConfigMisc2: 00000000
AutoConfig_D: DramConfigLo: 00081010
AutoConfig_D: DramConfigHi: 3f488009
AutoConfig: Status 00001003
AutoConfig: ErrStatus 00000090
AutoConfig: ErrCode 00000000
AutoConfig: Done
DCTInit_D: AutoConfig_D Done
dct: 00000000
Speed: 00000002
CH_ODC_CTL: 20111222
CH_ADDR_TMG: 00000000
DCTInit_D: PlatformSpec_D Done
DCTInit_D: StartupDCT_D
StartupDCT_D: MemClkFreqVal
StartupDCT_D: DqsRcvEnTrain set
StartupDCT_D: DramInit
mct_initDCT: DCTInit_D 1
DCTInit_D: mct_DIMMPresence Done
SPDCalcWidth: Status 00001003
SPDCalcWidth: ErrStatus 00000090
SPDCalcWidth: ErrCode 00000000
SPDCalcWidth: Done
DCTInit_D: mct_SPDCalcWidth Done
AutoCycTiming: DramTimingLo 00159113
AutoCycTiming: DramTimingHi 00020200
AutoCycTiming: Status 00001003
AutoCycTiming: ErrStatus 00000090
AutoCycTiming: ErrCode 00000000
AutoCycTiming: Done
DCTInit_D: AutoCycTiming_D Done
AutoConfig_D: DCT: 00000001
SPDSetBanks: Status 00001003
SPDSetBanks: ErrStatus 00000090
SPDSetBanks: ErrCode 00000000
SPDSetBanks: Done
AfterStitch pDCTstat->NodeSysBase = 00400000
mct_AfterStitchMemory: pDCTstat->NodeSysLimit 003ffffe
StitchMemory: Status 00001003
StitchMemory: ErrStatus 00000090
StitchMemory: ErrCode 00000000
StitchMemory: Done
InterleaveBanks_D: Status 00001003
InterleaveBanks_D: ErrStatus 00000090
InterleaveBanks_D: ErrCode 00000000
InterleaveBanks_D: Done
DramTimingLo: val=00000008
DramTimingLo: val=00000008
DramTimingLo: val=00000006
DramTimingLo: val=00000004
DramTimingLo: val=00000002
DramTimingLo: val=00000000
DramTimingLo: val=00000008
DramTimingLo: val=00000008
AutoConfig_D: DramControl: 00000005
AutoConfig_D: DramTimingLo: df159113
AutoConfig_D: DramConfigMisc: 00000000
AutoConfig_D: DramConfigMisc2: 00000000
AutoConfig_D: DramConfigLo: 00081010
AutoConfig_D: DramConfigHi: 3f488009
AutoConfig: Status 00001003
AutoConfig: ErrStatus 00000090
AutoConfig: ErrCode 00000000
AutoConfig: Done
DCTInit_D: AutoConfig_D Done
dct: 00000001
Speed: 00000002
CH_ODC_CTL: 20111222
CH_ADDR_TMG: 00000000
DCTInit_D: PlatformSpec_D Done
DCTInit_D: StartupDCT_D
StartupDCT_D: MemClkFreqVal
StartupDCT_D: DqsRcvEnTrain set
StartupDCT_D: DramInit
mctAutoInitMCT_D: mct_init Node 00000002
mctAutoInitMCT_D: mct_init Node 00000003
mctAutoInitMCT_D: mct_init Node 00000004
mctAutoInitMCT_D: mct_init Node 00000005
mctAutoInitMCT_D: mct_init Node 00000006
mctAutoInitMCT_D: mct_init Node 00000007
mctAutoInitMCT_D: SyncDCTsReady_D
mct_SyncDCTsReady: Node 00000000
mct_SyncDCTsReady: DramEnabled
mct_SyncDCTsReady: Node 00000001
mct_SyncDCTsReady: DramEnabled
mctAutoInitMCT_D: HTMemMapInit_D
Node: 00 base: 00 limit: 3fffff BottomIO: c00000
Node: 01 base: 400000 limit: 7fffff BottomIO: c00000
Copy dram map from Node 0 to Node 01
mctAutoInitMCT_D: CPUMemTyping_D
CPUMemTyping: Cache32bTOP:00800000
CPUMemTyping: Bottom32bIO:00800000
CPUMemTyping: Bottom40bIO:00000000
mctAutoInitMCT_D: DQSTiming_D
DQSTiming_D: mct_BeforeDQSTrain_D:
DQSTiming_D: TrainReceiverEn_D FirstPass:
TrainRcvrEn: 1
TrainRcvrEn: 2
TrainRcvrEn: 3
TrainRcvrEn: 4
Rank not enabled_D
Rank not enabled_D
Rank not enabled_D
Rank not enabled_D
Rank not enabled_D
Rank not enabled_D
TrainRcvrEn: mct_DisableDQSRcvEn_D
TrainRcvrEn: Status 00001003
TrainRcvrEn: ErrStatus 00000090
TrainRcvrEn: ErrCode 00000000
TrainRcvrEn: Done
TrainRcvrEn: 1
TrainRcvrEn: 2
TrainRcvrEn: 3
TrainRcvrEn: 4
Rank not enabled_D
Rank not enabled_D
Rank not enabled_D
Rank not enabled_D
Rank not enabled_D
Rank not enabled_D
TrainRcvrEn: mct_DisableDQSRcvEn_D
TrainRcvrEn: Status 00001003
TrainRcvrEn: ErrStatus 00000090
TrainRcvrEn: ErrCode 00000000
TrainRcvrEn: Done
DQSTiming_D: mct_TrainDQSPos_D
TrainDQSRdWrPos: Status 00001003
TrainDQSRdWrPos: TrainErrors 00000000
TrainDQSRdWrPos: ErrStatus 00000090
TrainDQSRdWrPos: ErrCode 00000000
TrainDQSRdWrPos: Done
TrainDQSRdWrPos: Status 00001003
TrainDQSRdWrPos: TrainErrors 00000000
TrainDQSRdWrPos: ErrStatus 00000090
TrainDQSRdWrPos: ErrCode 00000000
TrainDQSRdWrPos: Done
TrainDQSRdWrPos: Status 00001003
TrainDQSRdWrPos: TrainErrors 00000000
TrainDQSRdWrPos: ErrStatus 00000090
TrainDQSRdWrPos: ErrCode 00000000
TrainDQSRdWrPos: Done
TrainDQSRdWrPos: Status 00001003
TrainDQSRdWrPos: TrainErrors 00000000
TrainDQSRdWrPos: ErrStatus 00000090
TrainDQSRdWrPos: ErrCode 00000000
TrainDQSRdWrPos: Done
TrainDQSRdWrPos: Status 00001003
TrainDQSRdWrPos: TrainErrors 00000000
TrainDQSRdWrPos: ErrStatus 00000090
TrainDQSRdWrPos: ErrCode 00000000
TrainDQSRdWrPos: Done
TrainDQSRdWrPos: Status 00001003
TrainDQSRdWrPos: TrainErrors 00000000
TrainDQSRdWrPos: ErrStatus 00000090
TrainDQSRdWrPos: ErrCode 00000000
TrainDQSRdWrPos: Done
TrainDQSRdWrPos: Status 00001003
TrainDQSRdWrPos: TrainErrors 00000000
TrainDQSRdWrPos: ErrStatus 00000090
TrainDQSRdWrPos: ErrCode 00000000
TrainDQSRdWrPos: Done
TrainDQSRdWrPos: Status 00001003
TrainDQSRdWrPos: TrainErrors 00000000
TrainDQSRdWrPos: ErrStatus 00000090
TrainDQSRdWrPos: ErrCode 00000000
TrainDQSRdWrPos: Done
DQSTiming_D: mctSetEccDQSRcvrEn_D
DQSTiming_D: TrainMaxReadLatency_D
DQSTiming_D: mct_EndDQSTraining_D
DQSTiming_D: MCTMemClr_D
mctAutoInitMCT_D: :OtherTiming
InterleaveNodes_D: Status 00001003
InterleaveNodes_D: ErrStatus 00000090
InterleaveNodes_D: ErrCode 00000000
InterleaveNodes_D: Done
InterleaveChannels: DRAM Controller Select Low Register = 00000584
InterleaveChannels:0xF0 = 00000000
InterleaveChannels_D: Node 00000000
InterleaveChannels_D: Status 00001003
InterleaveChannels_D: ErrStatus 00000090
InterleaveChannels_D: ErrCode 00000000
InterleaveChannels: DRAM Controller Select Low Register = 00004584
InterleaveChannels:0xF0 = 00000000
InterleaveChannels_D: Node 00000001
InterleaveChannels_D: Status 00001003
InterleaveChannels_D: ErrStatus 00000090
InterleaveChannels_D: ErrCode 00000000
InterleaveChannels_D: Node 00000002
InterleaveChannels_D: Status 00001000
InterleaveChannels_D: ErrStatus 00000000
InterleaveChannels_D: ErrCode 00000000
InterleaveChannels_D: Node 00000003
InterleaveChannels_D: Status 00001000
InterleaveChannels_D: ErrStatus 00000000
InterleaveChannels_D: ErrCode 00000000
InterleaveChannels_D: Node 00000004
InterleaveChannels_D: Status 00001000
InterleaveChannels_D: ErrStatus 00000000
InterleaveChannels_D: ErrCode 00000000
InterleaveChannels_D: Node 00000005
InterleaveChannels_D: Status 00001000
InterleaveChannels_D: ErrStatus 00000000
InterleaveChannels_D: ErrCode 00000000
InterleaveChannels_D: Node 00000006
InterleaveChannels_D: Status 00001000
InterleaveChannels_D: ErrStatus 00000000
InterleaveChannels_D: ErrCode 00000000
InterleaveChannels_D: Node 00000007
InterleaveChannels_D: Status 00001000
InterleaveChannels_D: ErrStatus 00000000
InterleaveChannels_D: ErrCode 00000000
InterleaveChannels_D: Done
mctAutoInitMCT_D: ECCInit_D
ECCInit 0
ECC enabled on node: 00000000
ECC enabled on node: 00000001
ECCInit 1
ECCInit 2
ECCInit 3
mctAutoInitMCT_D: MCTMemClr_D
mct_FinalMCT_D: Clr Cl, Wb
All Done
raminit_amdmct end:
v_esp=000cbef8
testx = 5a5a5a5a
Copying data from cache to RAM -- switching to use RAM as stack... Done
testx = 5a5a5a5a
Disabling cache as ram now
Clearing initial memory region: Done
Copying LinuxBIOS to RAM.
src=fffc0000
dst=00200000
linxbios_ram.nrv2b length = 0000ffe7
linxbios_ram.bin length = 00028920
Jumping to LinuxBIOS.
LinuxBIOS-2.0.0_cerberus_Fallback Mon Dec 10 23:08:00 MST 2007 booting...
Enumerating buses...
scan_static_bus for Root Device
APIC_CLUSTER: 0 enabled
PCI_DOMAIN: 0000 enabled
APIC_CLUSTER: 0 scanning...
PCI: 00:18.0 links increase to 8
PCI: 00:18.3 siblings=3
CPU: APIC: 00 enabled
malloc Enter, size 668, free_mem_ptr 00268000
malloc 0x00268000
CPU: APIC: 01 enabled
malloc Enter, size 668, free_mem_ptr 0026829c
malloc 0x0026829c
CPU: APIC: 02 enabled
malloc Enter, size 668, free_mem_ptr 00268538
malloc 0x00268538
CPU: APIC: 03 enabled
malloc Enter, size 668, free_mem_ptr 002687d4
malloc 0x002687d4
PCI: 00:19.0 [1022/1200] bus ops
PCI: 00:19.0 [1022/1200] enabled
malloc Enter, size 668, free_mem_ptr 00268a70
malloc 0x00268a70
PCI: 00:19.1 [1022/1201] enabled
malloc Enter, size 668, free_mem_ptr 00268d0c
malloc 0x00268d0c
PCI: 00:19.2 [1022/1202] enabled
malloc Enter, size 668, free_mem_ptr 00268fa8
malloc 0x00268fa8
PCI: 00:19.3 [1022/1203] ops
PCI: 00:19.3 [1022/1203] enabled
malloc Enter, size 668, free_mem_ptr 00269244
malloc 0x00269244
PCI: 00:19.4 [1022/1204] enabled
PCI: devfn 0xcd, bad id 0xffffffff
PCI: 00:19.0 links increase to 8
PCI: 00:19.3 siblings=3
malloc Enter, size 668, free_mem_ptr 002694e0
malloc 0x002694e0
CPU: APIC: 04 enabled
malloc Enter, size 668, free_mem_ptr 0026977c
malloc 0x0026977c
CPU: APIC: 05 enabled
malloc Enter, size 668, free_mem_ptr 00269a18
malloc 0x00269a18
CPU: APIC: 06 enabled
malloc Enter, size 668, free_mem_ptr 00269cb4
malloc 0x00269cb4
CPU: APIC: 07 enabled
PCI_DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:18.0 [1022/1200] bus ops
PCI: 00:18.0 [1022/1200] enabled
PCI: 00:18.1 [1022/1201] enabled
PCI: 00:18.2 [1022/1202] enabled
PCI: 00:18.3 [1022/1203] ops
PCI: 00:18.3 [1022/1203] enabled
PCI: 00:18.4 [1022/1204] enabled
PCI: devfn 0xc5, bad id 0xffffffff
PCI: devfn 0xc6, bad id 0xffffffff
PCI: devfn 0xc7, bad id 0xffffffff
PCI: 00:19.0 [1022/1200] enabled
PCI: 00:19.1 [1022/1201] enabled
PCI: 00:19.2 [1022/1202] enabled
PCI: 00:19.3 [1022/1203] enabled
PCI: 00:19.4 [1022/1204] enabled
PCI: devfn 0xcd, bad id 0xffffffff
PCI: devfn 0xce, bad id 0xffffffff
PCI: devfn 0xcf, bad id 0xffffffff
PCI: devfn 0xd0, bad id 0xffffffff
PCI: devfn 0xd8, bad id 0xffffffff
PCI: devfn 0xe0, bad id 0xffffffff
PCI: devfn 0xe8, bad id 0xffffffff
PCI: devfn 0xf0, bad id 0xffffffff
PCI: devfn 0xf8, bad id 0xffffffff
Capability: 0x08 @ 0xc0
flags: 0x0086
Collapsing PCI: 00:06.0 [1022/7460]
Capability: 0x08 @ 0x60
Capability: 0x08 @ 0xb8
flags: 0x8000
Capability: 0x08 @ 0x60
Capability: 0x08 @ 0xb8
Capability: 0x08 @ 0xc0
flags: 0x004a
Collapsing PCI: 00:0a.0 [1022/7458]
Capability: 0x08 @ 0x80
flags: 0x2101
Capability: 0x08 @ 0x80
Capability: 0x08 @ 0xa0
flags: 0x2101
Capability: 0x08 @ 0x80
Capability: 0x08 @ 0xa0
Capability: 0x08 @ 0xc0
flags: 0x2101
Capability: 0x08 @ 0x80
Capability: 0x08 @ 0xa0
Capability: 0x08 @ 0xc0
Capability: 0x08 @ 0xe0
flags: 0x2101
Capability: 0x08 @ 0x80
Capability: 0x08 @ 0xa0
Capability: 0x08 @ 0xc0
Capability: 0x08 @ 0xe0
Capability: 0x08 @ 0x80
flags: 0x2101
Capability: 0x08 @ 0x80
Capability: 0x08 @ 0xa0
flags: 0x2101
Capability: 0x08 @ 0x80
Capability: 0x08 @ 0xa0
Capability: 0x08 @ 0xc0
flags: 0x2101
Capability: 0x08 @ 0x80
Capability: 0x08 @ 0xa0
Capability: 0x08 @ 0xc0
Capability: 0x08 @ 0xe0
flags: 0x2101
Capability: 0x08 @ 0x80
Capability: 0x08 @ 0xa0
Capability: 0x08 @ 0xc0
Capability: 0x08 @ 0xe0
PCI: 00:00.0 [1022/7458] bus ops
PCI: 00:00.0 [1022/7458] enabled
Capability: 0x08 @ 0x60
Capability: 0x08 @ 0xb8
flags: 0x8000
Capability: 0x08 @ 0x60
Capability: 0x08 @ 0xb8
Capability: 0x08 @ 0xc0
flags: 0x0040
PCI: 00:0a.0 count: 0002 static_count: 0002
PCI: 00:0a.0 [1022/7458] enabled next_unitid: 000c
PCI: 00:00.0 [1022/7460] bus ops
PCI: 00:00.0 [1022/7460] enabled
Capability: 0x08 @ 0xc0
flags: 0x0080
PCI: 00:0c.0 count: 0004 static_count: 0002
PCI: 00:0c.0 [1022/7460] enabled next_unitid: 0010
unitid: 000c --> 0006
PCI: pci_scan_bus for bus 00
PCI: devfn 0x0, bad id 0xffffffff
PCI: devfn 0x8, bad id 0xffffffff
PCI: devfn 0x10, bad id 0xffffffff
PCI: devfn 0x18, bad id 0xffffffff
PCI: devfn 0x20, bad id 0xffffffff
PCI: devfn 0x28, bad id 0xffffffff
PCI: 00:06.0 [1022/7460] enabled
PCI: 00:07.0 [1022/7468] bus ops
PCI: 00:07.0 [1022/7468] enabled
PCI: 00:07.1 [1022/7469] ops
PCI: 00:07.1 [1022/7469] enabled
PCI: 00:07.2 [1022/746a] bus ops
PCI: 00:07.2 [1022/746a] enabled
PCI: 00:07.3 [1022/746b] bus ops
PCI: 00:07.3 [1022/746b] enabled
PCI: devfn 0x3c, bad id 0x0
PCI: devfn 0x3f, bad id 0x0
PCI: devfn 0x40, bad id 0xffffffff
PCI: devfn 0x48, bad id 0xffffffff
PCI: 00:0a.0 [1022/7458] enabled
PCI: 00:0a.1 [1022/7459] ops
PCI: 00:0a.1 [1022/7459] enabled
PCI: devfn 0x52, bad id 0xffffffff
PCI: devfn 0x53, bad id 0xffffffff
PCI: devfn 0x54, bad id 0xffffffff
PCI: devfn 0x55, bad id 0xffffffff
PCI: devfn 0x56, bad id 0xffffffff
PCI: devfn 0x57, bad id 0xffffffff
PCI: 00:0b.0 [1022/7458] bus ops
PCI: 00:0b.0 [1022/7458] enabled
PCI: 00:0b.1 [1022/7459] ops
PCI: 00:0b.1 [1022/7459] enabled
PCI: devfn 0x5a, bad id 0xffffffff
PCI: devfn 0x5b, bad id 0xffffffff
PCI: devfn 0x5c, bad id 0xffffffff
PCI: devfn 0x5d, bad id 0xffffffff
PCI: devfn 0x5e, bad id 0xffffffff
PCI: devfn 0x5f, bad id 0xffffffff
PCI: devfn 0x60, bad id 0xffffffff
PCI: devfn 0x68, bad id 0xffffffff
PCI: devfn 0x70, bad id 0xffffffff
PCI: devfn 0x78, bad id 0xffffffff
do_pci_scan_bridge for PCI: 00:06.0
PCI: pci_scan_bus for bus 01
PCI: 01:00.0 [1022/7464] bus ops
PCI: 01:00.0 [1022/7464] enabled
PCI: 01:00.1 [1022/7464] bus ops
PCI: 01:00.1 [1022/7464] enabled
PCI: devfn 0x3, bad id 0xffffffff
PCI: devfn 0x4, bad id 0xffffffff
PCI: devfn 0x5, bad id 0xffffffff
PCI: devfn 0x6, bad id 0xffffffff
PCI: devfn 0x7, bad id 0xffffffff
PCI: devfn 0x9, bad id 0xffffffff
PCI: devfn 0xa, bad id 0xffffffff
PCI: devfn 0xb, bad id 0xffffffff
PCI: devfn 0xc, bad id 0xffffffff
PCI: devfn 0xd, bad id 0xffffffff
PCI: devfn 0xe, bad id 0xffffffff
PCI: devfn 0xf, bad id 0xffffffff
PCI: devfn 0x10, bad id 0xffffffff
PCI: devfn 0x18, bad id 0xffffffff
PCI: devfn 0x20, bad id 0xffffffff
PCI: devfn 0x28, bad id 0xffffffff
PCI: devfn 0x30, bad id 0xffffffff
PCI: devfn 0x38, bad id 0xffffffff
PCI: devfn 0x40, bad id 0xffffffff
PCI: devfn 0x48, bad id 0xffffffff
PCI: devfn 0x50, bad id 0xffffffff
PCI: devfn 0x58, bad id 0xffffffff
PCI: devfn 0x60, bad id 0xffffffff
PCI: devfn 0x68, bad id 0xffffffff
PCI: devfn 0x70, bad id 0xffffffff
PCI: devfn 0x78, bad id 0xffffffff
PCI: devfn 0x80, bad id 0xffffffff
PCI: devfn 0x88, bad id 0xffffffff
PCI: devfn 0x90, bad id 0xffffffff
PCI: devfn 0x98, bad id 0xffffffff
PCI: devfn 0xa0, bad id 0xffffffff
PCI: devfn 0xa8, bad id 0xffffffff
PCI: devfn 0xb0, bad id 0xffffffff
PCI: devfn 0xb8, bad id 0xffffffff
PCI: devfn 0xc0, bad id 0xffffffff
PCI: devfn 0xc8, bad id 0xffffffff
PCI: devfn 0xd0, bad id 0xffffffff
PCI: devfn 0xd8, bad id 0xffffffff
PCI: devfn 0xe0, bad id 0xffffffff
PCI: devfn 0xe8, bad id 0xffffffff
PCI: devfn 0xf0, bad id 0xffffffff
PCI: devfn 0xf8, bad id 0xffffffff
scan_static_bus for PCI: 01:00.0
scan_static_bus for PCI: 01:00.0 done
scan_static_bus for PCI: 01:00.1
scan_static_bus for PCI: 01:00.1 done
PCI: pci_scan_bus returning with max=001
do_pci_scan_bridge returns max 1
scan_static_bus for PCI: 00:07.0
PNP: 002e.0 disabled
PNP: 002e.1 disabled
PNP: 002e.2 enabled
PNP: 002e.3 disabled
PNP: 002e.5 enabled
PNP: 002e.6 disabled
PNP: 002e.7 disabled
PNP: 002e.8 disabled
PNP: 002e.9 disabled
PNP: 002e.a disabled
PNP: 002e.b enabled
scan_static_bus for PCI: 00:07.0 done
scan_static_bus for PCI: 00:07.2
scan_static_bus for PCI: 00:07.2 done
scan_static_bus for PCI: 00:07.3
smbus: PCI: 00:07.3[0]->I2C: 01:18 enabled
I2C: 01:18 scanning...
scan_static_bus for I2C: 01:18
smbus: I2C: 01:18[0]->I2C: 02:50 enabled
smbus: I2C: 01:18[0]->I2C: 02:51 enabled
smbus: I2C: 01:18[0]->I2C: 02:52 enabled
smbus: I2C: 01:18[0]->I2C: 02:53 enabled
smbus: I2C: 01:18[1]->I2C: 03:50 enabled
smbus: I2C: 01:18[1]->I2C: 03:51 enabled
smbus: I2C: 01:18[1]->I2C: 03:52 enabled
smbus: I2C: 01:18[1]->I2C: 03:53 enabled
scan_static_bus for I2C: 01:18 done
scan_static_bus for PCI: 00:07.3 done
do_pci_scan_bridge for PCI: 00:0a.0
PCI: pci_scan_bus for bus 02
PCI: devfn 0x0, bad id 0xffffffff
PCI: devfn 0x8, bad id 0xffffffff
PCI: devfn 0x10, bad id 0xffffffff
PCI: devfn 0x18, bad id 0xffffffff
PCI: devfn 0x20, bad id 0xffffffff
PCI: devfn 0x28, bad id 0xffffffff
PCI: devfn 0x30, bad id 0xffffffff
PCI: devfn 0x38, bad id 0xffffffff
PCI: devfn 0x40, bad id 0xffffffff
PCI: devfn 0x48, bad id 0xffffffff
PCI: devfn 0x50, bad id 0xffffffff
PCI: devfn 0x58, bad id 0xffffffff
PCI: devfn 0x60, bad id 0xffffffff
PCI: devfn 0x68, bad id 0xffffffff
PCI: devfn 0x70, bad id 0xffffffff
PCI: devfn 0x78, bad id 0xffffffff
PCI: devfn 0x80, bad id 0xffffffff
PCI: devfn 0x88, bad id 0xffffffff
PCI: devfn 0x90, bad id 0xffffffff
PCI: devfn 0x98, bad id 0xffffffff
PCI: devfn 0xa0, bad id 0xffffffff
PCI: devfn 0xa8, bad id 0xffffffff
PCI: devfn 0xb0, bad id 0xffffffff
PCI: devfn 0xb8, bad id 0xffffffff
PCI: devfn 0xc0, bad id 0xffffffff
PCI: devfn 0xc8, bad id 0xffffffff
PCI: devfn 0xd0, bad id 0xffffffff
PCI: devfn 0xd8, bad id 0xffffffff
PCI: devfn 0xe0, bad id 0xffffffff
PCI: devfn 0xe8, bad id 0xffffffff
PCI: devfn 0xf0, bad id 0xffffffff
PCI: devfn 0xf8, bad id 0xffffffff
PCI: pci_scan_bus returning with max=002
Capability: 0x07 @ 0x60
PCI: 02: 133MHz PCI-X sstatus=60c3 rev=11
do_pci_scan_bridge returns max 2
do_pci_scan_bridge for PCI: 00:0b.0
PCI: pci_scan_bus for bus 03
PCI: devfn 0x0, bad id 0xffffffff
PCI: devfn 0x8, bad id 0xffffffff
PCI: devfn 0x10, bad id 0xffffffff
PCI: devfn 0x18, bad id 0xffffffff
PCI: devfn 0x20, bad id 0xffffffff
PCI: devfn 0x28, bad id 0xffffffff
PCI: devfn 0x30, bad id 0xffffffff
PCI: devfn 0x38, bad id 0xffffffff
PCI: devfn 0x40, bad id 0xffffffff
PCI: devfn 0x48, bad id 0xffffffff
PCI: devfn 0x50, bad id 0xffffffff
PCI: devfn 0x58, bad id 0xffffffff
PCI: devfn 0x60, bad id 0xffffffff
PCI: devfn 0x68, bad id 0xffffffff
PCI: devfn 0x70, bad id 0xffffffff
PCI: devfn 0x78, bad id 0xffffffff
PCI: devfn 0x80, bad id 0xffffffff
PCI: devfn 0x88, bad id 0xffffffff
PCI: devfn 0x90, bad id 0xffffffff
PCI: devfn 0x98, bad id 0xffffffff
PCI: devfn 0xa0, bad id 0xffffffff
PCI: devfn 0xa8, bad id 0xffffffff
PCI: devfn 0xb0, bad id 0xffffffff
PCI: devfn 0xb8, bad id 0xffffffff
PCI: devfn 0xc0, bad id 0xffffffff
PCI: devfn 0xc8, bad id 0xffffffff
PCI: devfn 0xd0, bad id 0xffffffff
PCI: devfn 0xd8, bad id 0xffffffff
PCI: devfn 0xe0, bad id 0xffffffff
PCI: devfn 0xe8, bad id 0xffffffff
PCI: devfn 0xf0, bad id 0xffffffff
PCI: devfn 0xf8, bad id 0xffffffff
PCI: pci_scan_bus returning with max=003
Capability: 0x07 @ 0x60
PCI: 03: 133MHz PCI-X sstatus=60c3 rev=11
do_pci_scan_bridge returns max 3
PCI: pci_scan_bus returning with max=003
Capability: 0x08 @ 0xa0
Capability: 0x08 @ 0xc0
flags: 0x0061
Collapsing PCI: 08:01.0 [1022/7454]
malloc Enter, size 668, free_mem_ptr 00269f50
malloc 0x00269f50
PCI: 08:00.0 [1022/7454] ops
PCI: 08:00.0 [1022/7454] enabled
Capability: 0x08 @ 0xa0
Capability: 0x08 @ 0xc0
flags: 0x0060
PCI: 08:01.0 count: 0003 static_count: 0001
PCI: 08:01.0 [1022/7454] enabled next_unitid: 0004
PCI: pci_scan_bus for bus 08
PCI: devfn 0x0, bad id 0xffffffff
PCI: 08:01.0 [1022/7454] enabled
malloc Enter, size 668, free_mem_ptr 0026a1ec
malloc 0x0026a1ec
PCI: 08:02.0 [1022/7455] bus ops
PCI: 08:02.0 [1022/7455] enabled
PCI: devfn 0x18, bad id 0xffffffff
do_pci_scan_bridge for PCI: 08:02.0
PCI: pci_scan_bus for bus 09
malloc Enter, size 668, free_mem_ptr 0026a488
malloc 0x0026a488
PCI: 09:00.0 [1002/5960] enabled
malloc Enter, size 668, free_mem_ptr 0026a724
malloc 0x0026a724
PCI: 09:00.1 [1002/5940] enabled
PCI: devfn 0x2, bad id 0xffffffff
PCI: devfn 0x3, bad id 0xffffffff
PCI: devfn 0x4, bad id 0xffffffff
PCI: devfn 0x5, bad id 0xffffffff
PCI: devfn 0x6, bad id 0xffffffff
PCI: devfn 0x7, bad id 0xffffffff
PCI: devfn 0x8, bad id 0xffffffff
PCI: devfn 0x10, bad id 0xffffffff
PCI: devfn 0x18, bad id 0xffffffff
PCI: devfn 0x20, bad id 0xffffffff
PCI: devfn 0x28, bad id 0xffffffff
PCI: devfn 0x30, bad id 0xffffffff
PCI: devfn 0x38, bad id 0xffffffff
PCI: devfn 0x40, bad id 0xffffffff
PCI: devfn 0x48, bad id 0xffffffff
PCI: devfn 0x50, bad id 0xffffffff
PCI: devfn 0x58, bad id 0xffffffff
PCI: devfn 0x60, bad id 0xffffffff
PCI: devfn 0x68, bad id 0xffffffff
PCI: devfn 0x70, bad id 0xffffffff
PCI: devfn 0x78, bad id 0xffffffff
PCI: devfn 0x80, bad id 0xffffffff
PCI: devfn 0x88, bad id 0xffffffff
PCI: devfn 0x90, bad id 0xffffffff
PCI: devfn 0x98, bad id 0xffffffff
PCI: devfn 0xa0, bad id 0xffffffff
PCI: devfn 0xa8, bad id 0xffffffff
PCI: devfn 0xb0, bad id 0xffffffff
PCI: devfn 0xb8, bad id 0xffffffff
PCI: devfn 0xc0, bad id 0xffffffff
PCI: devfn 0xc8, bad id 0xffffffff
PCI: devfn 0xd0, bad id 0xffffffff
PCI: devfn 0xd8, bad id 0xffffffff
PCI: devfn 0xe0, bad id 0xffffffff
PCI: devfn 0xe8, bad id 0xffffffff
PCI: devfn 0xf0, bad id 0xffffffff
PCI: devfn 0xf8, bad id 0xffffffff
PCI: pci_scan_bus returning with max=009
do_pci_scan_bridge returns max 9
PCI: pci_scan_bus returning with max=009
PCI: pci_scan_bus returning with max=009
PCI_DOMAIN: 0000 passpw: enabled
PCI_DOMAIN: 0000 passpw: enabled
scan_static_bus for Root Device done
done
Allocating resources...
Reading resources...
Root Device compute_allocate_io: base: 00000400 size: 00000000 align: 0 gran: 0
Root Device read_resources bus 0 link: 0
PCI_DOMAIN: 0000 read_resources bus 0 link: 0
PCI: 00:18.0 compute_allocate_io: base: 00000000 size: 00000000 align: 12 gran: 12
PCI: 00:18.0 read_resources bus 0 link: 0
PCI: 00:06.0 compute_allocate_io: base: 00000000 size: 00000000 align: 12 gran: 12
PCI: 00:06.0 read_resources bus 1 link: 0
PCI: 00:06.0 read_resources bus 1 link: 0 done
PCI: 00:06.0 compute_allocate_io: base: 00000000 size: 00000000 align: 12 gran: 12 done
PCI: 00:06.0 compute_allocate_io: base: 0000f000 size: 00000000 align: 12 gran: 12
PCI: 00:06.0 read_resources bus 1 link: 0
PCI: 00:06.0 read_resources bus 1 link: 0 done
PCI: 00:06.0 compute_allocate_io: base: 0000f000 size: 00000000 align: 12 gran: 12 done
PCI: 00:06.0 1c <- [0x000000f000 - 0x000000efff] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:06.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20
PCI: 00:06.0 read_resources bus 1 link: 0
PCI: 00:06.0 read_resources bus 1 link: 0 done
PCI: 00:06.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 done
PCI: 00:06.0 compute_allocate_prefmem: base: fff00000 size: 00000000 align: 20 gran: 20
PCI: 00:06.0 read_resources bus 1 link: 0
PCI: 00:06.0 read_resources bus 1 link: 0 done
PCI: 00:06.0 compute_allocate_prefmem: base: fff00000 size: 00000000 align: 20 gran: 20 done
PCI: 00:06.0 24 <- [0x00fff00000 - 0x00ffefffff] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:06.0 compute_allocate_mem: base: 00000000 size: 00000000 align: 20 gran: 20
PCI: 00:06.0 read_resources bus 1 link: 0
PCI: 00:06.0 read_resources bus 1 link: 0 done
PCI: 01:00.0 10 * [0x00000000 - 0x00000fff] mem
PCI: 01:00.1 10 * [0x00001000 - 0x00001fff] mem
PCI: 00:06.0 compute_allocate_mem: base: 00002000 size: 00100000 align: 20 gran: 20 done
PCI: 00:07.0 read_resources bus 0 link: 0
PCI: 00:07.0 read_resources bus 0 link: 0 done
PCI: 00:0a.0 compute_allocate_io: base: 00000000 size: 00000000 align: 12 gran: 12
PCI: 00:0a.0 read_resources bus 2 link: 0
PCI: 00:0a.0 read_resources bus 2 link: 0 done
PCI: 00:0a.0 compute_allocate_io: base: 00000000 size: 00000000 align: 12 gran: 12 done
PCI: 00:0a.0 compute_allocate_io: base: fffff000 size: 00000000 align: 12 gran: 12
PCI: 00:0a.0 read_resources bus 2 link: 0
PCI: 00:0a.0 read_resources bus 2 link: 0 done
PCI: 00:0a.0 compute_allocate_io: base: fffff000 size: 00000000 align: 12 gran: 12 done
PCI: 00:0a.0 1c <- [0x00fffff000 - 0x00ffffefff] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:0a.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20
PCI: 00:0a.0 read_resources bus 2 link: 0
PCI: 00:0a.0 read_resources bus 2 link: 0 done
PCI: 00:0a.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 done
PCI: 00:0a.0 compute_allocate_prefmem: base: fffffffffff00000 size: 00000000 align: 20 gran: 20
PCI: 00:0a.0 read_resources bus 2 link: 0
PCI: 00:0a.0 read_resources bus 2 link: 0 done
PCI: 00:0a.0 compute_allocate_prefmem: base: fffffffffff00000 size: 00000000 align: 20 gran: 20 done
PCI: 00:0a.0 24 <- [0xfffffffffff00000 - 0xffffffffffefffff] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:0a.0 compute_allocate_mem: base: 00000000 size: 00000000 align: 20 gran: 20
PCI: 00:0a.0 read_resources bus 2 link: 0
PCI: 00:0a.0 read_resources bus 2 link: 0 done
PCI: 00:0a.0 compute_allocate_mem: base: 00000000 size: 00000000 align: 20 gran: 20 done
PCI: 00:0a.0 compute_allocate_mem: base: fff00000 size: 00000000 align: 20 gran: 20
PCI: 00:0a.0 read_resources bus 2 link: 0
PCI: 00:0a.0 read_resources bus 2 link: 0 done
PCI: 00:0a.0 compute_allocate_mem: base: fff00000 size: 00000000 align: 20 gran: 20 done
PCI: 00:0a.0 20 <- [0x00fff00000 - 0x00ffefffff] size 0x00000000 gran 0x14 bus 02 mem
PCI: 00:0b.0 compute_allocate_io: base: 00000000 size: 00000000 align: 12 gran: 12
PCI: 00:0b.0 read_resources bus 3 link: 0
PCI: 00:0b.0 read_resources bus 3 link: 0 done
PCI: 00:0b.0 compute_allocate_io: base: 00000000 size: 00000000 align: 12 gran: 12 done
PCI: 00:0b.0 compute_allocate_io: base: fffff000 size: 00000000 align: 12 gran: 12
PCI: 00:0b.0 read_resources bus 3 link: 0
PCI: 00:0b.0 read_resources bus 3 link: 0 done
PCI: 00:0b.0 compute_allocate_io: base: fffff000 size: 00000000 align: 12 gran: 12 done
PCI: 00:0b.0 1c <- [0x00fffff000 - 0x00ffffefff] size 0x00000000 gran 0x0c bus 03 io
PCI: 00:0b.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20
PCI: 00:0b.0 read_resources bus 3 link: 0
PCI: 00:0b.0 read_resources bus 3 link: 0 done
PCI: 00:0b.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 done
PCI: 00:0b.0 compute_allocate_prefmem: base: fffffffffff00000 size: 00000000 align: 20 gran: 20
PCI: 00:0b.0 read_resources bus 3 link: 0
PCI: 00:0b.0 read_resources bus 3 link: 0 done
PCI: 00:0b.0 compute_allocate_prefmem: base: fffffffffff00000 size: 00000000 align: 20 gran: 20 done
PCI: 00:0b.0 24 <- [0xfffffffffff00000 - 0xffffffffffefffff] size 0x00000000 gran 0x14 bus 03 prefmem
PCI: 00:0b.0 compute_allocate_mem: base: 00000000 size: 00000000 align: 20 gran: 20
PCI: 00:0b.0 read_resources bus 3 link: 0
PCI: 00:0b.0 read_resources bus 3 link: 0 done
PCI: 00:0b.0 compute_allocate_mem: base: 00000000 size: 00000000 align: 20 gran: 20 done
PCI: 00:0b.0 compute_allocate_mem: base: fff00000 size: 00000000 align: 20 gran: 20
PCI: 00:0b.0 read_resources bus 3 link: 0
PCI: 00:0b.0 read_resources bus 3 link: 0 done
PCI: 00:0b.0 compute_allocate_mem: base: fff00000 size: 00000000 align: 20 gran: 20 done
PCI: 00:0b.0 20 <- [0x00fff00000 - 0x00ffefffff] size 0x00000000 gran 0x14 bus 03 mem
PCI: 00:18.0 read_resources bus 0 link: 0 done
PCI: 00:07.3 58 * [0x00000000 - 0x000000ff] io
PCI: 00:07.2 10 * [0x00000400 - 0x0000041f] io
PCI: 00:07.1 20 * [0x00000420 - 0x0000042f] io
PCI: 00:18.0 compute_allocate_io: base: 00000430 size: 00001000 align: 12 gran: 12 done
PCI: 00:18.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20
PCI: 00:18.0 read_resources bus 0 link: 0
PCI: 00:18.0 read_resources bus 0 link: 0 done
PCI: 00:18.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 done
PCI: 00:18.0 compute_allocate_mem: base: 00000000 size: 00000000 align: 20 gran: 20
PCI: 00:18.0 read_resources bus 0 link: 0
PCI: 00:18.0 read_resources bus 0 link: 0 done
PCI: 00:06.0 20 * [0x00000000 - 0x000fffff] mem
PCI: 00:0a.1 10 * [0x00100000 - 0x00100fff] mem
PCI: 00:0b.1 10 * [0x00101000 - 0x00101fff] mem
PCI: 00:18.0 compute_allocate_mem: base: 00102000 size: 00200000 align: 20 gran: 20 done
PCI: 00:19.0 compute_allocate_io: base: 00000000 size: 00000000 align: 12 gran: 12
PCI: 00:19.0 read_resources bus 8 link: 0
PCI: 08:02.0 compute_allocate_io: base: 00000000 size: 00000000 align: 12 gran: 12
PCI: 08:02.0 read_resources bus 9 link: 0
PCI: 08:02.0 read_resources bus 9 link: 0 done
PCI: 09:00.0 14 * [0x00000000 - 0x000000ff] io
PCI: 08:02.0 compute_allocate_io: base: 00000100 size: 00001000 align: 12 gran: 12 done
PCI: 08:02.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20
PCI: 08:02.0 read_resources bus 9 link: 0
PCI: 08:02.0 read_resources bus 9 link: 0 done
PCI: 09:00.0 10 * [0x00000000 - 0x07ffffff] prefmem
PCI: 09:00.1 10 * [0x08000000 - 0x0fffffff] prefmem
PCI: 08:02.0 compute_allocate_prefmem: base: 10000000 size: 10000000 align: 27 gran: 20 done
PCI: 08:02.0 compute_allocate_mem: base: 00000000 size: 00000000 align: 20 gran: 20
PCI: 08:02.0 read_resources bus 9 link: 0
PCI: 08:02.0 read_resources bus 9 link: 0 done
PCI: 09:00.0 30 * [0x00000000 - 0x0001ffff] mem
PCI: 09:00.0 18 * [0x00020000 - 0x0002ffff] mem
PCI: 09:00.1 14 * [0x00030000 - 0x0003ffff] mem
PCI: 08:02.0 compute_allocate_mem: base: 00040000 size: 00100000 align: 20 gran: 20 done
PCI: 00:19.0 read_resources bus 8 link: 0 done
PCI: 08:02.0 1c * [0x00000000 - 0x00000fff] io
PCI: 00:19.0 compute_allocate_io: base: 00001000 size: 00001000 align: 12 gran: 12 done
PCI: 00:19.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20
PCI: 00:19.0 read_resources bus 8 link: 0
PCI: 00:19.0 read_resources bus 8 link: 0 done
PCI: 08:01.0 10 * [0x00000000 - 0x0fffffff] prefmem
PCI: 08:02.0 24 * [0x10000000 - 0x1fffffff] prefmem
PCI: 00:19.0 compute_allocate_prefmem: base: 20000000 size: 20000000 align: 28 gran: 20 done
PCI: 00:19.0 compute_allocate_mem: base: 00000000 size: 00000000 align: 20 gran: 20
PCI: 00:19.0 read_resources bus 8 link: 0
PCI: 00:19.0 read_resources bus 8 link: 0 done
PCI: 08:02.0 20 * [0x00000000 - 0x000fffff] mem
PCI: 08:01.0 14 * [0x00100000 - 0x00100000] mem
PCI: 00:19.0 compute_allocate_mem: base: 00100001 size: 00200000 align: 20 gran: 20 done
PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
PCI: 00:18.0 10d8 * [0x00001000 - 0x00001fff] io
PCI: 00:19.0 10d0 * [0x00002000 - 0x00002fff] io
Root Device compute_allocate_io: base: 00003000 size: 00002c00 align: 12 gran: 0 done
Root Device compute_allocate_mem: base: 00000000 size: 00000000 align: 0 gran: 0
Root Device read_resources bus 0 link: 0
Root Device read_resources bus 0 link: 0 done
PCI: 00:19.0 10a8 * [0x00000000 - 0x1fffffff] prefmem
PCI: 00:18.3 94 * [0x20000000 - 0x23ffffff] mem
PCI: 00:18.0 10b0 * [0x24000000 - 0x241fffff] mem
PCI: 00:19.0 10a0 * [0x24200000 - 0x243fffff] mem
PCI: 00:18.0 10b8 * [0x24400000 - 0x243fffff] prefmem
Root Device compute_allocate_mem: base: 24400000 size: 24400000 align: 28 gran: 0 done
Done reading resources.
Allocating VGA resource PCI: 09:00.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 08:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:19.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Setting resources...
Root Device compute_allocate_io: base: 00001000 size: 00002c00 align: 12 gran: 0
Root Device read_resources bus 0 link: 0
Root Device read_resources bus 0 link: 0 done
PCI: 00:18.0 10d8 * [0x00001000 - 0x00001fff] io
PCI: 00:19.0 10d0 * [0x00002000 - 0x00002fff] io
Root Device compute_allocate_io: base: 00003000 size: 00002000 align: 12 gran: 0 done
Root Device compute_allocate_mem: base: d0000000 size: 24400000 align: 28 gran: 0
Root Device read_resources bus 0 link: 0
Root Device read_resources bus 0 link: 0 done
PCI: 00:19.0 10a8 * [0xd0000000 - 0xefffffff] prefmem
PCI: 00:18.3 94 * [0xf0000000 - 0xf3ffffff] mem
PCI: 00:18.0 10b0 * [0xf4000000 - 0xf41fffff] mem
PCI: 00:19.0 10a0 * [0xf4200000 - 0xf43fffff] mem
PCI: 00:18.0 10b8 * [0xf4400000 - 0xf43fffff] prefmem
Root Device compute_allocate_mem: base: f4400000 size: 24400000 align: 28 gran: 0 done
Root Device assign_resources, bus 0 link: 0
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:18.0 compute_allocate_io: base: 00001000 size: 00001000 align: 12 gran: 12
PCI: 00:18.0 read_resources bus 0 link: 0
PCI: 00:18.0 read_resources bus 0 link: 0 done
PCI: 00:07.3 58 * [0x00001000 - 0x000010ff] io
PCI: 00:07.2 10 * [0x00001400 - 0x0000141f] io
PCI: 00:07.1 20 * [0x00001420 - 0x0000142f] io
PCI: 00:18.0 compute_allocate_io: base: 00001430 size: 00001000 align: 12 gran: 12 done
PCI: 00:18.0 10d8 <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c io <node 00 link 00>
PCI: 00:18.0 compute_allocate_prefmem: base: f4400000 size: 00000000 align: 20 gran: 20
PCI: 00:18.0 read_resources bus 0 link: 0
PCI: 00:18.0 read_resources bus 0 link: 0 done
PCI: 00:18.0 compute_allocate_prefmem: base: f4400000 size: 00000000 align: 20 gran: 20 done
PCI: 00:18.0 10b8 <- [0x00f4400000 - 0x00f43fffff] size 0x00000000 gran 0x14 prefmem <node 00 link 00>
PCI: 00:18.0 compute_allocate_mem: base: f4000000 size: 00200000 align: 20 gran: 20
PCI: 00:18.0 read_resources bus 0 link: 0
PCI: 00:18.0 read_resources bus 0 link: 0 done
PCI: 00:06.0 20 * [0xf4000000 - 0xf40fffff] mem
PCI: 00:0a.1 10 * [0xf4100000 - 0xf4100fff] mem
PCI: 00:0b.1 10 * [0xf4101000 - 0xf4101fff] mem
PCI: 00:18.0 compute_allocate_mem: base: f4102000 size: 00200000 align: 20 gran: 20 done
PCI: 00:18.0 10b0 <- [0x00f4000000 - 0x00f41fffff] size 0x00200000 gran 0x14 mem <node 00 link 00>
PCI: 00:18.0 assign_resources, bus 0 link: 0
PCI: 00:06.0 compute_allocate_mem: base: f4000000 size: 00100000 align: 20 gran: 20
PCI: 00:06.0 read_resources bus 1 link: 0
PCI: 00:06.0 read_resources bus 1 link: 0 done
PCI: 01:00.0 10 * [0xf4000000 - 0xf4000fff] mem
PCI: 01:00.1 10 * [0xf4001000 - 0xf4001fff] mem
PCI: 00:06.0 compute_allocate_mem: base: f4002000 size: 00100000 align: 20 gran: 20 done
PCI: 00:06.0 20 <- [0x00f4000000 - 0x00f40fffff] size 0x00100000 gran 0x14 bus 01 mem
PCI: 00:06.0 assign_resources, bus 1 link: 0
PCI: 01:00.0 10 <- [0x00f4000000 - 0x00f4000fff] size 0x00001000 gran 0x0c mem
PCI: 01:00.1 10 <- [0x00f4001000 - 0x00f4001fff] size 0x00001000 gran 0x0c mem
PCI: 00:06.0 assign_resources, bus 1 link: 0
PCI: 00:07.0 assign_resources, bus 0 link: 0
PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io
PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
PNP: 002e.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
PNP: 002e.b 60 <- [0x0000000290 - 0x0000000297] size 0x00000008 gran 0x03 io
PNP: 002e.b 70 <- [0x0000000005 - 0x0000000005] size 0x00000001 gran 0x00 irq
PCI: 00:07.0 assign_resources, bus 0 link: 0
PCI: 00:07.1 20 <- [0x0000001420 - 0x000000142f] size 0x00000010 gran 0x04 io
PCI: 00:07.2 10 <- [0x0000001400 - 0x000000141f] size 0x00000020 gran 0x05 io
PCI: 00:07.3 58 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
PCI: 00:07.3 assign_resources, bus 1 link: 0
PCI: 00:07.3 assign_resources, bus 1 link: 0
PCI: 00:0a.1 10 <- [0x00f4100000 - 0x00f4100fff] size 0x00001000 gran 0x0c mem64
PCI: 00:0b.1 10 <- [0x00f4101000 - 0x00f4101fff] size 0x00001000 gran 0x0c mem64
PCI: 00:18.0 assign_resources, bus 0 link: 0
PCI: 00:18.3 94 <- [0x00f0000000 - 0x00f3ffffff] size 0x04000000 gran 0x1a mem <gart>
PCI: 00:19.3 94 <- [0x00f0000000 - 0x00f3ffffff] size 0x04000000 gran 0x1a mem <gart>
VGA: PCI: 00:19.0 (aka node 1) link 0 has VGA device
PCI: 00:19.0 compute_allocate_io: base: 00002000 size: 00001000 align: 12 gran: 12
PCI: 00:19.0 read_resources bus 8 link: 0
PCI: 00:19.0 read_resources bus 8 link: 0 done
PCI: 08:02.0 1c * [0x00002000 - 0x00002fff] io
PCI: 00:19.0 compute_allocate_io: base: 00003000 size: 00001000 align: 12 gran: 12 done
PCI: 00:19.0 10d0 <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c io <node 01 link 00>
PCI: 00:19.0 compute_allocate_prefmem: base: d0000000 size: 20000000 align: 28 gran: 20
PCI: 00:19.0 read_resources bus 8 link: 0
PCI: 00:19.0 read_resources bus 8 link: 0 done
PCI: 08:01.0 10 * [0xd0000000 - 0xdfffffff] prefmem
PCI: 08:02.0 24 * [0xe0000000 - 0xefffffff] prefmem
PCI: 00:19.0 compute_allocate_prefmem: base: f0000000 size: 20000000 align: 28 gran: 20 done
PCI: 00:19.0 10a8 <- [0x00d0000000 - 0x00efffffff] size 0x20000000 gran 0x14 prefmem <node 01 link 00>
PCI: 00:19.0 compute_allocate_mem: base: f4200000 size: 00200000 align: 20 gran: 20
PCI: 00:19.0 read_resources bus 8 link: 0
PCI: 00:19.0 read_resources bus 8 link: 0 done
PCI: 08:02.0 20 * [0xf4200000 - 0xf42fffff] mem
PCI: 08:01.0 14 * [0xf4300000 - 0xf4300000] mem
PCI: 00:19.0 compute_allocate_mem: base: f4300001 size: 00200000 align: 20 gran: 20 done
PCI: 00:19.0 10a0 <- [0x00f4200000 - 0x00f43fffff] size 0x00200000 gran 0x14 mem <node 01 link 00>
PCI: 00:19.0 assign_resources, bus 8 link: 0
PCI: 08:01.0 10 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem
PCI: 08:01.0 14 <- [0x00f4300000 - 0x00f4300000] size 0x00000001 gran 0x00 mem
PCI: 08:02.0 compute_allocate_io: base: 00002000 size: 00001000 align: 12 gran: 12
PCI: 08:02.0 read_resources bus 9 link: 0
PCI: 08:02.0 read_resources bus 9 link: 0 done
PCI: 09:00.0 14 * [0x00002000 - 0x000020ff] io
PCI: 08:02.0 compute_allocate_io: base: 00002100 size: 00001000 align: 12 gran: 12 done
PCI: 08:02.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 09 io
PCI: 08:02.0 compute_allocate_prefmem: base: e0000000 size: 10000000 align: 27 gran: 20
PCI: 08:02.0 read_resources bus 9 link: 0
PCI: 08:02.0 read_resources bus 9 link: 0 done
PCI: 09:00.0 10 * [0xe0000000 - 0xe7ffffff] prefmem
PCI: 09:00.1 10 * [0xe8000000 - 0xefffffff] prefmem
PCI: 08:02.0 compute_allocate_prefmem: base: f0000000 size: 10000000 align: 27 gran: 20 done
PCI: 08:02.0 24 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x14 bus 09 prefmem
PCI: 08:02.0 compute_allocate_mem: base: f4200000 size: 00100000 align: 20 gran: 20
PCI: 08:02.0 read_resources bus 9 link: 0
PCI: 08:02.0 read_resources bus 9 link: 0 done
PCI: 09:00.0 30 * [0xf4200000 - 0xf421ffff] mem
PCI: 09:00.0 18 * [0xf4220000 - 0xf422ffff] mem
PCI: 09:00.1 14 * [0xf4230000 - 0xf423ffff] mem
PCI: 08:02.0 compute_allocate_mem: base: f4240000 size: 00100000 align: 20 gran: 20 done
PCI: 08:02.0 20 <- [0x00f4200000 - 0x00f42fffff] size 0x00100000 gran 0x14 bus 09 mem
PCI: 08:02.0 assign_resources, bus 9 link: 0
PCI: 09:00.0 10 <- [0x00e0000000 - 0x00e7ffffff] size 0x08000000 gran 0x1b prefmem
PCI: 09:00.0 14 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
PCI: 09:00.0 18 <- [0x00f4220000 - 0x00f422ffff] size 0x00010000 gran 0x10 mem
PCI: 09:00.0 30 <- [0x00f4200000 - 0x00f421ffff] size 0x00020000 gran 0x11 romem
PCI: 09:00.1 10 <- [0x00e8000000 - 0x00efffffff] size 0x08000000 gran 0x1b prefmem
PCI: 09:00.1 14 <- [0x00f4230000 - 0x00f423ffff] size 0x00010000 gran 0x10 mem
PCI: 08:02.0 assign_resources, bus 9 link: 0
PCI: 00:19.0 assign_resources, bus 8 link: 0
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Done allocating resources.
Enabling resources...
PCI: 00:18.0 cmd <- 00
PCI: 00:06.0 bridge ctrl <- 0003
PCI: 00:06.0 cmd <- 06
PCI: 01:00.0 subsystem <- 1022/2b80
PCI: 01:00.0 cmd <- 02
PCI: 01:00.1 subsystem <- 1022/2b80
PCI: 01:00.1 cmd <- 02
PCI: 00:07.0 subsystem <- 1022/2b80
PCI: 00:07.0 cmd <- 0f
w83627hf hwm smbus enabled
PCI: 00:07.1 subsystem <- 1022/2b80
PCI: 00:07.1 cmd <- 01
PCI: 00:07.2 subsystem <- 1022/2b80
PCI: 00:07.2 cmd <- 01
PCI: 00:07.3 subsystem <- 1022/2b80
PCI: 00:07.3 cmd <- 01
PCI: 00:0a.0 bridge ctrl <- 0003
PCI: 00:0a.0 cmd <- 00
PCI: 00:0a.1 subsystem <- 1022/2b80
PCI: 00:0a.1 cmd <- 06
PCI: 00:0b.0 bridge ctrl <- 0003
PCI: 00:0b.0 cmd <- 00
PCI: 00:0b.1 subsystem <- 1022/2b80
PCI: 00:0b.1 cmd <- 06
PCI: 00:18.1 subsystem <- 1022/2b80
PCI: 00:18.1 cmd <- 00
PCI: 00:18.2 subsystem <- 1022/2b80
PCI: 00:18.2 cmd <- 00
PCI: 00:18.3 cmd <- 00
PCI: 00:18.4 subsystem <- 1022/2b80
PCI: 00:18.4 cmd <- 00
PCI: 00:19.0 cmd <- 00
PCI: 08:01.0 cmd <- 06
PCI: 08:02.0 bridge ctrl <- 000b
PCI: 08:02.0 cmd <- 07
PCI: 09:00.0 cmd <- 03
PCI: 09:00.1 cmd <- 02
PCI: 00:19.1 cmd <- 00
PCI: 00:19.2 cmd <- 00
PCI: 00:19.3 cmd <- 00
PCI: 00:19.4 cmd <- 00
done.
Initializing devices...
Root Device init
APIC_CLUSTER: 0 init
start_eip=0x00007000, offset=0x00210000, code_size=0x0000005b
Initializing CPU #0
CPU: vendor AMD device 100f20
CPU: family 10, model 02, stepping 00
Enabling cache
Setting fixed MTRRs(0-88) type: UC
Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
DONE fixed MTRRs
Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
ADDRESS_MASK_HIGH=0xffff
DONE variable MTRRs
Clear out the extra MTRR's
call enable_var_mtrr()
Leave x86_setup_var_mtrrs
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
microcode: equivalent rev id = 0x1020, current patch id = 0x01000033
Setting up local apic... apic_id: 0x00 done.
siblings = 03, nodeid = 00, coreid = 00
Clearing memory 16384K - 1048576K: --------------- done
CPU #0 Initialized
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #1
CPU: vendor AMD device 100f20
CPU: family 10, model 02, stepping 00
Enabling cache
Setting fixed MTRRs(0-88) type: UC
Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
DONE fixed MTRRs
Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
ADDRESS_MASK_HIGH=0xffff
DONE variable MTRRs
Clear out the extra MTRR's
call enable_var_mtrr()
Leave x86_setup_var_mtrrs
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
microcode: equivalent rev id = 0x1020, current patch id = 0x00000000
Setting up local apic... apic_id: 0x01 done.
siblings = 03, nodeid = 00, coreid = 01
CPU #1 Initialized
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 2.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 2.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #2
CPU: vendor AMD device 100f20
CPU: family 10, model 02, stepping 00
Enabling cache
Setting fixed MTRRs(0-88) type: UC
Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
DONE fixed MTRRs
Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
ADDRESS_MASK_HIGH=0xffff
DONE variable MTRRs
Clear out the extra MTRR's
call enable_var_mtrr()
Leave x86_setup_var_mtrrs
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
microcode: equivalent rev id = 0x1020, current patch id = 0x00000000
Setting up local apic... apic_id: 0x02 done.
siblings = 03, nodeid = 00, coreid = 02
CPU #2 Initialized
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 3.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 3.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #3
CPU: vendor AMD device 100f20
CPU: family 10, model 02, stepping 00
Enabling cache
Setting fixed MTRRs(0-88) type: UC
Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
DONE fixed MTRRs
Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
ADDRESS_MASK_HIGH=0xffff
DONE variable MTRRs
Clear out the extra MTRR's
call enable_var_mtrr()
Leave x86_setup_var_mtrrs
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
microcode: equivalent rev id = 0x1020, current patch id = 0x00000000
Setting up local apic... apic_id: 0x03 done.
siblings = 03, nodeid = 00, coreid = 03
CPU #3 Initialized
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 4.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 4.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #4
CPU: vendor AMD device 100f20
CPU: family 10, model 02, stepping 00
Enabling cache
Setting fixed MTRRs(0-88) type: UC
Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
DONE fixed MTRRs
Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
ADDRESS_MASK_HIGH=0xffff
DONE variable MTRRs
Clear out the extra MTRR's
call enable_var_mtrr()
Leave x86_setup_var_mtrrs
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
microcode: equivalent rev id = 0x1020, current patch id = 0x00000000
Setting up local apic... apic_id: 0x04 done.
siblings = 03, nodeid = 01, coreid = 00
Clearing memory 1048576K - 2097152K: ---------------- done
CPU #4 Initialized
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 5.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 5.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #5
CPU: vendor AMD device 100f20
CPU: family 10, model 02, stepping 00
Enabling cache
Setting fixed MTRRs(0-88) type: UC
Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
DONE fixed MTRRs
Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
ADDRESS_MASK_HIGH=0xffff
DONE variable MTRRs
Clear out the extra MTRR's
call enable_var_mtrr()
Leave x86_setup_var_mtrrs
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
microcode: equivalent rev id = 0x1020, current patch id = 0x00000000
Setting up local apic... apic_id: 0x05 done.
siblings = 03, nodeid = 01, coreid = 01
CPU #5 Initialized
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 6.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 6.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #6
CPU: vendor AMD device 100f20
CPU: family 10, model 02, stepping 00
Enabling cache
Setting fixed MTRRs(0-88) type: UC
Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
DONE fixed MTRRs
Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
ADDRESS_MASK_HIGH=0xffff
DONE variable MTRRs
Clear out the extra MTRR's
call enable_var_mtrr()
Leave x86_setup_var_mtrrs
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
microcode: equivalent rev id = 0x1020, current patch id = 0x00000000
Setting up local apic... apic_id: 0x06 done.
siblings = 03, nodeid = 01, coreid = 02
CPU #6 Initialized
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 7.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 7.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #7
Waiting for 1 CPUS to stop
CPU: vendor AMD device 100f20
CPU: family 10, model 02, stepping 00
Enabling cache
Setting fixed MTRRs(0-88) type: UC
Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
DONE fixed MTRRs
Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
ADDRESS_MASK_HIGH=0xffff
DONE variable MTRRs
Clear out the extra MTRR's
call enable_var_mtrr()
Leave x86_setup_var_mtrrs
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
microcode: equivalent rev id = 0x1020, current patch id = 0x00000000
Setting up local apic... apic_id: 0x07 done.
siblings = 03, nodeid = 01, coreid = 03
CPU #7 Initialized
All AP CPUs stopped
PCI: 00:18.0 init
PCI: 00:0a.0 init
PCI: 00:0a.1 init
PCI: 00:0b.0 init
PCI: 00:0b.1 init
PCI: 00:06.0 init
PCI: 00:07.0 init
amd8111: ioapic bsp_apicid = 00
for IRQ, reg 0x00000000 value 0x00000700 0x00000000
for IRQ, reg 0x00000001 value 0x00010000 0x00000000
for IRQ, reg 0x00000002 value 0x00010000 0x00000000
for IRQ, reg 0x00000003 value 0x00010000 0x00000000
for IRQ, reg 0x00000004 value 0x00010000 0x00000000
for IRQ, reg 0x00000005 value 0x00010000 0x00000000
for IRQ, reg 0x00000006 value 0x00010000 0x00000000
for IRQ, reg 0x00000007 value 0x00010000 0x00000000
for IRQ, reg 0x00000008 value 0x00010000 0x00000000
for IRQ, reg 0x00000009 value 0x00010000 0x00000000
for IRQ, reg 0x0000000a value 0x00010000 0x00000000
for IRQ, reg 0x0000000b value 0x00010000 0x00000000
for IRQ, reg 0x0000000c value 0x00010000 0x00000000
for IRQ, reg 0x0000000d value 0x00010000 0x00000000
for IRQ, reg 0x0000000e value 0x00010000 0x00000000
for IRQ, reg 0x0000000f value 0x00010000 0x00000000
for IRQ, reg 0x00000010 value 0x00010000 0x00000000
for IRQ, reg 0x00000011 value 0x00010000 0x00000000
for IRQ, reg 0x00000012 value 0x00010000 0x00000000
for IRQ, reg 0x00000013 value 0x00010000 0x00000000
for IRQ, reg 0x00000014 value 0x00010000 0x00000000
for IRQ, reg 0x00000015 value 0x00010000 0x00000000
for IRQ, reg 0x00000016 value 0x00010000 0x00000000
for IRQ, reg 0x00000017 value 0x00010000 0x00000000
RTC Init
Invalid CMOS LB checksum
enabling HPET @0xfed00000
PNP: 002e.2 init
PNP: 002e.5 init
Keyboard init...
PNP: 002e.b init
PCI: 00:07.1 init
IDE1 IDE0 PCI: 00:07.3 init
set power on after power fail
pm_base: 0x1000
smbus: PCI: 00:07.3[0]->I2C: 01:18 init
PCI: 00:18.1 init
PCI: 00:18.2 init
PCI: 00:18.3 init
NB: Function 3 Misc Control.. done.
PCI: 00:18.4 init
PCI: 00:19.0 init
PCI: 00:19.1 init
PCI: 00:19.2 init
PCI: 00:19.3 init
NB: Function 3 Misc Control.. done.
PCI: 00:19.4 init
PCI: 08:02.0 init
PCI: 09:00.0 init
rom address for PCI: 09:00.0 = f4200000
PCI Expansion ROM, signature 0xaa55, INIT size 0xd000, data ptr 0x016c
PCI ROM Image, Vendor 1002, Device 5960,
PCI ROM Image, Class Code 030000, Code Type 00
copying VGA ROM Image from 0xf4200000 to 0xc0000, 0xd000 bytes
entering emulator
halt_sys: file /home/marcj/svn-ssh/LinuxBIOSv2/src/devices/emulator/x86emu/ops.c, line 4387
PCI: 09:00.1 init
Devices initialized
i=0 bus range: [0, 3] bus_isa=4
i=1 bus range: [8, 9] bus_isa=a
Writing IRQ routing tables to 0xf0000...done.
ACPI: Writing ACPI tables at f0400...
ACPI: * HPET at f0500
ACPI: added table 1/46 Length now 40
ACPI: * MADT at f0538
ACPI: added table 2/46 Length now 44
ACPI: * SRAT at f0608
SRAT: lapic cpu_index=00, node_id=00, apic_id=00
SRAT: lapic cpu_index=01, node_id=00, apic_id=01
SRAT: lapic cpu_index=02, node_id=00, apic_id=02
SRAT: lapic cpu_index=03, node_id=00, apic_id=03
SRAT: lapic cpu_index=04, node_id=01, apic_id=04
SRAT: lapic cpu_index=05, node_id=01, apic_id=05
SRAT: lapic cpu_index=06, node_id=01, apic_id=06
SRAT: lapic cpu_index=07, node_id=01, apic_id=07
set_srat_mem: dev PCI_DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280
set_srat_mem: dev PCI_DOMAIN: 0000, res->index=0020 startk=00000300, sizek=000ffd00
set_srat_mem: dev PCI_DOMAIN: 0000, res->index=0031 startk=00100000, sizek=00100000
ACPI: added table 3/46 Length now 48
ACPI: * SLIT at f0730
ACPI: added table 4/46 Length now 52
ACPI: * SSDT at f0760
ACPI: added table 5/46 Length now 56
ACPI: * SSDT for PState at f0d95
ACPI: * SSDT for PCI4 at f0d98
ACPI: added table 6/46 Length now 60
ACPI: * DSDT at f0f60
ACPI: * DSDT @ 000f0f60 Length 190a
ACPI: * FACS at f2870
ACPI: * FADT at f28b8
pm_base: 0x1000
ACPI: added table 7/46 Length now 64
ACPI: done.
Wrote the mp table end at: 00000020 - 00000254
Moving GDT to 0x500...ok
Adjust low_table_end from 0x00000530 to 0x00001000
Adjust rom_table_end from 0x000f2c00 to 0x00100000
Wrote linuxbios table at: 00000530 - 00000e28 checksum 2a31
Welcome to elfboot, the open sourced starter.
January 2002, Eric Biederman.
Version 1.3
rom_stream: 0xfff80000 - 0xfffbffff
Found ELF candidate at offset 0
header_offset is 0
Try to load at offset 0x0
malloc Enter, size 32, free_mem_ptr 0026a9c0
malloc 0x0026a9c0
New segment addr 0x100000 size 0x2dc20 offset 0xc0 filesize 0xeee8
(cleaned up) New segment addr 0x100000 size 0x2dc20 offset 0xc0 filesize 0xeee8
lb: [0x0000000000200000, 0x0000000000328000)
malloc Enter, size 32, free_mem_ptr 0026a9e0
malloc 0x0026a9e0
New segment addr 0x12dc20 size 0x48 offset 0xefc0 filesize 0x48
(cleaned up) New segment addr 0x12dc20 size 0x48 offset 0xefc0 filesize 0x48
lb: [0x0000000000200000, 0x0000000000328000)
Dropping non PT_LOAD segment
Dropping non PT_LOAD segment
Loading Segment: addr: 0x0000000000100000 memsz: 0x000000000002dc20 filesz: 0x000000000000eee8
[ 0x0000000000100000, 000000000010eee8, 0x000000000012dc20) <- 00000000000000c0
Clearing Segment: addr: 0x000000000010eee8 memsz: 0x000000000001ed38
Loading Segment: addr: 0x000000000012dc20 memsz: 0x0000000000000048 filesz: 0x0000000000000048
[ 0x000000000012dc20, 000000000012dc68, 0x000000000012dc68) <- 000000000000efc0
Loaded segments
verified segments
closed down stream
Jumping to boot code at 0x10a980
entry = 0x0010a980
lb_start = 0x00200000
lb_size = 0x00128000
adjust = 0x7fcd8000
buffer = 0x7fdb0000
elf_boot_notes = 0x002275c0
adjusted_boot_notes = 0x7feff5c0
FILO version 0.5 (marcj@chillywilly) Mon Dec 10 23:07:51 MST 2007
menu: hda1:/boot/filo/menu.lst
hda: LBA 61GB: Maxtor 6Y060L0
Mounted ext2fs
Found Linux version 2.6.22.12-1 (root@forsteri) #1 SMP Mon Nov 26 15:23:15 MST 2007 bzImage.
Loading kernel... ok
Loading initrd... ok
Jumping to entry point...
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Marc Jones