Hi everyone,
I would like to learn how to add a new mainboard to coreboot. I have a Fujitsu D2990-A1, with chipset intel H61, sandybridge and a Superio Nuvoton NCT5571D. I use the autoport tools to generate the files. I know that I have to change them to add new configuration but I don't really know how. Can you help me to get started with the debug part or to give me some advice about it. I have downloaded the Embedde Firmware Solution eBook to begin with. Thanks
Kory
This is my debug output
USB coreboot-coreboot-unknown Wed Apr 5 15:19:21 UTC 2017 romstage starting... Setting up static southbridge registers... done. Disabling Watchdog reboot... done. Setting up static northbridge registers... done. Graphics not supported by this CPU/chipset. Back from sandybridge_early_initialization() SMBus controller enabled. CPU id(206a7): Intel(R) Core(TM) i7-2600 CPU @ 3.40GHz AES supported, TXT supported, VT supported PCH type: H61, device id: 1c5c, rev id 5 Intel ME early init WARNING: ME has bad firmware ME: Requested 63MB UMA Starting native Platform init CBFS: 'Master Header Locator' located CBFS at [200100:3fffc0) CBFS: Locating 'mrc.cache' CBFS: Found @ offset 1fec0 size 10000 find_current_mrc_cache_local: No valid MRC cache found. Row addr bits : 15 Column addr bits : 10 Number of ranks : 2 DIMM Capacity : 4096 MB CAS latencies : 6 7 8 9 10 tCKmin : 1.500 ns tAAmin : 13.125 ns tWRmin : 15.000 ns tRCDmin : 13.125 ns tRRDmin : 6.000 ns tRPmin : 13.125 ns tRASmin : 36.000 ns tRCmin : 49.125 ns tRFCmin : 160.000 ns tWTRmin : 7.500 ns tRTPmin : 7.500 ns tFAWmin : 30.000 ns channel[1] rankmap = 0x3 Starting RAM training (0). PLL busy... done in 10 us MCU frequency is set at : 666 MHz Selected DRAM frequency: 666 MHz Minimum CAS latency : 9T Selected CAS latency : 9T Selected CWL latency : 7T Selected tRCD : 9T Selected tRP : 9T Selected tRAS : 24T Selected tWR : 10T Selected tFAW : 20T Selected tRRD : 4T Selected tRTP : 5T Selected tWTR : 5T Selected tRFC : 107T Done dimm mapping Update PCI-E configuration space: PCI(0, 0, 0)[a0] = 0 PCI(0, 0, 0)[a4] = 1 PCI(0, 0, 0)[bc] = 8a800000 PCI(0, 0, 0)[a8] = 71900000 PCI(0, 0, 0)[ac] = 1 PCI(0, 0, 0)[b8] = 80000000 PCI(0, 0, 0)[b0] = 80800000 PCI(0, 0, 0)[b4] = 80800000 PCI(0, 0, 0)[7c] = 7f PCI(0, 0, 0)[70] = fc100000 PCI(0, 0, 0)[74] = 0 PCI(0, 0, 0)[78] = fc100c00 Done memory map Done io registers Done jedec reset Done MRS commands t123: 1912, 9120, 500 ME: FW Partition Table : BAD ME: Bringup Loader Failure : YES ME: Firmware Init Complete : YES ME: Manufacturing Mode : YES ME: Boot Options Present : YES ME: Update In Progress : YES ¡8—d$ ME: Current Operation State : M0 without UMA but with error ME: Current Operation Mode : Reset ME: Error Code : <NULL> ME: Progress Phase : Soft Temporary Disable ME: Power Management Event : uKernel Phase ME: Progress Phase State : Unknown 0xff ME: Wrong mode : 15 ME: HFS error : 15 ME: FWS2: 0xffffffff ME: Bist in progress: 0x1 ME: ICC Status : 0x3 ME: Invoke MEBx : 0x1 ME: CPU replaced : 0x1 ME: MBP ready : 0x1 ME: MFS failure : 0x1 ME: Warm reset req : 0x1 ME: CPU repl valid : 0x1 ME: (Reserved) : 0x3 ME: FW update req : 0x1 ME: (Reserved) : 0xf ME: Current state : 0xff ME: Current PM event: 0xf ME: Progress code : 0xf CPU was replaced & warm reset required...
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Kory Maincent