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Hello,
It seems I'm quite tired to formulate the description of the patch accurately I hope it is understandable somehow.
Following patch fixes the XIP computation issue. I removed the normal image because it was not working anyway (it was hardcoded) and because it allows me to fix the XIP base to something sane (and use generic computation and approach)
This board is bit tricky because until now it required the VGA BIOS on the flash start. XIP will work with 64KB aligned base, therefore the VGA ROM image must be aligned too to 64KB.
Third reason is that now it makes 384KB for additional ROMs and payload - plenty of space for CBFS fun ;)
Now it uses generic _ROMBASE etc computation which is nice too.
Signed-off-by: Rudolf Marek r.marek@assembler.cz
Rudolf
Hi,
Can someone take a look here?
Rudolf
Acked-by: Ronald G. Minnich rminnich@gmail.com
Looks ok. Long term, we do need to figure out what to do about failover/fallback/normal.
I had an idea that we could use failover to select CBFS rom code entries for fallback and normal, but it's not obvious that is the right way to go. Plus, the still-unresolved question of fixed-location CBFS entries needs to be resolved.
I only mention this in the hope that someone can take a look at the idea.
ron
Hi Ron,
Thanks its in as: Committed revision 4265.
Here are some random comments (while watching icehockey - so not so clear ;)
Maybe the trick with different CS would work for normal / fallback? Maybe better than linker stuff. Not sure how is the stuff for dataseg maybe it is just copied to ram I guess (next stage)
Or maybe we can just have some small panic loader through serial/USB instead of second full image?
U-boot is doing the relocation for its RAM image (just FYI) there is some code for that.
Thanks, Rudolf
On Sun, May 10, 2009 at 1:44 PM, Rudolf Marek r.marek@assembler.cz wrote:
U-boot is doing the relocation for its RAM image (just FYI) there is some code for that.
we might want to see if what they are doing could work for us. The CS approach does seem to make lots of sense, since we use CS zero-based anyway. Just build the ROM parts with 0-based code and adjust the CS when the ROm code is started.
ron
Rudolf Marek wrote:
Or maybe we can just have some small panic loader through serial/USB instead of second full image?
Yes, we should have a panic room.
ron minnich wrote:
The CS approach does seem to make lots of sense,
I like it too! Make some use of the paging.
//Peter
It seems I forgot to send this mail although it sat finished in my drafts folder. Sorry.
On 02.05.2009 23:54, Rudolf Marek wrote:
It seems I'm quite tired to formulate the description of the patch accurately I hope it is understandable somehow.
Following patch fixes the XIP computation issue. I removed the normal image because it was not working anyway (it was hardcoded) and because it allows me to fix the XIP base to something sane (and use generic computation and approach)
This board is bit tricky because until now it required the VGA BIOS on the flash start. XIP will work with 64KB aligned base, therefore the VGA ROM image must be aligned too to 64KB.
Third reason is that now it makes 384KB for additional ROMs and payload - plenty of space for CBFS fun ;)
Now it uses generic _ROMBASE etc computation which is nice too.
Signed-off-by: Rudolf Marek r.marek@assembler.cz
The Config.lb part is awesome and I really appreciate it because I didn't dare to convert that file to the ROM size calculation include file. The rest looks good as well, but I'm not an expert for that code.
Acked-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Regards, Carl-Daniel